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Develop and Implementation of the
Speex Vocoder on the TI C64+ DSP
Students – Eyal Tirkel Roy Nahum
Supervisors – Prof. Ilan Shallom
Mr. Amir Artsi Mr. Guy Shterlich
Presentation Overview
• Subject covered :• Goal & Motivation• Speex Vocoder• DSP quick overview• TI C64x+ DSP• Optimization process• Optimization results so far
Project Goal
• Develop and Implement a Speech VoCoder, Speex, on the TI C64+ DSP• Probe the VoCoder and verify compatibility.• Analyze and profile the VoCoder for
complexity and real-time consumption of different parts in the code.
• Optimization in both C & Linear assembly for real-time processing with TI C64+ DSP.
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Codec
Codec
INTERNET
Motivation
• Usage of Internet Protocol (IP) for voice transfer is increasing rapidly, thus rising the need low bit-rate voice transmission while preserving quality.
• Reduce product costs :• Algorithm - Speex is patent-free.• Hardware - TI C64+ shelf fixed-point DSP.
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Speex - Overview
• Source-Filter Speech Model• Minimal info needed from past frame• CELP (Code Excited Linear Prediction)
algorithm• Analysis by Synthesis
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Source-Filter Speech Model
• The vocal cords are the source of sound (excitation signal)
• The vocal tract acts as a filter to spectrally shape the various sounds
Haaa
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Speex Codec Concept
• Excitation Generator – pattern selected by code • Filter - for Linear prediction
-Source S ignal ErrorTune Coeffi cients
Excitati on G eneratorFilter
D ecoder
Filter Coeffi cients
Excitati onCode
Encoded Coeffi cients
Speex A bS - Encoder
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
DSP – Digital Signal Processor
• Multiple arithmetic units executing in parallel
• Dedicated arithmetic operations (MAC etc.)• SIMD (single instruction multiple data)
optimized• Memory streaming optimization (IDMA,
cache)• Hardware controlled looping• Hardware modulo addressing for circular
buffers• Saturation arithmetic
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
TI C64+ DSP
• TI C64+ DSP Highlights
• Up to 8000 MIPS• Fixed-point architecture• 32-bit register size• VLIW architecture – Execute 8 instructions per
cycle• Two parallel data paths• 64 general-purpose registers• 8 functional units (2 Multipliers & 6 ALUs)• Internal DMA
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
TI C64+ DSP
• TI C64+ DSP Block DiagramProject Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
TI C64+ DSP - example
• Paralleling Instructions:Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Optimization process - Profiling
• TI Profiling tool outputProject Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Optimization Process – Selecting functions
• Analyzing the profiling results can show which functions have a greater impact on overall performance.
inner_prod15%
compute_weighted_codebook13%
filter_mem1610%
iir_mem169%
vq_nbest7%
fir_mem165%
split_cb_search_shape_sign_N1
4%
others37%
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Optimization Process – Optimizing methods
• Sample optimization method
• Consider convolution :
• Can be coded like:
𝑦 [𝑛 ]=∑𝑚=1
𝑀
𝑥 [𝑚 ]h[𝑛−𝑚 ]
for (n=0; n<N; n++){
for (m=0; m<M; m++)
{
tempreg = tempreg + x[m] * h[n-m];
}y[n] =
tempreg;}
for (n=0; n<N; n++){
for (m=0; m<M; m++)
{y[n]
= y[n] + x[m] * h[n-m];
}}
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Optimization Results
compute_weighted_codeboo
k$1
filter_mem16 iir_mem16 vq_nbest fir_mem16
Not Opti-mized
48500 10056 8976.001042 6642.522292 14480
Compiler Optimized
17366 6665.010419 5048.68519 1989.522292 8592
Compiler and Manual Optimized
13267 649 448 994 563
5000.00
15000.00
25000.00
35000.00
45000.00
55000.00
Optimized functions
Cycle
s
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
Optimization Results
• Encoder speed-up: 4.74• Decoder speed-up : 3.21
Project Goal
Motivation
Speex
DSP
TI C64+
O. Process
O. Results
nb_encode nb_decode
Not Optimized 71.62196783335 4.91694116665
Compiler Optimized 27.09871116665 2.37464433335
Compiler and Manual Optimized 15.0511385 1.52618583335
5.00
15.00
25.00
35.00
45.00
55.00
65.00
75.00
Average MCPS
MC
PS
Why the hard work?
• 1Ghz TI C64x+ DSP• Before: 13 concurrent voice calls• After: 60 concurrent voice calls
• Addition of 47 calls 460%
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