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第 13 章 中断系统

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第 13 章 中断系统. 本章主要内容. ( 1 )中断及中断处理的基本概念 ( 2 ) 80x86 实模式中断系统 ( 3 )可编程中断控制器 8259A. 13.1 基本概念. 13.1.1 中断的定义 在程序运行时,系统外部、内部或现行程序本身若出现紧急事件,处理器必须立即强行中止现行程序的运行,改变机器的工作状态并启动相应的程序来处理这些事件,然后再恢复原来的程序运行,这一过程称为 中断 。. 13.1.2 中断响应和处理过程. CPU 在执行每条指令的适当时刻,检测中断请求信号。 - PowerPoint PPT Presentation

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  • 13

  • 1280x8638259A

  • 13.1 13.1.1

  • 13.1.2

    CPUCPU

  • 1. CPUINTA2. IPCS

  • 3. CPU4. ()

  • 5. 6.

  • 633()

    PSW

  • 13.1.3 1. CPUpriority

  • PC8259A1 13.1INTRCPU

  • 13.1

  • CPU 13.2

  • 13.2

  • (2) CPUINTA13.3(a)

  • 13.3 (a)

  • 13.3 (b) ()INTR

  • 2. CPUCPU13.4

  • 13.4 STIIRETSTIIRET............

  • 13.2 80x8613.2.1 13.5

  • 13.5 80x86INT n INT 3INTO, OF=1(TF=18259ANMIINTRIRQ0....IRQ7

  • 80386CPU interrupt),exception) 8086256 (fault) (trap) (abort)

  • INT n

  • 13.2.2 interrupt vector4:(IP)(CS)

  • 80x862561K25680x8600000H003FFH1K13.6

  • 13.6 25532312245

    4

    3

    2

    1

    02750000: 03FFH

    0000:007FH0000:007EH

    0000:0014H0000:0013H

    0000:0010H0000:000FH

    0000:000CH0000:000BH

    0000:0008H0000:0007H

    0000:0004H0000:0003H

    0000:0000H0

  • 025527H0000H009CH413.727H8765H:4321H

  • 13.7 87H

    65H

    43H

    21H0000:009FH

    0000:009CH

  • 4CPUN244N(4)IP IP (4N, 4N+1) CS : CS (4N+2, 4N+3)

  • N1N

    13.1 313.8

  • 13.8

  • 13.2 20H00000080H4400000080H= 10H00000081H= 20H00000082H= 30H00000083H= 40H:

  • 13.3 17H2340H:7890H4: 17H40000:005CH0000:005DH0000:005EH0000:005FH4

  • 13.2.3 ,80x86 CPUNMIINTR1. NMIIF208H09H0AH0BH4

  • 2. CPUINTRCPUIF1CPU

    8086

  • 13.9 8086T1 T2 T3 T4 TI TI TI T1 T2 T3 T4CLK____INTAAD7~AD0

  • 13.2.4 CPUINT n(INT 3)INTOINT n

  • (1) INT n 80x86INT nnCPU(2) 0DIV IDIV 0CPU0

  • (3) 4OF1INTO4CPUOF=0INTOINTO INTO13-1

  • 13-1............

    OVERFLOW: PUSH AX PUSH BX PUSH CX PUSH DXADD AX , BX; OF=1 INTO

    POP DXPOP CXPOP BXPOP AX IRET

  • (4) 1CPUTF1CPUCPU1 1CPU

  • (5) (3)

  • INT nINT 3

  • 13.10 ADD AL, BLJMP 201HINC ALCMP AL, 0FFHJL 200H1FCH,1FDH1FEH,1FFH200H201H,202H203H,204H

  • (1) CPUINT nINTA(2) TF10(3)

  • 13.2.5 1.

    13.11

  • 13.11 INTR ____ INTA

    IPCSPSW(FR)CPU Q

    INTRCPUN

    IPCS

    IPCSPSW

    .....STI...IRET

    ...164N4N+2IFTFPSWCSIPIRETIPCSPSWCPUCSIP

  • 2. 80x86 80x8613.12

  • 13.12 80x8680x86INTO,INT n?NMIINTR?TF=1?NNNNTF=1?NYYYYYNNTEMPTFIFTFCSIP(4N4N+1)IP(4N+2,4N+3)CSIPCSNMITEMP=1?YYNNIRET

    INT nINTONMIINTR

  • IF=1IF 1STI

  • 13.12()

  • IF=1TF=1

    DIVIDIV

    FR->,TF->IF,TFCS,IP->(0,1)->IP(2,3)->CS

    FR->,TF->IF,TFCS,IP->(4,5)->IP(6,7)->CS

    ,IRET,CS,IP,FR

    01H

    IRETCSIPFR

    5040H:7060H

    2010H:4030H

    00H

    ....

  • 60704050(FR)30401020(FR)

  • 13.3 8259A (8259A Programmable Interrupt Controller-PIC) Intel 8259A80x86

    8259A86498259A

  • .

  • 13.3.1 8259A2828pin DIP), DIP:Dual-In-line Package ,13.13

  • Chip Select)CPU8259A CPU 8259ACPU CPU 8259ACPU

  • D7~ D0 :D7~ D0 IR7~IR0 :INTCPUINTACPU

  • A08259ACAS2~ CAS0:CASCADELINES3:/8259A1 8259A0P46213.158286 *8259A8259AICW4

  • 13.3.2 8259A8259A13.14

  • 13.14 8259A

  • CPUAD7~AD0INTRISRICW1 OCW1 (IMR)ICW2OCW2ICW3OCW3ICW4PRIRRD7~D0

    ...INTA0CAS0CAS1CAS2...

    IR7IR0 8259A

  • IRRInterrupt Request RegisterPR---Priority ResolverISR---In-Service RegisterIMR---Interrupt Mask RegisterICWs---Initialization Command WordsOCWs---Operation Command Words7CPUICW1 ~ICW4---OCW1~OCW3(). The OCWs can be written into the 8259A anytime after initialization.(P6P7

  • 7: A0

  • 8259AIRR8IR0IR7ISRPR

  • IR0IR7->IRR1->IMR(=1=0)->PR->PR->CPUCPUIF=1CPU (P463 13.16)

  • 13.9 8086T1 T2 T3 T4 TI TI TI T1 T2 T3 T4CLK____INTAAD7~AD0

  • 8259AIRRIR0IR7IRR()ISR1IRR8259A(ICW2)D7D0ICW4AEOI1 ISR 1()(EOI)

  • 13.3.3 8259A1. (1) (FULLY NESTED MODE)IRiIR0()>IR7().This mode is entered after initialization unless another mode is programmed.

  • ISRISn18259A()CPU(EOI)1

  • (2) (SPECIAL FULLY NESTED MODESFNM)8259ICW4SFNM(p464)

  • (3) (AUTOMATIC ROTATION)()IR0->IR7IR0IR0IR1IR2IR3IR4 IR5 IR6 IR7IR0IR4IR4__________________________________OCW2( p466)

    IR0

    IR1

    IR2

    IR3

    IR4

    IR5

    IR6

    IR7

  • (4)(SPECIFIC ROTATION)IR4IR5

  • 2. ()(IMR)1OCW1IMR1*(SPECIAL MASK MODE)P462

  • 3. (END OF INTERRUPTEOI)(1)(AUTOMATICAEOI) ISRAEOIISR08259AIF1()CPU

  • AEOIICW4AEOI(AEOI=1)

  • (2)()8259A(OCW2:EOI=1,SL=0,R=0)MOV AL,20H; OCW2=20H OUT 20H,AL; =20H()ISR10IR0IR7

    10111

  • (3)(SPECIFIC EOISEOI)()ISR()EOISEOIOCW2:EOI=1,SL=1,R=0,L2L0.L2L0ISR

  • 4. IRi

    IRi

    ICW1LTIM

  • 5. (ICW4BUF=1)8259A(8286)8259A ( )ICW4M/S()8259A(ICW4BUF=0)8259A8259A ( ) 8259AICW4BUF0M/S

  • (Polling)8259ACPUCPUIF=0(CPU)CPU8259A(poll command)OCW3:P

    00001100

  • (IN)

    8259AP=1 ISR1 CPUAL

  • 13.3.5 8259A8259AICWICW4OCWOCW38259A(A0 = 0)(A0 = 1)8259A

  • 1. 8259AICWICW4 4(1) ICW1ICW1 (A0 = 0)D4 1ICW OCW1 OCW1 D4 0ICW

  • ICW1

  • IC4 ICW4IC4 = 0ICW4IC4 = 1ICW4SNGL8259ASNGL=0ICW3 SNGL=1ICW3ADI8085CALL80x86LTIMLTIM=0LTIM=1A5A7 808580x86

  • (2) ICWICW2 (A0 = 1)ICWICW

  • A15/T7A14/T6A13/T5A12/T4A11/T3A10A9A81ICW2A0 D7 D6 D5 D4 D3 D2 D1 D0 ICW2

  • 80x86ICWD7D3N5T7T33D2D0;80x86ICW88A15A8

    80x868259ACPU8N5D7D3T7T3ICW3D2D08259AIR0IR7000111

  • : ICW2 28H , CPU IR2AH IR

  • (3) ICWICW

  • ICW3

  • 8259AICW IRi 8259A8259AS10

    IR2IR6 8259AIR8259AICW 01000100

  • 8259AICW ID2ID0 8259A8259AIR

    IR0IR7 ID000111

    8259A8259AIR6 8259AICW ID2=1ID1=1ID0=0

  • (4) ICW480x86ICW4

  • ICW4

  • PMPM = 08080/8085PM = 180x86AEOIAEOI=0EOIAEOI=1EOIBUF8259ABUF=1BUF=0

  • SP/ENM/S8259A8259A8259A8259A()M/S8259AM/S=0M/S=1(BUF=0)M/SSFNMSFNM=0SFNM=1

  • 8259A8259AICWCPUA0

    8259A13.17

  • ICWICW

    ICWSNGL=0ICWICW

    ICWIC4=1ICW480x86ICW4

  • 8259A80x86 CPUICWICWICW4

    ICWICWICWICW4

    8259AOCW

  • 2. 8259A8259AICWICW4OCW1OCW3 8259A

  • (1) OCW1OCW1 8259A(A0=1)OCW1 IMR

  • OCW1

  • M0M7 8259AIR0IR7OCW1 Mi 1IRi

    OCW111110000IR7IR4IR3IR0

  • (2) OCW2OCW2 (A0=0)OCW2

  • OCW2

  • DD= 00OCW2 RR1R0SLOCW2 L2L1L0 SL1SL0EOIEOI1ISR0ICW4 AEOI0ISR1

  • L2L1L0 SL=1RSLEOIL2L1L0 8000111IR0IR7 RSLEOIRSLEOI13-2

  • 13-2 RSLEOI

    RSLEOI001EOI011EOI101EOI111EOI000EOI100EOI110010

  • (3) OCW3OCW3 (A0=0)

  • OCW3

  • D D = 01OCW ESMMSMMESMM0SMMESMM1SMMESMM=1SMM=08259AESMM=SMM=18259A

  • P(Poll Command)P=18259A

  • 8259A13.6 8259A(1) 80x868259A

    (2) 08HIR0IR 08H0FH

    (3)

    8259A20H21H

  • MOV AL13H ICW18259AICW4OUT 20HAL MOV AL08H ICW208HOUT 21HAL MOV AL0DH ICW480x86EOIOUT 21HAL

  • 8259AOCW2=20HMOV AL20H OCW2EOIOUT 20HAL

    8259A

  • 8259A: ()P=1OCW3(IN AL,20H)

    IRROCW3(RR=1,RIS=0)(IN AL,20H)

    ISR:OCW3(RR=1,RIS=1)(IN AL,20H)

    IMR (IN AL,21H)

  • 1IN AL21H IMRAND AL7FH IR7OUT 21HAL

    2IN AL21H IMR

    OR AL80H IR7

    OUT 21HAL

  • 13.3.6 8259A 1. 8259A IBM PC/XT IBM PC/XT 8259A 813.1813-3

  • 13.18 8259AIBM PC/XT

  • 2. 8259A IBM PC/AT IBM PC/XT 7INT 0AH802878 8259A8259AIBM PC/XT8259A8259AINT8259AIR2(PC/XT)CAS0CAS28259ACAS0CAS2 8259ACAS0CAS2

  • IBM PC/AT 28259A13.19:

    IRQ0>IRQ1>IRQ8>IRQ9>IRQ10IRQ15>IRQ3>IRQ4>IRQ5>IRQ6>IRQ7

  • 13.19 8259A IBM PC/AT

  • (1)ALDS:DX AH=25H INT 21H AL= DS:DX=(2)ALES:BX AH=35H INT 21H AL=

    ES:BX=

  • DOS

    MOV AL,N; type N InterruptMOV AH,35H; get Interrupt vectorINT 21H;PUSH ES; save the old base andPUSH BX; offset of interrupt NPUSH DS;MOV AX,SEG INTHAND;MOV DS,AX; base of INTHAND in DSMOV DX, Offset INTHAND; offset in DXMOV AL, N;MOV AH, 25H; Set Interrupt VectorINT 21H;POP DS;

  • POP DX; restore the old offsetPOP DS;and base of interruptMOV AL,N;MOV AH,25H;set interrupt vectorINT 21H;RET ;return

    INTHAND:. Interrupt Processing RoutineIRET

  • DATA SEGMENT MESS DB `THIS IS A IRQ7 INTRUPT !`,0AH,0DH,`$`DATA ENDSCODE SEGMENT ASSUME CS:CODE,DS:DATASTART: MOV AX, CS MOV DS, AX ;set up ds to same as cs MOV DX,OFFSET INT7 MOV AX, 250AH INT 21H IN AL, 21H AND AL, 7FH OUT 21H, AL MOV CX, 10 STIHERE: JMP HERE

  • INT7: MOV AX,DATA MOV DS,AX MOV DX,OFFSET MESS MOV AH,09 INT 21H MOV AL,20H OUT 20H,AL LOOP NEXT IN AL,21H OR AL,80H OUT 21H,AL STI MOV AH,4CH INT 21H NEXT: IRET CODE ENDS END START

  • 13 1. (TF=1)INTR4030H:2080HINTR9080H:3020H.P475 7P475 8 (0BH 0FH)