第 4 章

4.1 CPU /

1 2 3 4

20007 141234

4.1.1 :123

1 8256256

4.1.2. 1. 1 2 3 4

1 2 : 11

2. 2345 I/O

4.1.3 1 2 3 4 5 6

4 CZVS

2.4. /

2.5. CISCRISC CISCRISC

1 2 3 4 5 6 7 8

5 PCPC

8 SPSP SP

SPSP1 SP SP+1SP

2.2 CPU

20017 2 ,( ),( ) A. B. C. D. E. F. H. I. J.CACHE C A

2 1 8 1 2

4.3 4.3.1 1 . 1 2 3 4164

20051116 1234

2.7 8416 8 Am290116

244PCSP16 1664k

2. 16TEC-2000

4A ADDSUBANDORXORTESTMVRRDECINCSHLSHRJRJRCJRNCJRZJRNZ ADCSBBRCLRCRASRNOTCLCSTCEIDITRSJRNSJMPSJMPR BJMPALDRRSTRRPUSHPOPPSHFPOPFMVRDINOUTRETCCALRLDRASTRALDRXSTRXDCALA IRET

ABI/OARI/OCCALRARARD

3. 16 1 A

C Z V S00000000DRSRADD DR,SR2* * * *DRDR+SR00000001DRSRSUB DR,SR2* * * *DRDR-SR00000010DRSRAND DR,SR2* * * *DRDRSR00000011DRSRCMP DR,SR2* * * *DR-SR00000100DRSRXOR DR,SR2* * * *DRDRSR00000101DRSRTEST DR,SR2* * * *DRSR00000110DRSROR DR,SR2* * * *DRDRSR00000111DRSRMVRR DR,SR2. . . .DRSR

3. 16 1 A

C Z V S00001000DR0000DEC DR1* * * *DRDR-100001001DR0000INC DR1* * * *DRDR+100001010DR0000SHL DR1* . . .DRDR*200001011DR0000SHR DR1* . . .DRDR/201000001OFFSETJR ADR1. . . .ADR01000100OFFSETJRC ADR1. . . .C=1 ADR01000101OFFSETJRNC ADR1. . . .C=0 ADR01000110OFFSETJRZ ADR1. . . .Z=1 ADR01000111OFFSETJRNZ ADR1. . . .Z=0 ADR

3. 16 1 B

C Z V S10000000 00000000 ADR16JMPA ADR1. . . .ADR10000001 DRSRLDRR DR,[SR]2. . . .DR[SR]10000010 I/O PORTIN I/O PORT1. . . .R0[I/O,PORT]10000100 DRSRSTRR [DR]SR2. . . .[DR] SR10000100 00000000PSHF0. . . .FLAG10000110 0000SRPUSH SR1. . . .SR 10000110 I/O PORTOUT I/O POR1. . . .[I/O,PORT] R010000111 DR0000POP DR1. . . .DS 10001000 DR0000 DATA16MVRD DATA2. . . .DR DATA10001100 00000000POPF0. . . .FLAG 10001111 00000000RET0. . . .

3. 16 1 D

16R0~R15R416SPR516PCDRSR

C Z V S11001110 00000000 ADR16CALL ADR1. . . .ADR

3. 16 1A

CZVS00100000 DRSRADC DR,SR2* * * *DRDR+SR+C00100001 DRSRSBB DR,SR2* * * *DRDR-SR-C00100010 DR0000RCL DR1* . . .DRDRC00101011 DR0000RCR DR1* . . .DRDRC00101100 DR0000ASR DR1* . . .DRDR01101101 DR0000NOT DR1* * * *DR/DR01100000 0000SRJMPR SR1. . . .SR01100100 OFFSETJRS ADR1. . . .S=1 ADR01100101 OFFSETJRNS ADR1. . . .S=0 ADR01101100 00000000CLC00 . . .C=001101101 00000000STC01 . . .C=101101110 00000000EI0 . . . .INTE 101101111 00000000DI0. . . .INTE 0

3. 16 1C

CZVS11100000 0000SRCALR SR1. . . .SR11000100 DR0000 ADR(16)LDRA DR,[ADR]2. . . .DR[ADR]11100101 DRSR OFFSET(16)LDRX DR,OFFSET[SR]2. . . .DR[OFFSETT+SR]11100110 DRSROFFSET(16)STRX DR,OFFSET[SR]2. . . . [OFFSETT+SR] DR11100111 0000SR ADR(16)STRA [ADR],SR1. . . .[ADR] SRD11101111 0000000IRET0. . . .

4. 1688

18IR15~IR8IR15IR140XA10B11CDIR11CDIR11=0CIR11=1DIR1301IR120IR10~IR8

2165

PSHF CZVSP1P000 POPF RET ] CLC C=0 STC C=1 EI INTE=1 DI INTE=0 IRET

DEC DR DRDR-1 INC DR DRDR+1 SHL DR DR0C SH6 DR DR0C JR ADR ADRADR=PC+OFFSET JRC ADR C=1 ADRADR=PC+OFFSET JRNC ADR C=0 ADRADR=PC+OFFSET JRZ ADR Z=1 ADRADR=PC+OFFSET JRNZ ADR Z=0 ADRADR=PC+OFFSET

IN I/O PORT R0[I/O PORT]I/OR0 OUT I/O PORT [I/O PORT] R0R0I/O PUSH SR POP DR DR

RCL DR DRCCC

RCR DR DRCCC

ASR DRDRC

NOT DR DRDR/DR JMPR SR SR CALR SR SR JSR ADR S=1ADRADR=PC+OFFSET JNSR ADR S=0ADRADR=PC+OFFSET

ADD DRSR DRDR+SR SUB DRSR DRDR-SR AND DRSR DRDR and SR CMP DRSR DRDR-SR XOR DRSR DRDR xor SR TEST DRSR DRDR and SR OR DRSR DRDR or SR MVRR DRSR DRSR LDRR DR[SR] DR[SR] STRR [DR]SR [DR]SR

ADC DRSR DRDR+SR+C SBB DRSR DRDR-SR-C

JMPA ADR ADR CALA ADR ADR

4.3.2 1.1.95A2000 2000 MVRD R17E 2002 MVRD R0 20 OUT 80 R02005 PUSH R0 R02006 IN 81 R02007 SHR R0 R0C2008 JRNC 2006 C12006 POP 80 R0200A CMP R0R1 Z=1200B JRZ 2000 Z=12000200C INC R0 R01200D JR 2004 2000200E RET

2.A~F2031~2036A2020 20002020 MVRD R306 2022 MVRD R2 2030 2024 MVRD R140 2026 INC R2 2007 INC R1 A2028 STRR [R2]R1R1R22029 LDRR R0[R2] R0202A OUT 80 R0202B IN 81 R0202C SHR R0 R0C202D JRNC 202B C12006202E DEC R3 6202F JRNZ 2026 2030 RET

3.A2040 IN 81 R0 SHR RO R0C SHR R0 R0C JRNC 2040 C12040 IN 80 R0 OUT 80 R0 PUSH R0 R0 IN 81 R0 SHR R0 R0C JRNC 2047 C12047204A POP R0 R0R0204B CALA 2050 2050204D JMPA 2040 2040204F RET MVRD R120ASCIIR1 ADD R0R1 OUT 80 R0 RET

2. 1 P131

2 PCA A A

16A 2000 2000 2000 MVRD R00036 6ASCIIR0 2002 OUT 80 680 2003 RET RET 2004

2 ,0910A 2020 MVRD R2, 000A ; MVRD R0, 0030 ;0ASCIIR0 OUT 80 ;R0 DEC R2 ;1 JRZ 202E ;10,, PUSH R0 ;,R0(2028) IN 81 ;, SHR R0 ;R0,C JRNC 2028 ;, POP R0 ;,,R0 INC R0 ;R0ASCII1, JR 2024 ;(202E) RET

3 ,09 ,.A 2040 MVRD R2, 2030 ; MVRD R3, 0039 ;(2044) IN 81 ; SHR R0 ;R0,C SHR R0 ; JRNC 2044 ; IN 80 ;R0 MVRD R1, 00FF ; AND R0, R1 ;R00 CMP R0, R2 ;9 JRC 2053 ;, OUT 80 ; JMPA 2044 ; (2053) RET

4 ,110.A 2060 MVRD R1, 0000 ;0 MVRD R2, 000A ; SUB R3, R3 ;0(2065) INC R3 ; ADD R1, R3 ; CMP R3, R2 ; JRNZ 2065 ; RET

5 ,,,.E 20F0 (6A~FASCII20F0) 41,42,43,44,45,46A 2080 MVRD R3, 0006 ; MVRD R2, 20F0 ;(2084) LDRR R0, [R2] ;R0 CALL 2100 ;,2100, ; DEC R3 ; JRZ 208B ; INC R2 ; JR 2084 ;2084,

5 ,,,.

A 2100 OUT 80 ;R0 MVRD R1 0020 ;R0 ADD R0, R1 ; STRR [R2], R0 ;R0,LDRR(2105) IN 81 ; SHR R0 ; JNRC 2105 ; RET

(3) 4.3.3 Pentium II4.4.4 Ultra SPARC II

4.4 3.4.1

200512114PC2PCIR

4.4.2 12ALU3

4.4.2 4CPUINOUTI/O

2000 0001 ADD R0R1 R02001 0720 MVRR R2R0 2002 8890 2008 MVRD R9, 2008 R92004 8392 STRR [R9], R2 R2R92005 8280 IN, 80 ()R02006 4409 JRC 20 C1,20002007 8F00 RET ;,RET,

:

PCIRPC

ADD R0R11ARPC, PC PC+1 ;, 2IR 3R0R0+R1

MVRR R9R0 1ARPC, PC PC+1 2IR PCPC+1 3R0R0+0

MVRD R920081ARPCPCPC+12IR3AR PC PCPC+1 4R9

STRR [R9]R21ARPCPCPC+12IR3ARR9+0 4R2+0 R9AR R2

IN 801ARPC PCPC+12IR3ARI/O PORT I/O4 R0 R0 +0

JRC 201ARPC PCPC+12IR3C=1PC +IR PC

RET1ARPC PCPC+12IR3AR SP SP SP+1 4PC PC

20007 2 SUB R3R21 ARPC PCPC+1 IR R3R3R22 ARPC PCPC+1 IR ARSP1 PC PC

20017 1 (), (1) DR SR (2) DR SR

(1) DR SR1 ARPC PCPC+1 IR R3R3 R2

(2) DR SR ARPC PCPC+1 IR AR() SR , DR

26. ADD R0,R11 ADD R0R1R0R1 ARPC PCPC+1 IR R3R3R2 2PCALUALU ALUPC

4.5 4.5.1

4.5.2 1. 1

20007 320011 3 55112345

2. Am2901

1Am2910 AM290112124096 4 a. /R/C b. D11~D0 c. PC d. F

Am2910

/ 12D a. b. 1NN+1 1212PC a. PC Y+1CI=1 b. PCY PC Y CI=0

Am2910

512SP a. b. 5

Am2910

3 I3~I0 3/PL /MAP/VECT3D /PL 0D /MAP 0DMAPROM /VECT 0D

Am2910

2Am2910D11~D0 /Y I3~I0 16/CCEN

/CC /CCEN=0/CC=1/CCEN=1/CC=0 /CCEN/CC=0/CC=1

Am2910

/PLD /0 D11~D0/CI CI=1 PC Y+1CI=0 PCY/OE Y/OE=0Y /OE=1YCP

Am2910

Y11~Y0 /FULL /PL/MAP/VECT

Am2910

3 Am2910 Am2910

R/CR/C/CCEN=0/CC/CCYY0//PL002//MAPD/D/3//PLPC/D/14//PLPC/PC

0Y 0 02 /MAPD MAPROMY 3/CC=0DY/CC=1PC PC+114

4.5.3 TEC-2000

/OE/OETEC-39CMAm2910CI3~CI0/MAP/VECT8CP/PLIR15~IR8MAPROMCCSCCCP

1Am2910 /OEY11~Y0/CCENAm2910/CCCI1/MAP/PLMAPROMAm2910DD Am2910MAPROM/CCSCC

2 MAPROM 28C64MAPROM MAPROMIRIR15~IR8 MAPROM/OEAm2910/MAPAm29102MAPROM

3GAL20V8SCC GAL1Am2910 RESETSCC CLRCI3~CI0=000000h2Am2910/CC SCC3~SCC0CZVSCC

4 CM 728C64(88192)ROM Am2910Y7~Y0A7~A07D7~D05653 5 PLR

9TEC-398/OE/CC()CMPLRAm2910GAL20V8CI3~CI0CP/CCEN/PL/MAP/VECT8CP/PL

Am2901

Am2901 SST0,1,RAM0Q0,RAM15 FLAG GALCZVSSHIFT GALSSH0CQ15

SHIFT GALSSH0CCyRAM0 SHIFT GALSCi01C

CyF=0OVRF15

16

RAM15 Q15RAM0Q0Y15~0D15~0BAI8~I0CinCP

4A4B33I8~I6I5~I3I2~I0I8~I6

I8 I7 I6QY0 0 0FQF0 0 1F0 1 0FBA0 1 1FBF1 0 0F/2BQ/2QF1 0 1F/2BF1 1 02FB2QQF1 1 12FBF

I5~I3

I5 I4 I30 0 0R+S0 0 1S-R0 1 0R-S0 1 1RS1 0 0RS1 0 1RS1 1 0RS1 1 1RS

I2~I0

I2 I1 I0RS0 0 0AQ0 0 1AB0 1 00Q0 1 10B1 0 00A1 0 1DA1 1 0DQ1 1 1D0

37GAL20V8

3SSTALU

SST2 SST1 SST0 C Z V S0 0 0 C Z V S40 0 1 Cy F=0 OVR F15ALU0 1 0 0 1 1 0 Z V SC031 0 0 1 Z V SC131 0 1 RAM0 Z V S31 1 0 RAM15Z V S31 1 1 Q0 Z V S3

37GAL20V8

2SCI

CinSCI1 SCI00 0ADDSUB00 1INCDEC11 0ADCSBBC

37GAL20V83

SSH RAM0 Q0 RAM15 Q15 0 0 0 0 0 1 C C C 1 0 Q15 / F15 C y RAM0 1 1 F15 RAM0OVR

2I/O3/

/ MIOREQ/ WE000001010I / O011I / O1

3CPU3DC1

DC1 000/ SWTOIBCPU001/ RTOIBALUCPU010/ ETOIB16IR011/ FTOIB100/ STOIB16101/INTVH16110/ INTV111/ DI

4CPU3DC2

DC2 000NC001/ GIR010/ GAR011/INTR100/INTN110/EI111/DI

33 24 I/O3 3 3

18Am2910D/PL

R/CR/C/CCEN=0/CC/CCYY0//PL002//MAPD/D/3//PLPC/D/14//PLPC/PC

(2) CI3~CI0 :Am2910CI3~CI04

CI3~CI0Am290116000008SCC0010MAPROM11100011SCC8

CI3 CI2 CI1CI00 0 0 00 0 1 0MAPROM0 0 1 11 1 1 0

3SCC3~SCC0Am2910/CC

316

SCC3 SCC2 SCC1 SCC0CI3~CI0=0011 /CC=0000000010/INT=00100JRCJRNCJRZ JNRZ0101JRSJRNS 0110IRH2=00111IRH0=1

4SASBABA3~A0B3~B0

24 I/O3 3 3 16 AB251

SA SBAB0 0AB1 1IRSRIRDR

5133164351

CI3~CI0,SCC3~SCC00, /MIO,REQ, /WE,0,I2~I0SA,I8~I6,SB,I5~I3882, 88

A3~A0, B3~B00, SST,SSH, SCI0, DC2, DC181, 78

3. 16TEC-200016 ()

ACPUBI/OD44

000PC008ROM01,0203

216

1ADD DR, SR0000 000004A2SUB DR, SR0000 0001 05A3AND DR, SR0000 0010 06A4OR DR, SR0000 011007A5XOR DR, SR0000 010008A6CMP DR, SR0000 001109A7TEST DR, SR0000 01010AA8MVRR DR, SR0000 01110BA9INC DR0000 10010CA10DEC DR0000 10000DA11SHL DR0000 10100EA12SHR DR0000 10110FA13JRC OFFSET0100 010010A14JRNC OFFSET0100 011010A

216

15JRZ OFFSET0100 010010A16JRNZ OFFSET0100 011110A17JR OFFSET0100 000111A18IN PORT1000 001012B19OUT PORT1000 0010 12B20PSHF1000 0100 15B21PUSH SR1000 010115B22POP DR1000 011117B23POPF1000 110017B24STRR [DR], SR1000 001119B25LDRR DR, [SR]1000 00011BB26MVRD DR, DATA1000 10001DB27JMPA ADR1000 00001EB28CALA ADR1100 11100EC29RET1000 111023B

AA1212 04~0FBD4

4. P1664.61R0R0+R1 ADD R0, R11 I2~I0001 I5~I3000 I8~I6011010 SST001 SCI00 SSH00 SASB1

I2 I1 I0RS0 0 0AQ0 0 1AB0 1 00Q0 1 10B1 0 00A1 0 1DA1 1 0DQ1 1 1D0


I8 I7 I6 QY0 0 0FQF0 0 1F0 1 0FBA0 1 1FBF1 0 0F/2BQ/2QF1 0 1F/2BF1 1 02FB2QQF1 1 12FBF

Am2901

SST2 SST1 SST0 C Z V S0 0 0 C Z V S40 0 1 Cy F=0 OVR F15ALU0 1 0 0 1 1 0 Z V SC031 0 0 1 Z V SC131 0 1 RAM0 Z V S31 1 0 RAM15Z V S31 1 1 Q0 Z V S3


CinSCI1 SCI00 0ADDSUB00 1INCDEC11 0ADCSBBC


SSH RAM0 Q0 RAM15 Q15 0 0 0 0 0 1 C C C 1 0 Q15 / F15 C y RAM0 1 1 F15 RAM0 OVR


SA SBAB0 0AB1 1IRSRIRDR

4. P1664.61R0R0+R1 ADD R0, R11 /MIO1,REQ/W

/ MIOREQ/ WE000001010I / O011I / O1

4. P1664.61R0R0+R1 ADD R0, R11 /MIO1,REQ/W

DC2 000NC001/ GIR010/ GAR011/INTR100/INTN110/EI111/DI

4. P1664.61R0R0+R1 ADD R0, R11/MIO1,REQ/W, IB.()

4. P1664.61R0R0+R1 ADD R0, R11 /MIO1,REQ/W , 30

4. P1664.61R0R0+R1 ADD R0, R11 /MIO1,REQ/W , 30 CI3~CI00011

CI3 ~CI00 0 0 00 0 1 0MAPROM0 0 1 11 1 1 0

4. P1664.61R0R0+R1 ADD R0, R11 /MIO1,REQ/W , 30 CI3~CI00011 SCC3~SCC00000

SCC3 SCC2 SCC1 SCC0CI3~CI0=0011 /CC=0000000010/INT=00100JRCJRNCJRZ JNRZ0101JRSJRNS 0110IRH2=00111IRH0=1

4. P1664.61 OR R0, R11 I2~I0001 I5~I3011 I8~I6011010 SST001 SCI00 SSH00 SASB1


4. P1664.61 AND R0, R11 I2~I0001 I5~I3100 I8~I6011010 SST001 SCI00 SSH00 SASB1


ADD DRSR

3 PCIR

20031 639 1

200474 A B C D

B

200414 A B C D

C

2.6. PCIR

4.6.1 DBOPPCABCB.+1

20007 4. ?:4 1PC2IR3 4

Am290124 IR

4.6.2 TEC-2000 1. 1612 Am290116R4SPR5PC14 1664K

Am2901

GAL1GAL20V8GAL2GAL20V8GAL5GAL20V8GAL7GAL20V8(5)(8)MACH4GAL3GAL20V8GAL4GAL6

PC Am2901R5 IR8 5 MACH4 GAL20V87

MACH4 75GAL20V8 IR

2. 164PC12

TEC-2000ABCD1AADDSUBORXORCMPMVRRINCDECSHRSHLJRJRCJRNCJRZJRNZ2BLDRRSTRR PUSH POPPSHFPOPFMVRDINOUTJMAPRETI/O2168I/O

TEC-2000ABCD3C CALRSRSR LDRA DR[ADR] DR[ADR] LDRX DROFFSET[SR] DR[OFFSET+SR] STRX DROFFSET[SR] [OFFSET+SR] DR STRA [ADR]SR [ADR] SR}443CALRPCPC

TEC-2000ABCD4 DDCALA ADR ADRDIRET 4

16TEC-2000

TEC-2000410000PCRESETROM00000010 CPU

TEC-2000A0011AADDSUBORXORCMPMVRRINCDECSHRSHLJRJRCJRNCJRZJRNZ

TEC-2000B01100100IOBLDRRSTRR PUSH POPPSHFPOPFMVRDINOUTJMAPRETI/O2168I/O

TEC-2000C0110011101013C CALRSRSR LDRA DR[ADR] DR[ADR] LDRX DROFFSET[SR] DR[OFFSET+SR] STRX DROFFSET[SR] [OFFSET+SR] DR STRA [ADR]SR [ADR] SR}443CALRPCPC

TEC-2000D01100100011101014DCALA ADR ADRDIRET 4

TEC-2000001101100111IO01000101IO00000010PC

21423AAABCD

3. 161

3. 16133P1814.7

3. 1621010

3. 162

20031 7 39 aCPU b c2

aCPU CPUb c2

20011 2 12

20011 4 1 2

20017 2 ,[TIMING]( ),( ),,( ) A. B. C. D. E. F. G. H. I. J. K. L. L B H

20027 39

20021 11.303037

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第 4 章