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________________________________________________________________ Maxim Integrated Products 1
MAX15041
IN
INPUT12V
BSTOUTPUT
1.8V AT 3A
LX
PGND
FB
COMP
EN
VDD
PGOOD
PGOOD SS
SGND
19-4815; Rev 2; 9/10
PART TEMP RANGEPIN-
PACKAGETOP
MARK
MAX15041ETE+ -40°C to +85°C 16 TQFN-EP* AGV
*
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VIN = 12V, CVDD = 1μF, CIN = 22μF, TA = TJ = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.
Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceedthe IC’s package power dissipation.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to china.maxim-ic.com/thermal-tutorial.
IN to SGND.............................................................-0.3V to +30VEN to SGND.................................................-0.3V to (VIN + 0.3V)LX to PGND ................................-0.3V to min (+30V, VIN + 0.3V)LX to PGND .....................-1V to min (+30V, VIN + 0.3V) for 50nsPGOOD to SGND .....................................................-0.3V to +6VVDD to SGND............................................................-0.3V to +6VCOMP, FB, SS to SGND..............-0.3V to min (+6V, VDD + 0.3V)BST to LX .................................................................-0.3V to +6VBST to SGND .........................................................-0.3V to +36VSGND to PGND ....................................................-0.3V to +0.3VLX Current (Note 1) ....................................................-5A to +8AConverter Output Short-Circuit Duration ...................Continuous
Continuous Power Dissipation (TA = +70°C)16-Pin TQFN (derate 14.7mW/°C above +70°C)Multilayer Board .........................................................1666mW
Package Thermal Resistance (Note 2)θJA.................................................................................48°C/WθJC ..................................................................................7°C/W
Operating Temperature Range ..........................-40°C to +85°CJunction Temperature .....................................................+150°CStorage Temperature Range ............................-65°C to +150°CLead Temperature (soldering, 10s) .................................+300°CSoldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STEP-DOWN CONVERTER
Input-Voltage Range VIN 4.5 28 V
Quiescent Current IIN Not switching 2.1 4 mA
VEN = 0V, VDD regulated by internalLDO
2 12Shutdown Input Supply Current
VEN = 0V, VIN = VDD = 5V 18 28
μA
ENABLE INPUT
EN Shutdown Threshold Voltage VEN_SHDN VEN rising 1.4 V
EN Shutdown Voltage Hysteresis VEN_HYST 100 mV
VEN_LOCK VEN rising 1.7 1.95 2.15 VEN Lockout Threshold Voltage
VEN_LOCK_HYST 100 mV
EN Input Current IEN VEN = 2.9V 2 5.3 9 μA
POWER-GOOD OUTPUT
PGOOD Threshold VPGOOD_TH VFB rising 540 560 584 mV
PGOOD Threshold Hysteresis VPGOOD_HYST 15 mV
PGOOD Output Low Voltage VPGOOD_OL IPGOOD = 5mA, VFB = 0.5V 35 100 mV
PGOOD Leakage Current IPGOOD VPGOOD = 5V, VFB = 0.7V 10 nA
ERROR AMPLIFIER
Error AmplifierTransconductance
gMV 1.6 mS
Error Amplifier Voltage Gain AVEA 90 dB
FB Set-Point Accuracy VFB 600 606 612 mV
VFB = 0.5V -100 +100FB Input Bias Current IFB
VFB = 0.7V -100 +100nA
_______________________________________________________________________________________ 3
Note 3: Specifications are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed bydesign and characterization.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SS Current ISS VSS = 0.45V, sourcing 4.5 5 5.5 μA
SS Discharge Resistance RSS ISS = 10mA, sinking, VEN = 1.6V 6 Ω
SS Prebiased Mode Stop Voltage 0.65 V
Current Sense to COMPTransconductance
GMOD 9 S
COMP Clamp Low VFB = 0.7V 0.68 V
PWM Compensation Ramp Valley 830 mV
PWM CLOCK
Switching Frequency fSW 315 350 385 kHz
Maximum Duty Cycle D 90 %
Minimum Controllable On-Time 150 ns
INTERNAL LDO OUTPUT (VDD)
VDD Output Voltage VDD IVDD = 1mA to 25mA, VIN = 6.5V 4.75 5.1 5.5 V
VDD Short-Circuit Current VIN = 6.5V 30 80 mA
LDO Dropout Voltage IVDD = 25mA, VDD drops by -2% 250 600 mV
VDD Undervoltage LockoutThreshold
VUVLO_TH VDD rising 4 4.25 V
VDD Undervoltage LockoutHysteresis
VUVLO_HYST 150 mV
POWER SWITCH
High-side switch, ILX = 1A 170 305LX On-Resistance
Low-side switch, ILX = 1A 105 175mΩ
High-Side Switch SourceCurrent-Limit Threshold
5 6 7.2 A
Low-Side Switch SinkCurrent-Limit Threshold
-3 A
VBST = 33V, VIN = VLX = 28V 10LX Leakage Current
VBST = 5V, VIN = 28V, VLX = 0V 10nA
BST Leakage Current VBST = 33V, VIN = VLX = 28V 10 nA
THERMAL SHUTDOWN
Thermal-Shutdown Threshold Rising +155 °C
Thermal-Shutdown Hysteresis 20 °C
HICCUP PROTECTION
Blanking Time16 x Soft-Start Time
ELECTRICAL CHARACTERISTICS (continued)(VIN = 12V, CVDD = 1μF, CIN = 22μF, TA = TJ = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 3)
4 _______________________________________________________________________________________
EFFICIENCY vs. LOAD CURRENTM
AX15
041
toc0
1
LOAD CURRENT (A)
EFFI
CIEN
CY (%
)
2.52.01.51.00.5
55
60
65
70
75
80
85
90
95
100
500 3.0
VOUT = 5.0V
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 12V
EFFICIENCY vs. LOAD CURRENT
MAX
1504
1 to
c02
LOAD CURRENT (A)
EFFI
CIEN
CY (%
)
2.52.01.51.00.5
55
60
65
70
75
80
85
90
95
100
500 3.0
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 5V
OUTPUT-VOLTAGE REGULATIONvs. LOAD CURRENT
MAX
1504
1 to
c03
LOAD CURRENT (A)
OUTP
UT-V
OLTA
GE R
EGUL
ATIO
N (%
)
2.52.01.51.00.5
-1.0
-0.8
-0.6
-0.4
-0.2
0
0.2
-1.20 3.0
LOAD-TRANSIENT WAVEFORMSMAX15041 toc04
VOUTAC-COUPLED200mV/div
ILOAD2A/div
VPGOOD5V/div
200μs/div
NORMALIZED OUTPUT VOLTAGEvs. TEMPERATURE
TEMPERATURE (NC)
NORM
ALIZ
ED O
UTPU
T VO
LTAG
E
603510-15
0.996
0.997
0.998
0.999
1.000
1.001
1.002
0.995-40 85
MAX
1504
1 to
c05
ILOAD = 0A
NORMALIZED OUTPUT VOLTAGEvs. TEMPERATURE
MAX
1504
1 to
c06
TEMPERATURE (NC)
NORM
ALIZ
ED O
UTPU
T VO
LTAG
E
603510-15
0.994
0.996
0.998
1.000
1.002
1.004
0.992-40 85
ILOAD = 2A
(VIN = 12V, VOUT = 3.3V, CVDD = 1μF, CIN = 22μF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
FB SET POINT vs.TEMPERATURE
MAX
1504
1 to
c07
TEMPERATURE (NC)
FB S
ET P
OINT
(mV)
603510-15
602
604
606
608
610
600-40 85
SWITCHING FREQUENCYvs. INPUT VOLTAGE
MAX
1504
1 to
c08
INPUT VOLTAGE (V)
FREQ
UENC
Y (k
Hz)
325
335
345
355
365
375
385
3152520151050
TA = +85NC
TA = +25NC
TA = -40NC
_______________________________________________________________________________________ 5
INPUT SUPPLY CURRENTvs. INPUT VOLTAGE
MAX
1504
1 to
c09
INPUT VOLTAGE (V)
INPU
T SU
PPLY
CUR
RENT
(mA)
252015105
11
12
13
14
15
16
100
L = 4.7FHILOAD = 0A
SHUTDOWN CURRENTvs. INPUT VOLTAGE
MAX
1504
1 to
c10
INPUT VOLTAGE (V)
SHUT
DOW
N CU
RREN
T (F
A)
1
2
3
4
5
6
7
8
9
10
02520151050
SHUTDOWN CURRENTvs. TEMPERATURE
MAX
1504
1 to
c11
TEMPERATURE (NC)
SHUT
DOW
N CU
RREN
T (F
A)
603510-15
1.5
2.0
2.5
3.0
3.5
4.0
1.0-40 85
SHUTDOWN WAVEFORMSMAX15041 toc12
VOUT2V/div
VEN5V/div
IL2A/div
VPGOOD5V/div
100μs/div
OUTPUT SHORT-CIRCUIT WAVEFORMSMAX15041 toc13
IIN5A/div
VOUT2V/div
IL5A/div
VSS2V/div
10ms/div
SWITCHING WAVEFORMSMAX15041 toc14
IL2A/div
VLX10V/div
VOUTAC-COUPLED50mV/div
1μs/div
(VIN = 12V, VOUT = 3.3V, CVDD = 1μF, CIN = 22μF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
SOFT-START WAVEFORMSMAX15041 toc15
IL2A/div
VEN5V/div
VOUT2V/div
VPGOOD5V/div
400μs/div
6 _______________________________________________________________________________________
(VIN = 12V, VOUT = 3.3V, CVDD = 1μF, CIN = 22μF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
STARTUP INTO PREBIASED OUTPUTMAX15041 toc17
IL2A/div
VEN5V/div
VOUT2V/div
IOUT2A/div
400μs/div
STARTUP INTO PREBIASED OUTPUTMAX15041 toc18
IL5A/div
VEN5V/div
VOUT2V/div
IOUT5A/div
400μs/div
MAXIMUM LOAD CURRENTvs. AMBIENT TEMPERATURE
MAX
1504
1 to
c19
AMBIENT TEMPERATURE (NC)
MAX
IMUM
LOA
D CU
RREN
T (A
)
75655545352515
2.2
2.4
2.6
2.8
3.0
3.2
2.05 85
VIN = 5VTJ P +150NC
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
VOUT = 1.2V
SOFT-START TIMEvs. CAPACITANCE
MAX
1504
1 to
c16
CSS (nF)
SOFT
-STA
RT T
IME
(ms)
10010
1
10
100
1000
0.11 1000
_______________________________________________________________________________________ 7
(VIN = 12V, VOUT = 3.3V, CVDD = 1μF, CIN = 22μF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
DEVICE POWER DISSIPATIONvs. LOAD CURRENT
MAX
1504
1 to
c22
LOAD CURRENT (A)
POW
ER D
ISSI
PATI
ON (W
)
2.52.01.51.00.5
0.5
1.0
1.5
2.0
2.5
3.0
00 3.0
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 12V
DEVICE POWER DISSIPATIONvs. LOAD CURRENT
MAX
1504
1 to
c23
LOAD CURRENT (A)
POW
ER D
ISSI
PATI
ON (W
)
2.52.01.51.00.5
0.5
1.0
1.5
2.0
2.5
3.0
00 3.0
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 5V
MAXIMUM LOAD CURRENTvs. AMBIENT TEMPERATURE
MAX
1504
1 to
c20
AMBIENT TEMPERATURE (NC)
MAX
IMUM
LOA
D CU
RREN
T (A
)
75655545352515
2.2
2.4
2.6
2.8
3.0
3.2
2.05 85
VIN = 12VTJ P +150NC
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
MAXIMUM LOAD CURRENTvs. AMBIENT TEMPERATURE
MAX
1504
1 to
c21
AMBIENT TEMPERATURE (NC)M
AXIM
UM L
OAD
CURR
ENT
(A)
75655545352515
2.2
2.4
2.6
2.8
3.0
3.2
2.05 85
VIN = 28VTJ P +150NC
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
VOUT = 1.2V
8 _______________________________________________________________________________________
15
16
14
13
*EXPOSED PAD, CONNECT TO SGND.
*EP
6
5
7
PGOO
D
COM
P
8
V DD
LX BST
LX
1 2
PGND
4
12 11 9
IN
IN +
I.C.
SGND
SS
FB
MAX15041
ENLX
3
10
PGND
TQFN
TOP VIEW
1 VDD
2 PGOOD
3 EN
4 COMP
5 FB
6 SS
7 SGND
8 I.C.
9 BST
10, 11, 12 LX
13, 14 PGND
15, 16 IN
— EP
μ
μ
_______________________________________________________________________________________ 9
ENABLE CONTROLAND THERMAL
SHUTDOWN
CONTROLLOGIC ANDSINK LIMIT
5V LDO
UVLOCOMPARATOR
CURRENT-SENSE/CURRENT-LIMITAMPLIFIER
4V
VDD
LX
VDD
BIASGENERATOR
0.65V
EN
VOLTAGEREFERENCE
STRONG PREBIASCOMPARATOR
PWMCOMPARATOR
ERRORAMPLIFIER
OSCILLATOR
MAX15041
N
N
PGND
LX
IN
BST
VDD
PGOOD
0.606V
5μA
0.560V RISING,0.545V FALLING POWER-GOOD
COMPARATOR
N
Σ
SS
FB
SS
COMP
SGND
10 ______________________________________________________________________________________
Ω Ω
—
______________________________________________________________________________________ 11
μ
Δ
μ
°
°
Ω ΩΩ
R RVVOUT
FB1 2 1= × −
⎛
⎝⎜⎞
⎠⎟
12 ______________________________________________________________________________________
Δ
VV
R I
IG
R GOUT
COMP
LOAD L
L
MOD
LOAD MOD=×
⎛
⎝⎜⎞
⎠⎟
= ×
V R IOUT LOAD L= ×
I G VL MOD COMP= ×
Rf CESR COUTSW OUT
_ >>× ×
18
Rf CESR COUTSW OUT
_ <<× ×
18
ΔVV
f LVV
ROUTOUT
SW
OUT
INESR COUT=
×× −⎛
⎝⎜⎞
⎠⎟× +1
1_ 88 × ×
⎛
⎝⎜⎞
⎠⎟f CSW OUT
CI
f VVVIN
LOAD
SW IN RIPPLE
OUT
IN=
××
Δ _
I I I I IL PK LOAD L HSCL MIN L SAT_ _ _min( , )= + × <12
Δ
LV
f IVV
OUT
SW L
OUT
IN=
×× −⎛
⎝⎜⎞
⎠⎟Δ1
______________________________________________________________________________________ 13
f f f f fP P Z Z P1 2 1 2 3< < < ≤
fg
Cf
C ESRPMV
A dBC
POUTVEA
1 20 22 10
12
=× ×
=×[ ]π π/ ++( )
=×
=×
=
R
fC R
fC R
f
LOAD
PCC C
ZC C
Z
3 1
2
12
12
1
π π
22π ×C ESROUT
VV
AsC R
sCAg
FB
OUTVEA
C C
CVEA
MV
= ×+( )
⎛⎝⎜
⎞⎠⎟
+
1
11 1
1
⎡
⎣⎢
⎤
⎦⎥ × +( )
× ×+( )
sC R
G RsC ESR
CC C
MOD LOADOUT
ssC ESR ROUT LOAD+( ) +⎡⎣ ⎤⎦1
α =× +( )
+( ) +( ) +⎡⎣ ⎤⎦ ×R sC R
s C C R R s COUT C C
C CC C OUT
1
1 CC CC C OUT
MOD LOADO
C R R
G RsC
|| ||( )( ) +⎡⎣ ⎤⎦
= × ×
1
β UUT
OUT LOAD
ESR
sC ESR R
RR
+( )+( ) +⎡⎣ ⎤⎦
=
1
1
2
1 ++× × ×
RAR
VEA
OUT2α β
L0
QHS
CONTROLLOGIC
VCOMP VOUT
PWMCOMPARATOR
COMP
RCROUTgMV
VIN
POWER MODULATOROUTPUT FILTER
AND LOAD
NOTE: THE GMOD STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OFTHE INDUCTOR INJECTED INTO THE OUTPUT LOAD. THIS REPRESENTS ASIMPLIFICATION FOR THE POWER MODULATOR STAGE DRAWN ABOVE.
ERROR AMPLIFIERFEEDBACKDIVIDER
COMPENSATIONRAMP
gMC
DCR
ILQLS
VOUT
VOUT
IL
ESR
COUT
RLOAD
CC
REF *CCC IS OPTIONAL.
ROUT = AVEA/gMV
*CCC
FBR1
R2
GMOD
Σ
14 ______________________________________________________________________________________
ω π
≤
≈
RVV
f C ESR R
g GCOUT
FB
CO OUT LOAD
MV MOD= ×
× × × +( )× ×
2π
RRLOAD
1
12
= × × × ×
×× × ×
VV
g R G R
f C ES
FB
OUTMV C MOD LOAD
CO OUTπ RR RLOAD+( )
1ST ASYMPTOTEVFB x VOUT -1 x 10AVEA[dB]/20 x GMOD x RLOAD
2ND ASYMPTOTEVFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD
3RD ASYMPTOTEVFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD x (COUT(ESR + RLOAD))-1
4TH ASYMPTOTEVFB x VOUT -1 x gMV x RC x GMOD x RLOAD x (COUT(ESR + RLOAD))-1
5TH ASYMPTOTEVFB x VOUT -1 x gMV x RC x GMOD x (ESR || RLOAD)
6TH ASYMPTOTEVFB x VOUT -1 x gMV x (CCC)-1 x GMOD x (ESR || RLOAD)
UNITY
GAIN
RAD/S
3RD POLE(CCCRC)-1
2ND ZERO(COUTESR)-1
1ST ZERO(CCRC)-1
2ND POLE(COUT(ESR + RLOAD))-1
1ST POLEgMV x (10AVEA[dB]/20 CC)-1 CO
______________________________________________________________________________________ 15
μ
°
°
C CV I
I I VSS OUTOUT SS
HSCL MIN OUT FB>> ×
×
− ×( )_
CI t
VSSSS SS
FB=
×
Cf RCCSW C
=× ×
22π
fC R
fP
CC C
SW3
12 2
=×
=π
CC ESR
RCCOUT
C=
×
12
123 2π π×
= = =×C R
f fC ESRCC C
P ZOUT
Cf RCCO C
≥× ×
52π
fC R
fZ
C C
CO1
12 5
=×
≤π
RVV
f Cg GC
OUT
FB
CO OUT
MV MOD= ×
× ×
×
2π
16 ______________________________________________________________________________________
VOUT (V) L (μH) CC (nF) RC (kΩ) R1 and R2
5.0 4.7 8 2.70
3.3 4.7 12 1.80
2.5 3.3 22 1.50
1.8 2.2 33 1.00
1.2 2.2 47 0.68
Select R2 so that:5kΩ ≤ R2 ≤ 50kΩ
Calculate R1 using the equation in theSetting the Output Voltage section.
MAX15041
IN
EN L4.7μH
D
RBST47Ω
INPUT4.5V TO 28V
BST
OUTPUT = 3.3VLX
PGND
FB
COMP
RPU10kΩ
CVDD1μF
CBST10nF
COUT22μF R1
45.3kΩ1%
R210.0kΩ1%
RC1.8kΩ
CC12nF
CCC100pF
CIN47μF
CSS0.01μF
VDD
PGOODPGOOD
SS
I.C. SGND
PROCESS: BiCMOS china.maxim-ic.com/packages
______________________________________________________________________________________ 17
16 TQFN-EP T1633+4 21-0136 90-0031
0 7/09 —
1 3/10 1, 2, 3, 8, 11–14,16, 17
2 9/10 2, 17, 18
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products
MAX15041 低成本、3A、4.5V至28V输入、350kHz PWM降压型DC-DC调节器,内置开关 - 概述
http://china.maxim-ic.com/datasheet/index.mvp/id/6260[2010-12-14 7:49:36]
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MAX15041 低成本、3A、4.5V至28V输入、350kHz PWM降压型DC-DC调节器,内置开关
内置开关的低成本、3A、DC-DC调节器,理想用于低功率电源
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状况 状况:生产中。
概述 数据资料
MAX15041是低成本、内置开关的同步DC-DC转换器,可提供高达3A的输出电流。MAX15041工作在4.5V至28V输入电压范围,提供0.606V至VIN的90%的可调输出电压,可由两个外部电阻设置。MAX15041理想用于分布式电源、预稳压、机顶盒、电视以及其它消费类电子应用。
MAX15041具有峰值电流模式PWM控制器,采用内部固定350kHz开关频率工作,且具有90%最大占空比。电流模式控制架构简化了补偿设计,并可保证逐周期限流,快速响应输入电源及负载瞬变。高增益跨导误差放大器允许使用II类补偿方案,便于外部补偿,可支持全陶瓷电容设计。
同步降压型调节器具有内部MOSFET,可提供比异步方案更高的效率;与分立式控制器方案相比大大简化了设计。为便于设计,采用内置MOSFET降低EMI并减小电路板尺寸,通过减少外部元件数量提供更高的可靠性。
MAX15041还具有热关断和过流保护功能(高边源出电流、低边吸入电流),带有欠压锁定功能的内置5V LDO。此外,该器件上电进入预置输出,确保安全启动。
其它特性包括外部可调的软启动,可逐渐增大至输出电压并减小浪涌电流。独立的使能控制和电源就绪信号允许灵活的电源排序。
MAX15041采用节省空间的大功率、3mm x 3mm、16引脚TQFN-EP封装,工作在-40°C至+85°C温度范围。
完整的数据资料
英文 下载 Rev. 2 (PDF, 1.4MB)
中文 下载 Rev. 2 (PDF, 920kB)
现备有评估板:MAX15041EVKIT
关键特性 应用/使用高达3A的连续输出电流工作温度范围内保持±1%输出精度4.5V至28V输入电压范围输出电压在0.606V至0.9 x VIN范围内调节内置170mΩ RDS-ON高边功率开关和105mΩ RDS-ON低边功率开关350kHz固定开关频率效率高达93%逐周期过流保护可编程软启动采用低ESR陶瓷输出电容保持稳定输出安全启动进入预置输出使能输入和电源就绪输出提供完整的过流和过热保护VDD LDO欠压锁定节省空间、增强散热的3mm x 3mm封装
消费类产品分布式供电系统前置调节器机顶盒电视墙上适配器xDSL调制解调器
Key Specifications: Step-Down Switching Regulators
PartNumber
VIN(V)
VIN(V)
VOUT(V)
VOUT(V)
Max.IOUT(A)
Max.IOUT(A) Output Adjust.
MethodDC-DCOutputs
Oper.Freq.(kHz)
Package/Pins
Smallest AvailablePckg.(mm2)
Price
min max min max ≥ ≤ max w/pins SeeNotes
MAX15041 4.5 28 0.6 25 3 3 Resistor 1 350 TQFN/16 9.6 $2.90@1k
MAX15041 低成本、3A、4.5V至28V输入、350kHz PWM降压型DC-DC调节器,内置开关 - 概述
http://china.maxim-ic.com/datasheet/index.mvp/id/6260[2010-12-14 7:49:36]
查看所有Step-Down Switching Regulators (276)
Pricing Notes:This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices maydiffer due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorizeddistributor.
图表
典型工作电路
更多信息
顶标 MAX15041
新品发布 [ 2009-12-16 ]
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参考文献: 19-4815 Rev. 2; 2010-09-15本页最后一次更新: 2010-09-15
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© 2010 Maxim Integrated Products版权所有
General DescriptionThe MAX15041 low-cost, synchronous DC-DC convert-er with internal switches delivers an output current up to3A. The MAX15041 operates from an input voltage of4.5V to 28V and provides an adjustable output voltagefrom 0.6V to 90% of VIN, set with two external resistors.The MAX15041 is ideal for distributed power systems,preregulation, set-top boxes, television, and other con-sumer applications.
The MAX15041 features a peak-current-mode PWM con-troller with internally fixed 350kHz switching frequencyand a 90% maximum duty cycle. The current-mode con-trol architecture simplifies compensation design, andensures a cycle-by-cycle current limit and fast responseto line and load transients. A high-gain transconductanceerror amplifier allows flexibility in setting the external com-pensation by using a type II compensation scheme,thereby allowing the use of all ceramic capacitors.
This synchronous buck regulator features internalMOSFETs that provide better efficiency than asynchro-nous solutions, while simplifying the design relative todiscrete controller solutions. In addition to simplifyingthe design, the integrated MOSFETs minimize EMI,reduce board space, and provide higher reliability byminimizing the number of external components.
The MAX15041 also features thermal shutdown andovercurrent protection (high-side sourcing and low-sidesinking), and an internal 5V LDO with undervoltagelockout. In addition, this device ensures safe startupwhen powering into a prebiased output.
Other features include an externally adjustable soft-startthat gradually ramps up the output voltage and reducesinrush current. Independent enable control and power-good signals allow for flexible power sequencing.
The MAX15041 is available in a space-saving, high-power, 3mm x 3mm, 16-pin TQFN-EP package and isfully specified from -40°C to +85°C.
ApplicationsDistributed Power Systems
Wall Adapters
Preregulators
Set-Top Boxes
Televisions
xDSL Modems
Consumer Products
Features Up to 3A of Continuous Output Current ±1% Output Accuracy Over Temperature 4.5V to 28V Input Voltage Range Adjustable Output Voltage Range from 0.606V to
0.9 x VIN Internal 170mΩ RDS-ON High-Side and 105mΩ
RDS-ON Low-Side Power Switches Fixed 350kHz Switching Frequency Up to 93% Efficiency Cycle-By-Cycle Overcurrent Protection Programmable Soft-Start Stable with Low-ESR Ceramic Output Capacitors Safe Startup into Prebiased Output Enable Input and Power-Good Output Fully Protected Against Overcurrent and
Overtemperature VDD LDO Undervoltage Lockout Space-Saving, Thermally Enhanced, 3mm x 3mm
Package
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
________________________________________________________________ Maxim Integrated Products 1
MAX15041
IN
INPUT12V
BSTOUTPUT
1.8V AT 3A
LX
PGND
FB
COMP
EN
VDD
PGOOD
PGOOD SS
SGND
Typical Operating Circuit
Ordering Information
19-4815; Rev 2; 9/10
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART TEMP RANGEPIN-
PACKAGETOP
MARK
MAX15041ETE+ -40°C to +85°C 16 TQFN-EP* AGV
+Denotes a lead(Pb)-free/RoHS-compliant package.*EP = Exposed pad.
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VIN = 12V, CVDD = 1µF, CIN = 22µF, TA = TJ = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.
Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceedthe IC’s package power dissipation.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
IN to SGND.............................................................-0.3V to +30VEN to SGND.................................................-0.3V to (VIN + 0.3V)LX to PGND ................................-0.3V to min (+30V, VIN + 0.3V)LX to PGND .....................-1V to min (+30V, VIN + 0.3V) for 50nsPGOOD to SGND .....................................................-0.3V to +6VVDD to SGND............................................................-0.3V to +6VCOMP, FB, SS to SGND..............-0.3V to min (+6V, VDD + 0.3V)BST to LX .................................................................-0.3V to +6VBST to SGND .........................................................-0.3V to +36VSGND to PGND ....................................................-0.3V to +0.3VLX Current (Note 1) ....................................................-5A to +8AConverter Output Short-Circuit Duration ...................Continuous
Continuous Power Dissipation (TA = +70°C)16-Pin TQFN (derate 14.7mW/°C above +70°C)Multilayer Board .........................................................1666mW
Package Thermal Resistance (Note 2)θJA ................................................................................48°C/WθJC ..................................................................................7°C/W
Operating Temperature Range ..........................-40°C to +85°CJunction Temperature .....................................................+150°CStorage Temperature Range ............................-65°C to +150°CLead Temperature (soldering, 10s) .................................+300°CSoldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STEP-DOWN CONVERTER
Input-Voltage Range VIN 4.5 28 V
Quiescent Current IIN Not switching 2.1 4 mA
VEN = 0V, VDD regulated by internalLDO
2 12Shutdown Input Supply Current
VEN = 0V, VIN = VDD = 5V 18 28
µA
ENABLE INPUT
EN Shutdown Threshold Voltage VEN_SHDN VEN rising 1.4 V
EN Shutdown Voltage Hysteresis VEN_HYST 100 mV
VEN_LOCK VEN rising 1.7 1.95 2.15 VEN Lockout Threshold Voltage
VEN_LOCK_HYST 100 mV
EN Input Current IEN VEN = 2.9V 2 5.3 9 µA
POWER-GOOD OUTPUT
PGOOD Threshold VPGOOD_TH VFB rising 540 560 584 mV
PGOOD Threshold Hysteresis VPGOOD_HYST 15 mV
PGOOD Output Low Voltage VPGOOD_OL IPGOOD = 5mA, VFB = 0.5V 35 100 mV
PGOOD Leakage Current IPGOOD VPGOOD = 5V, VFB = 0.7V 10 nA
ERROR AMPLIFIER
Error AmplifierTransconductance
gMV 1.6 mS
Error Amplifier Voltage Gain AVEA 90 dB
FB Set-Point Accuracy VFB 600 606 612 mV
VFB = 0.5V -100 +100FB Input Bias Current IFB
VFB = 0.7V -100 +100nA
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
_______________________________________________________________________________________ 3
Note 3: Specifications are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed bydesign and characterization.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SS Current ISS VSS = 0.45V, sourcing 4.5 5 5.5 µA
SS Discharge Resistance RSS ISS = 10mA, sinking, VEN = 1.6V 6 Ω
SS Prebiased Mode Stop Voltage 0.65 V
Current Sense to COMPTransconductance
GMOD 9 S
COMP Clamp Low VFB = 0.7V 0.68 V
PWM Compensation Ramp Valley 830 mV
PWM CLOCK
Switching Frequency fSW 315 350 385 kHz
Maximum Duty Cycle D 90 %
Minimum Controllable On-Time 150 ns
INTERNAL LDO OUTPUT (VDD)
VDD Output Voltage VDD IVDD = 1mA to 25mA, VIN = 6.5V 4.75 5.1 5.5 V
VDD Short-Circuit Current VIN = 6.5V 30 80 mA
LDO Dropout Voltage IVDD = 25mA, VDD drops by -2% 250 600 mV
VDD Undervoltage LockoutThreshold
VUVLO_TH VDD rising 4 4.25 V
VDD Undervoltage LockoutHysteresis
VUVLO_HYST 150 mV
POWER SWITCH
High-side switch, ILX = 1A 170 305LX On-Resistance
Low-side switch, ILX = 1A 105 175mΩ
High-Side Switch SourceCurrent-Limit Threshold
5 6 7.2 A
Low-Side Switch SinkCurrent-Limit Threshold
-3 A
VBST = 33V, VIN = VLX = 28V 10LX Leakage Current
VBST = 5V, VIN = 28V, VLX = 0V 10nA
BST Leakage Current VBST = 33V, VIN = VLX = 28V 10 nA
THERMAL SHUTDOWN
Thermal-Shutdown Threshold Rising +155 °C
Thermal-Shutdown Hysteresis 20 °C
HICCUP PROTECTION
Blanking Time16 x Soft-Start Time
ELECTRICAL CHARACTERISTICS (continued)(VIN = 12V, CVDD = 1µF, CIN = 22µF, TA = TJ = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 3)
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4 _______________________________________________________________________________________
EFFICIENCY vs. LOAD CURRENTM
AX15
041
toc0
1
LOAD CURRENT (A)
EFFI
CIEN
CY (%
)
2.52.01.51.00.5
55
60
65
70
75
80
85
90
95
100
500 3.0
VOUT = 5.0V
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 12V
EFFICIENCY vs. LOAD CURRENT
MAX
1504
1 to
c02
LOAD CURRENT (A)
EFFI
CIEN
CY (%
)
2.52.01.51.00.5
55
60
65
70
75
80
85
90
95
100
500 3.0
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 5V
OUTPUT-VOLTAGE REGULATIONvs. LOAD CURRENT
MAX
1504
1 to
c03
LOAD CURRENT (A)
OUTP
UT-V
OLTA
GE R
EGUL
ATIO
N (%
)
2.52.01.51.00.5
-1.0
-0.8
-0.6
-0.4
-0.2
0
0.2
-1.20 3.0
LOAD-TRANSIENT WAVEFORMSMAX15041 toc04
VOUTAC-COUPLED200mV/div
ILOAD2A/div
VPGOOD5V/div
200µs/div
NORMALIZED OUTPUT VOLTAGEvs. TEMPERATURE
TEMPERATURE (NC)
NORM
ALIZ
ED O
UTPU
T VO
LTAG
E
603510-15
0.996
0.997
0.998
0.999
1.000
1.001
1.002
0.995-40 85
MAX
1504
1 to
c05
ILOAD = 0A
NORMALIZED OUTPUT VOLTAGEvs. TEMPERATURE
MAX
1504
1 to
c06
TEMPERATURE (NC)
NORM
ALIZ
ED O
UTPU
T VO
LTAG
E
603510-15
0.994
0.996
0.998
1.000
1.002
1.004
0.992-40 85
ILOAD = 2A
Typical Operating Characteristics(VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
FB SET POINT vs.TEMPERATURE
MAX
1504
1 to
c07
TEMPERATURE (NC)
FB S
ET P
OINT
(mV)
603510-15
602
604
606
608
610
600-40 85
SWITCHING FREQUENCYvs. INPUT VOLTAGE
MAX
1504
1 to
c08
INPUT VOLTAGE (V)
FREQ
UENC
Y (k
Hz)
325
335
345
355
365
375
385
3152520151050
TA = +85NC
TA = +25NC
TA = -40NC
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
_______________________________________________________________________________________ 5
INPUT SUPPLY CURRENTvs. INPUT VOLTAGE
MAX
1504
1 to
c09
INPUT VOLTAGE (V)
INPU
T SU
PPLY
CUR
RENT
(mA)
252015105
11
12
13
14
15
16
100
L = 4.7FHILOAD = 0A
SHUTDOWN CURRENTvs. INPUT VOLTAGE
MAX
1504
1 to
c10
INPUT VOLTAGE (V)
SHUT
DOW
N CU
RREN
T (F
A)
1
2
3
4
5
6
7
8
9
10
02520151050
SHUTDOWN CURRENTvs. TEMPERATURE
MAX
1504
1 to
c11
TEMPERATURE (NC)
SHUT
DOW
N CU
RREN
T (F
A)
603510-15
1.5
2.0
2.5
3.0
3.5
4.0
1.0-40 85
SHUTDOWN WAVEFORMSMAX15041 toc12
VOUT2V/div
VEN5V/div
IL2A/div
VPGOOD5V/div
100µs/div
OUTPUT SHORT-CIRCUIT WAVEFORMSMAX15041 toc13
IIN5A/div
VOUT2V/div
IL5A/div
VSS2V/div
10µs/div
SWITCHING WAVEFORMSMAX15041 toc14
IL2A/div
VLX10V/div
VOUTAC-COUPLED50mV/div
1µs/div
Typical Operating Characteristics (continued)(VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
SOFT-START WAVEFORMSMAX15041 toc15
IL2A/div
VEN5V/div
VOUT2V/div
VPGOOD5V/div
400µs/div
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
6 _______________________________________________________________________________________
STARTUP INTO PREBIASED OUTPUTMAX15041 toc17
IL2A/div
VEN5V/div
VOUT2V/div
IOUT2A/div
400µs/div
STARTUP INTO PREBIASED OUTPUTMAX15041 toc18
IL5A/div
VEN5V/div
VOUT2V/div
IOUT5A/div
400µs/div
MAXIMUM LOAD CURRENTvs. AMBIENT TEMPERATURE
MAX
1504
1 to
c19
AMBIENT TEMPERATURE (NC)
MAX
IMUM
LOA
D CU
RREN
T (A
)
75655545352515
2.2
2.4
2.6
2.8
3.0
3.2
2.05 85
VIN = 5VTJ P +150NC
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
VOUT = 1.2V
Typical Operating Characteristics (continued)(VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
SOFT-START TIMEvs. CAPACITANCE
MAX
1504
1 to
c16
CSS (nF)
SOFT
-STA
RT T
IME
(ms)
10010
1
10
100
1000
0.11 1000
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
_______________________________________________________________________________________ 7
DEVICE POWER DISSIPATIONvs. LOAD CURRENT
MAX
1504
1 to
c22
LOAD CURRENT (A)
POW
ER D
ISSI
PATI
ON (W
)
2.52.01.51.00.5
0.5
1.0
1.5
2.0
2.5
3.0
00 3.0
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 12V
DEVICE POWER DISSIPATIONvs. LOAD CURRENT
MAX
1504
1 to
c23
LOAD CURRENT (A)
POW
ER D
ISSI
PATI
ON (W
)
2.52.01.51.00.5
0.5
1.0
1.5
2.0
2.5
3.0
00 3.0
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
VIN = 5V
MAXIMUM LOAD CURRENTvs. AMBIENT TEMPERATURE
MAX
1504
1 to
c20
AMBIENT TEMPERATURE (NC)
MAX
IMUM
LOA
D CU
RREN
T (A
)
75655545352515
2.2
2.4
2.6
2.8
3.0
3.2
2.05 85
VIN = 12VTJ P +150NC
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
MAXIMUM LOAD CURRENTvs. AMBIENT TEMPERATURE
MAX
1504
1 to
c21
AMBIENT TEMPERATURE (NC)M
AXIM
UM L
OAD
CURR
ENT
(A)
75655545352515
2.2
2.4
2.6
2.8
3.0
3.2
2.05 85
VIN = 28VTJ P +150NC
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
VOUT = 1.2V
Typical Operating Characteristics (continued)(VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.)
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8 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 VDDInternal LDO 5V Output. Supply input for the internal analog core. Bypass with a ceramic capacitor of atleast 1µF to SGND. See Figure 3.
2 PGOOD Power-Good Open-Drain Output. PGOOD goes low if FB is below 545mV.
3 ENEnable Input. EN is a digital input that turns the regulator on and off. Drive EN high to turn on the regulator.Connect to IN for always-on operations.
4 COMP Voltage Error-Amplifier Output. Connect the necessary compensation network from COMP to SGND.
5 FBFeedback Input. Connect FB to the center tap of an external resistor-divider from the output to SGND to setthe output voltage from 0.606V to 90% of VIN.
6 SSSoft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time (see the Setting the Soft-Start Time section).
7 SGND Analog Ground. Connect to PGND plane at one point near the input bypass capacitor return terminal.
8 I.C. Internally Connected. Connect to SGND.
9 BSTHigh-Side MOSFET Driver Supply. Bypass BST to LX with a 10nF capacitor. Connect an external diode(see the Diode Selection section) from VDD to BST.
10, 11, 12 LXInductor Connection. Connect the LX pin to the switched side of the inductor. LX is high impedance whenthe IC is in shutdown mode, thermal shutdown mode, or VDD is below the UVLO threshold.
13, 14 PGNDPower Ground. Connect to the SGND PCB copper plane at one point near the input bypass capacitorreturn terminal.
15, 16 INInput Power Supply. Input supply range is from 4.5V to 28V. Bypass with a ceramic capacitor of at least22µF to PGND.
— EPExposed Pad. Connect to SGND externally. Solder the exposed pad to a large contiguous copper plane tomaximize thermal performance.
15
16
14
13
*EXPOSED PAD, CONNECT TO SGND.
*EP
6
5
7
PGOO
D
COM
P
8
V DD
LX BST
LX
1 2
PGND
4
12 11 9
IN
IN +
I.C.
SGND
SS
FB
MAX15041
ENLX
3
10
PGND
TQFN
TOP VIEW
Pin Configuration
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Simplified Block Diagram
ENABLE CONTROLAND THERMAL
SHUTDOWN
CONTROLLOGIC ANDSINK LIMIT
5V LDO
UVLOCOMPARATOR
CURRENT-SENSE/CURRENT-LIMITAMPLIFIER
4V
VDD
LX
VDD
BIASGENERATOR
0.65V
EN
VOLTAGEREFERENCE
STRONG PREBIASCOMPARATOR
PWMCOMPARATOR
ERRORAMPLIFIER
OSCILLATOR
MAX15041
N
N
PGND
LX
IN
BST
VDD
PGOOD
0.606V
5µA
0.560V RISING,0.545V FALLING POWER-GOOD
COMPARATOR
N
Σ
SS
FB
SS
COMP
SGND
Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
_______________________________________________________________________________________ 9
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
10 ______________________________________________________________________________________
Detailed DescriptionThe MAX15041 is a high-efficiency, peak-current-mode, step-down DC-DC converter with integratedhigh-side (170mΩ, typ) and low-side (105mΩ, typ)power switches. The output voltage is set from 0.606Vto 0.9 x VIN by using an adjustable, external resistivedivider and can deliver up to 3A load current. The 4.5Vto 28V input voltage range makes the device ideal fordistributed power systems, notebook computers, andpreregulation applications.
The MAX15041 features a PWM, internally fixed 350kHzswitching frequency with a 90% maximum duty cycle.PWM current-mode control allows for an all-ceramiccapacitor solution. The MAX15041 comes with a high-gain transconductance error amplifier. The current-mode control architecture simplifies compensationdesign and ensures a cycle-by-cycle current limit andfast reaction to line and load transients. The low RDS-ON, on-chip, MOSFET switches ensure high effi-ciency at heavy loads and minimize critical induc-tances, reducing layout sensitivity.
The MAX15041 also features thermal shutdown andovercurrent protection (high-side sourcing and low-sidesinking), and an internal 5V, LDO with undervoltagelockout. An externally adjustable voltage soft-startgradually ramps up the output voltage and reducesinrush current. Independent enable control and power-good signals allow for flexible power sequencing. TheMAX15041 also provides the ability to start up into aprebiased output, below or above the set point.
Controller Function–PWM LogicThe MAX15041 operates at a constant 350kHz switch-ing frequency. When EN is high, after a brief settlingtime, PWM operation starts when VSS crosses the FBvoltage, at the beginning of soft-start.
The first operation is always a high-side MOSFET turn-on, at the beginning of the clock cycle. The high-sideMOSFET is turned off when:
1) COMP voltage crosses the internal current-moderamp waveform, which is the sum of the compensa-tion ramp and the current-mode ramp derived fromthe inductor current waveform (current-sense block).
2) The high-side MOSFET current limit is reached.
3) The maximum duty cycle of 90% is reached.
Then, the low-side MOSFET turns on; the low-sideMOSFET turns off when the clock period ends.
Starting into a Prebiased OutputThe MAX15041 is capable of safely soft-starting into aprebiased output without discharging the outputcapacitor. Starting up into a prebiased condition, bothlow-side and high-side MOSFETs remain off to avoiddischarging the prebiased output. PWM operationstarts only when the SS voltage crosses the FB voltage.The MAX15041 is also capable of soft-starting into anoutput prebiased above the OUT nominal set point. Inthis case, forced PWM operation starts when SS volt-age reaches 0.65V (typ).
In case of a prebiased output, below or above the OUTnominal set point, if the low-side MOSFET sink currentreaches the sink current limit (-3A, typ), the low-sideMOSFET turns off before the end of the clock periodand the high-side MOSFET turns on until one of the fol-lowing conditions happens:
1) High-side MOSFET source current hits the reducedhigh-side MOSFET current limit (0.75A, typ); in thiscase, the high-side MOSFET is turned off for theremaining clock period.
2) The clock period ends.
Enable Input and Power-Good OutputThe MAX15041 features independent device enablecontrol and power-good signals that allow for flexiblepower sequencing. The enable input (EN) is an inputwith a 1.95V (typ) threshold that controls the regulator.Assert a voltage exceeding the threshold on EN toenable the regulator, or connect EN to IN for always-onoperations. Power-good (PGOOD) is an open-drainoutput that deasserts (goes high impedance) when VFBis above 560mV (typ), and asserts low if VFB is below545mV (typ).
When the EN voltage is higher than 1.4V (typ) andlower than 1.95V (typ), most of the internal blocks aredisabled, only an internal coarse preregulator, includ-ing the EN accurate comparator, is kept on.
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Programmable Soft-Start (SS)The MAX15041 utilizes a soft-start feature to slowly rampup the regulated output voltage to reduce input inrushcurrent during startup. Connect a capacitor from SS toSGND to set the startup time (see the Setting the Soft-Start Time section for capacitor selection details).
Internal LDO (VDD)The MAX15041 has an internal 5.1V (typ) LDO. VDD isexternally compensated with a minimum 1µF, low-ESRceramic capacitor. The VDD voltage is used to supplythe low-side MOSFET driver, and to supply the internalcontrol logic. When the input supply (IN) is below 4.5V,VDD is 50mV (typ) lower than IN. The VDD output cur-rent limit is 80mA (typ) and an UVLO circuit inhibitsswitching when VDD falls below 3.85V (typ).
Error AmplifierA high-gain error amplifier provides accuracy for the volt-age feedback loop regulation. Connect the necessarycompensation network between COMP and SGND (seethe Compensation Design Guidelines section). The error-amplifier transconductance is 1.6mS (typ). COMP clamplow is set to 0.68V (typ), just below the PWM ramp com-pensation valley, helping COMP to rapidly return to cor-rect set point during load and line transients.
PWM ComparatorThe PWM comparator compares COMP voltage to thecurrent-derived ramp waveform (LX current to COMP volt-age transconductance value is 9A/V, typ.). To avoid insta-bility due to subharmonic oscillations when the duty cycleis around 50% or higher, a compensation ramp is addedto the current-derived ramp waveform. The compensationramp slope (0.45V x 350kHz) is equivalent to half of theinductor current down slope in the worst case (load 3A,current ripple 30% and maximum duty cycle operation of90%). Compensation ramp valley is set at 0.83V (typ).
Overcurrent Protection and Hiccup Mode
When the converter output is shorted or the device isoverloaded, the high-side MOSFET current-limit event(6A, typ) turns off the high-side MOSFET and turns onthe low-side MOSFET. In addition, it discharges the SS
capacitor, CSS for a fixed period of time (∆T0 = 70ns,typ). If the overcurrent condition persists, SS is pulledbelow 0.606V and a hiccup event is triggered.
During a hiccup event, high-side and low-sideMOSFETs are kept off, and COMP is pulled low for aperiod equal to 16 times the nominal soft-start time(blanking time). This is obtained by charging SS from 0to 0.606V with a 5µA (typ) current, and then slowly dis-charging it back to 0V with a 333nA (typ) current. Afterthe blanking time has elapsed, the device attempts torestart. If the overcurrent fault has cleared, the deviceresumes normal operation, otherwise a new hiccupevent is triggered (see the Output Short-CircuitWaveforms in the Typical Operating Characteristics).
Thermal-Shutdown ProtectionThe MAX15041 contains an internal thermal sensor thatlimits the total power dissipation in the device and pro-tects it in the event of an extended thermal fault condi-tion. When the die temperature exceeds +155°C (typ),the thermal sensor shuts down the device, turning offthe DC-DC converter and the LDO regulator to allowthe die to cool. After the die temperature falls by 20°C(typ), the device restarts, using the soft-start sequence.
Applications InformationSetting the Output Voltage
Connect a resistive divider (R1 and R2, see Figures 1and 3) from OUT to FB to SGND to set the DC-DC con-verter output voltage. Choose R1 and R2 so that the DCerrors due to the FB input bias current do not affect theoutput-voltage precision. With lower value resistors, theDC error is reduced, but the amount of power consumedin the resistive divider increases. A typical tradeoff valuefor R2 is 10kΩ, but values between 5kΩ and 50kΩ areacceptable. Once R2 is chosen, calculate R1 using:
where the feedback threshold voltage VFB = 0.606V(typ).
R RVVOUT
FB1 2 1= × −
⎛⎝⎜
⎞⎠⎟
Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
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Inductor SelectionA larger inductor value results in reduced inductor ripplecurrent, leading to a reduced output ripple voltage.However, a larger inductor value results in either a largerphysical size or a higher series resistance (DCR) and alower saturation current rating. Typically, inductor valueis chosen to have current ripple equal to 30% of loadcurrent. Choose the inductor with the following formula:
where fSW is the internally fixed 350kHz switching fre-quency, and ∆IL is the estimated inductor ripple current(typically set to 0.3 x ILOAD). In addition, the peakinductor current, IL_PK, must always be below both theminimum high-side MOSFET current-l imit value,IHSCL_MIN (5A, typ), and the inductor saturation currentrating, IL_SAT. Ensure that the following relationship issatisfied:
Diode SelectionThe MAX15041 requires an external bootstrap steeringdiode. Connect the diode between VDD and BST. Thediode should have a reverse voltage rating, higher thanthe converter input voltage and a 200mA minimum cur-rent rating. Typically, a fast switching or Schottky diodeis used in this application, but a simple low-cost diode(1N4007) suffices.
Input Capacitor SelectionFor a step-down converter, input capacitor CIN helps tokeep the DC input voltage steady, in spite of discontin-uous input AC current. Low-ESR capacitors are pre-ferred to minimize the voltage ripple due to ESR.
Size CIN using the following formula:
Output-Capacitor SelectionLow-ESR capacitors are recommended to minimize thevoltage ripple due to ESR. Total output-voltage peak-to-peak ripple is estimated by the following formula:
For ceramic capacitors, ESR contribution is negligible:
For tantalum or electrolytic capacitors, ESR contributionis dominant:
Compensation Design GuidelinesThe MAX15041 uses a fixed-frequency, peak-current-mode control scheme to provide easy compensationand fast transient response. The inductor peak current ismonitored on a cycle-by-cycle basis and compared tothe COMP voltage (output of the voltage error amplifier).The regulator’s duty-cycle is modulated based on theinductor’s peak current value. This cycle-by-cycle con-trol of the inductor current emulates a controlled currentsource. As a result, the inductor’s pole frequency isshifted beyond the gain-bandwidth of the regulator.
System stability is provided with the addition of a sim-ple series capacitor-resistor from COMP to SGND. Thispole-zero combination serves to tailor the desiredresponse of the closed-loop system.
The basic regulator loop consists of a power modulator(comprising the regulator’s pulse-width modulator,compensation ramp, control circuitry, MOSFETs, andinductor), the capacitive output filter and load, an out-put feedback divider, and a voltage-loop error amplifierwith its associated compensation circuitry. See Figure 1for a graphical representation.
The average current through the inductor is expressed as:
where IL is the average inductor current and GMOD isthe power modulator’s transconductance. For a buckconverter:
where RLOAD is the equivalent load resistor value.Combining the two previous equations, the power mod-ulator’s transfer function in terms of VOUT with respectto VCOMP is:
VV
R I
IG
R GOUT
COMP
LOAD L
L
MOD
LOAD MOD=×
⎛⎝⎜
⎞⎠⎟
= ×
V R IOUT LOAD L= ×
I G VL MOD COMP= ×
Rf CESR COUTSW OUT
_ >>× ×
18
Rf CESR COUTSW OUT
_ <<× ×
18
∆VV
f LVV
ROUTOUT
SW
OUT
INESR COUT=
×× −
⎛⎝⎜
⎞⎠⎟
× +11
_ 88 × ×⎛⎝⎜
⎞⎠⎟f CSW OUT
CI
f VVVIN
LOAD
SW IN RIPPLE
OUT
IN=
××
∆ _
I I I I IL PK LOAD L HSCL MIN L SAT_ _ _min( , )= + × <12
∆
LV
f IVV
OUT
SW L
OUT
IN=
×× −
⎛⎝⎜
⎞⎠⎟∆
1
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
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Having defined the power modulator’s transfer functiongain, the total system loop gain can be written as fol-lows (see Figure 1):
where ROUT is the quotient of the error amplifier’s DCgain, AVEA, divided by the error amplifier’s transcon-ductance, gMV; ROUT is much larger than RC and CC ismuch larger than CCC.
Rewriting:
The dominate poles and zeros of the transfer loop gainis shown below:
The order of pole-zero occurrence is:
Note under heavy load, fP2, may approach fZ1.
A graphical representation of the asymptotic systemclosed-loop response, including the dominant pole andzero locations is shown in Figure 2.
f f f f fP P Z Z P1 2 1 2 3< < < ≤
fg
Cf
C ESRPMV
A dBC
POUTVEA
1 20 22 10
12
=× ×
=×[ ]π π/ ++( )
=×
=×
=
R
fC R
fC R
f
LOAD
PCC C
ZC C
Z
3 1
2
12
12
1
π π
22π × C ESROUT
GainV
VA
sC R
sCAg
FB
OUTVEA
C C
CVEA
MV
= ×+( )
⎛⎝⎜
⎞⎠⎟
+
1
11 1
1
⎡
⎣⎢
⎤
⎦⎥ × +( )
× ×+( )
sC R
G RsC ESR
CC C
MOD LOADOUT
ssC ESR ROUT LOAD+( ) +⎡⎣ ⎤⎦1
α =× +( )
+( ) +( ) +⎡⎣ ⎤⎦ ×R sC R
s C C R R s COUT C C
C CC C OUT
1
1 CC CC C OUT
MOD LOADO
C R R
G RsC
|| ||( ) ( ) +⎡⎣ ⎤⎦
= × ×
1
β UUT
OUT LOAD
ESR
sC ESR R
GainR
R
+( )+( ) +⎡⎣ ⎤⎦
=
1
1
2
1 ++× × ×
RAR
VEA
OUT2α β
L0
QHS
CONTROLLOGIC
VCOMP VOUT
PWMCOMPARATOR
COMP
RCROUTgMV
VIN
POWER MODULATOROUTPUT FILTER
AND LOAD
NOTE: THE GMOD STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OFTHE INDUCTOR INJECTED INTO THE OUTPUT LOAD. THIS REPRESENTS ASIMPLIFICATION FOR THE POWER MODULATOR STAGE DRAWN ABOVE.
ERROR AMPLIFIERFEEDBACKDIVIDER
COMPENSATIONRAMP
gMC
DCR
ILQLS
VOUT
VOUT
IL
ESR
COUT
RLOAD
CC
REF *CCC IS OPTIONAL.
ROUT = AVEA/gMV
*CCC
FBR1
R2
GMOD
Σ
Figure 1. Peak Current-Mode Regulator Transfer Model
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
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If COUT is large, or exhibits a lossy equivalent seriesresistance (large ESR), the circuit’s second zero maycome into play around the crossover frequency (fCO =ωCO/2π). In this case, a third pole may be induced by asecond (optional) small compensation capacitor (CCC),connected from COMP to SGND.
The loop response’s fourth asymptote (in bold, Figure2) is the one of interest in establishing the desiredcrossover frequency (and determining the compensa-tion component values). A lower crossover frequencyprovides for stable closed-loop operation at theexpense of a slower load and line transient response.Increasing the crossover frequency improves the tran-sient response at the (potential) cost of system instabili-ty. A standard rule of thumb sets the crossoverfrequency ≤ 1/10 of the switching frequency (for theMAX15041, this is approximately 35kHz for the 350kHzfixed switching frequency).
First, select the passive and active power componentsthat meet the application’s requirements. Then, choosethe small-signal compensation components to achieve
the desired closed-loop frequency response and phasemargin as outlined in the Closing the Loop: Designingthe Compensation Circuitry section.
Closing the Loop: Designing the Compensation Circuitry
1) Select the desired crossover frequency. Choose fCOequal to 1/10th of fSW, or fCO ≈ 35kHz.
2) Select RC using the transfer-loop’s fourth asymptotegain (assuming fCO > fP1, fP2, and fZ1 and settingthe overall loop gain to unity) as follows:
therefore:
RVV
f C ESR R
g GCOUT
FB
CO OUT LOAD
MV MOD= ×
× × × +( )× ×
2πRRLOAD
1
12
= × × × ×
×× × ×
VV
g R G R
f C ES
FB
OUTMV C MOD LOAD
CO OUTπ RR RLOAD+( )
1ST ASYMPTOTEVFB x VOUT -1 x 10AVEA[dB]/20 x GMOD x RLOAD
2ND ASYMPTOTEVFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD
3RD ASYMPTOTEVFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD x ( COUT(ESR + RLOAD))-1
4TH ASYMPTOTEVFB x VOUT -1 x gMV x RC x GMOD x RLOAD x (COUT(ESR + RLOAD))-1
5TH ASYMPTOTEVFB x VOUT -1 x gMV x RC x GMOD x (ESR || RLOAD)
6TH ASYMPTOTEVFB x VOUT -1 x gMV x ( CCC)-1 x GMOD x (ESR || RLOAD)
UNITY
GAIN
RAD/S
3RD POLE(CCCRC)-1
2ND ZERO(COUTESR)-1
1ST ZERO(CCRC)-1
2ND POLE(COUT(ESR + RLOAD))-1
1ST POLEgMV x (10AVEA[dB]/20 CC)-1 CO
Figure 2. Asymptotic Loop Response of Peak Current-Mode Regulator
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For RLOAD much greater than ESR, the equation can befurther simplified as follows:
where VFB is equal to 0.606V.
3) Select CC. CC is determined by selecting thedesired first system zero, fZ1, based on the desiredphase margin. Typically, setting fZ1 below 1/5th offCO provides sufficient phase margin.
therefore:
4) If the ESR output zero is located at less than one-halfthe switching frequency use the (optional) sec-ondary compensation capacitor, CCC, to cancel it,as follows:
therefore:
If the ESR zero exceeds 1/2 the switching frequency,use the following equation:
therefore:
The downside of CCC is that it detracts from the overallsystem phase margin. Care should be taken to guarantee
this third-pole placement is well beyond the desiredcrossover frequency, minimizing its interaction with thesystem loop response at crossover. If CCC is smaller than10pF, it can be neglected in these calculations.
Setting the Soft-Start TimeThe soft-start feature ramps up the output voltage slow-ly, reducing input inrush current during startup. Size theCSS capacitor to achieve the desired soft-start time tSSusing:
ISS, the soft-start current, is 5µA (typ) and VFB, the out-put feedback voltage threshold, is 0.606V (typ). Whenusing large COUT capacitance values, the high-sidecurrent limit may trigger during the soft-start period. Toensure the correct soft-start time, tSS, choose CSS largeenough to satisfy:
IHSCL_MIN is the minimum high-side switch, current-limit value.
Power DissipationThe MAX15041 is available in a thermally enhancedTQFN package and can dissipate up to 1.666W at TA =+70°C. The exposed pad should be connected toSGND externally, preferably soldered to a large groundplane to maximize thermal performance. When the dietemperature exceeds +155°C, The thermal-shutdownprotection is activated (see the Thermal-ShutdownProtection section).
Layout ProcedureCareful PCB layout is critical to achieve clean and sta-ble operation. It is highly recommended to duplicatethe MAX15041 evaluation kit layout for optimum perfor-mance. If deviation is necessary, follow these guide-lines for good PCB layout:
1) Connect input and output capacitors to the powerground plane; connect all other capacitors to thesignal ground plane.
C CV I
I I VSS OUTOUT SS
HSCL MIN OUT FB>> ×
×− ×( )_
CI t
VSSSS SS
FB=
×
Cf RCCSW C
=× ×
22π
fC R
fP
CC C
SW3
12 2
=×
=π
CC ESR
RCCOUT
C=
×
12
123 2π π×
= = =×C R
f fC ESRCC C
P ZOUT
Cf RCCO C
≥× ×
52π
fC R
fZ
C C
CO1
12 5
=×
≤π
RVV
f Cg GC
OUT
FB
CO OUT
MV MOD= ×
× ××
2π
Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
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2) Place capacitors on VDD, IN, and SS as close aspossible to the IC and the corresponding pin usingdirect traces. Keep the power ground plane (con-nected to PGND) and signal ground plane (connect-ed to SGND) separate. PGND and SGND connect atonly one common point near the input bypasscapacitor return terminal.
3) Keep the high-current paths as short and wide aspossible. Keep the path of switching current shortand minimize the loop area formed by LX, the outputcapacitors, and the input capacitors.
4) Connect IN, LX, and PGND separately to a largecopper area to help cool the IC to further improveefficiency.
5) Ensure all feedback connections are short anddirect. Place the feedback resistors and compensa-tion components as close as possible to the IC.
6) Route high-speed switching nodes (such as LX andBST) away from sensitive analog areas (such as FBand COMP).
MAX15041
IN
EN L4.7µH
D
RBST47Ω
INPUT4.5V TO 28V
BST
OUTPUT = 3.3VLX
PGND
FB
COMP
RPU10kΩ
CVDD1µF
CBST10nF
COUT22µF R1
45.3kΩ1%
R210.0kΩ1%
RC1.8kΩ
CC12nF
CCC100pF
CIN47µF
CSS0.01µF
VDD
PGOODPGOOD
SS
I.C. SGND
VOUT (V) L (µH) CC (nF) RC (kΩ) R1 and R2
5.0 4.7 8 2.70
3.3 4.7 12 1.80
2.5 3.3 22 1.50
1.8 2.2 33 1.00
1.2 2.2 47 0.68
Select R2 so that:5kΩ ≤ R2 ≤ 50kΩ
Calculate R1 using the equation in theSetting the Output Voltage section.
Figure 3. Typical Operating Circuit (4.5V to 28V Input Buck Converter)
Table 1. Typical Component Values for Common Output-Voltage Settings
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
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Chip InformationPROCESS: BiCMOS
Package InformationFor the latest package outline information and land patterns, goto www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” inthe package code indicates RoHS status only. Package draw-ings may show a different suffix character, but the drawing per-tains to the package regardless of RoHS status.
PACKAGETYPE
PACKAGECODE
OUTLINE NO.LAND
PATTERN NO.
16 TQFN-EP T1633+4 21-0136 90-0031
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Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses areimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISIONNUMBER
REVISIONDATE DESCRIPTION PAGES
CHANGED
0 7/09 Initial release —
1 3/10 Revised General Description, Absolute Maximum Ratings, ApplicationsInformation, Figures 2 and 3.
1, 2, 3, 7, 10–13,15, 16
2 9/10 Update Electrical Characteristics and Package Information 2, 17, 18