א א א א - cdd.tvtc.gov.sa ? k ٩ k ... e ١٥ f kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk

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Text of א א א א - cdd.tvtc.gov.sa ? k ٩ k ... e ١٥ f...

  • 0

  • 1

    W

    WK

    K

    ? ? ??

    K

    K

    K

  • 2

    K K

    K

    K K

    K K K K

    K K K

    K

    K K

    L(Decimal System) K L(Binary System)K K K K

    K K K

  • 3

    K K K (BCD)K )(BCDK BCD) (K K

    K

    K K

    W (Logic states) W ")+ve "(Positive Logic K W ")-ve "(Negative Logic

    K (W5101-3E) K . (Logic Gate) K

    ?(AND gate) ? K

    (AND)K (AND) K

    (AND) FWE(AND) FWE(AND)

    ??)(OR gate

  • 4

    (OR)K (OR)K

    FWE(OR)K FWE(OR)K

    )(NOT gateK NOT)(K

    (NOT)K FWE(NOT)K

    NAND gate)(K (NAND)K

    FWE(NAND)K FWE(NAND)K

    NOR gate)(K NOR)(K

    FWE(NOR)K FWE(NOR)K

    ??(Exclusive OR gate)K (EXOR)K

    FWE(EXOR)K FWE(EXOR) K

    ??)EXNOR(K (EXNOR)K

    FWE(EXNOR)K FWE(EXNOR)K

    K K

  • 5

    K

    K

    K K

    K Half Adder "H.A") (K

    )Carry(K FWE(Half Adder) K

    (Half Subtract "H.S") K )(DK (B)K

    FWE(Half Subtract) K (Digital Comparator)K

    FWE(Digital Comparator) (Multiplexer)K

    FWE(Multiplexer) K (Demultiplexer) K

    FWE(Demultiplexer) K K

    K

    K K

    (Flip-flop)K

  • 6

    K K K J(S-R) K

    FWE(S-R) K J(S-R) K

    FWE(S-R) K JD)(K

    FWE(D) K J(J-K)K

    FWE(J-K) K K

    (Registers and Counters)K

    K K

    W(Registers) K J)SISO (K J(SIPO) K FWEK W )(CountersK K K FWEK K

  • 7

    K

    K K

    K (ROM) K (RAM) K 64)-Bit) K (7489) K FWE(RAM) K K

    ) (MicrocontrollerK

    K K

    JK K K K K . K JK K K K

  • 8

    FWE(LED)K K

    K

    K K

    (OPERATIONAL AMPLIFIER) K K K FEK K FWEK (Inverting Amplifier)K FWEK K FWEK )Summing Amplifier(K FWE)(Summing AmplifierK FE )Difference Amplifier(K K )(ComparatorK K FWEK K

  • 9

    W

    K

    ??

    K

    K

    / falaqeel@tvtc.gov.sa

  • 10

    W

    K

    W W JK JK JK J(RAM)K JK JK

    W

    FEW KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFE

    KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKKKKKKKKKE KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKE KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKKKKKKKKE

    KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKKKKKKKKKKKKKKKKKKKKKE KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKKKKKKKKKKKKKKKKKKKKE KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKKKKKE KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKKKE

    KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKFKKKKKKKKKKKE

  • 11

    W

    W JK JK J J(RAM)K J J

    W W

    JK JK JK JK JK

    W JFE J J J

  • 12

    W

    W

    Safety Signs

    KW

    . K . K . K . K

    K

  • 13

    W

    WARNING

    Risk of danger hazard ahead Yellow background with

    black border

    PROHIBITION

    Stop/must not Red on white background

    L

    MANDATORY

    Must obey Blue background with white symbol

    SAFE WAY TO GO

    Safe condition Green background with white

    symbol

  • 14

    W

    L

    JK JK JK JK JFEK

    L

    JK JK JK JK JK JK

    L

    J?? (AND Gate) K J??OR Gate)(K JNOT Gate) (K J(NANAD NOR XOR XNOR) K JK

  • 15

    L

    JK JK JK JK JK

    L

    JFlip Flop) (K JK JK J(S R) K J(S R) K JD) (K JJ K) (K JK

    L

    JK J(SISO) K J (SIPO)K JK JK

  • 16

    L

    JFEK JRAM) (K J(ROM) K

    L( Microcontroller)

    JMicrocontroller) (K JK J(Microcontroller) K JK JK J(LED) K JK JK JK

    L

    JK JK JK JK JK JK JK

  • 17

    W

    F

    KKKE

    W JFE

    K K

    KK

  • 18

  • 19

    W

    W

    LK LK LK L

    K

    W K

    FE W

    KK (Data Show) K

    W K

  • 20

    W

    W

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

  • 21

    L

    L K

    L K

    L K

    LK

    L K

    L K

    L K

    L K

    LK

    LK

  • 22

    W )(Chip

    WK

    (pins)(IC)K

    K

    K

    W L LK

    L K

    L K

    L K

    L K

    L K

    L K

    L W

    K

    K

  • 23

    W

    L K

    L K

    K

    L

    K

    W W

    FnsEF JE

    (TTL)K

    F JE

    )"a("logic 0) ( (Logic 1) (tPHL = 20 ns) (1) (0)

    b)( (1)(0)(tPLH=15 ns) (0) (1)

    K

  • 24

    W V)(K

    W(Fan in) K

    W)(Fan out

    W

    ?1??0?(10mw)

    )0.1mw((TTL) (MOS)K

    W(Input Voltage) (5V) K

    W(Packaging)

    )(DIP F JEK

    F JE

  • 25

    W )(U

    (IC) K

    F JKE

    F JE

    W W

    (Linear) )Digital(

    K

    1) (binary 0

    W

    J(SSI : Small - Scale Integration)

    NAND) NOR NOT AND (OR (flip- flops) K

  • 26

    (MSI : Medium-Scale Integration)

    W

    K (LSI : Large - Scale Integration)

    (Microprocessors)K

    (VLSI : Very - Large - Scale Integration) K

    (Digital Integrated Circuits Families)W

    W (TTL : Transistor -Transistor Logic)

    (TTL)K )(ECL : Emitter - Coupled Logic

    )(ECLK

    (CMOS) K (RTL : Resistor Transistor Logic)K (DTL : Diode Transistor Logic) K

    TTL) ((CMOS)(ECL)

    K

    K

  • 27

    (TTL) 74XXX) ((74))(CMOS(4XXX)(4)

    W 47HXX(High Speed) K 74LXX(Low Power) K

  • 28

    L K L IC K L K L K L K L W

    KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKK

    JKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKK JKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKK JKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKK JKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKK

  • 29

    F EK

    W

    FE

    K K K K K K

    FE????

    K

  • 30

  • 31

    W

    W LK LK LK LK LK LK L

    K

    W K

    FE W

    KK (Data Show) K

    W K

  • 32

    W

    W

    LWK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

  • 33

    L

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    LK

    L

  • 34

    L(Decimal System) F10E

    (10)K (9 ~ 0)

    K(238)(8))(3(30)

    2(((200) (8+30+200)238)) K

    WW

    6704003000347610

    L(Binary System) ( 0,1 )2)(

    )bit(K(0 , 1)

    F JE(10011)FKE

    32 22 12

    02122232420.1250.250.51 2 4 8 16 K

    F JE

  • 35

    W

    W W210011W

    W 021222 32 42

    1 24 8 16 110 0 1

    10

    2

    191216

    1*12*14*08*016*110011

    2100111019 W2101110 W

    02122232 42 52 1 248 16 32

    0111 0 1

    1*02*14*18*116*032*1101110 2 24832

    1046 21011101046

    W

    K

  • 36

    1 0 1 0 1 1 1

    0211222255210102212124343287

    210 101011187

    W2101.1110W W

    32 22 12

    021222320.1250.250.51 2 4 8 1 01K 0 1 1 1

    10

    2

    625.14125.05.0248

    125.0*125.0*05.0*11*02*14*18*1101.1110

    2101.111010625.14

    W

    W L2K L2K

    L1087

    872431

    (LSB)

    K

  • 37

    L10625.5W W

    2K

    W

    K

    1 0 1 . 1 0 1

    021122225

    210 101.101625.5

    00.12*5.0

    50.02*25.0

    25.12*625.0

  • 38

    W

    (Binary Addition) F JE

    - 0 0 + 0 = - 1 0 + 1 =

    - 1 1 + 0 = 1 0 1 + 1 =

    F JE

    10=1+1))2 )1 (

    K W

    4 + 2

    6

    1 0 0 + 0 1 0

    1 1 0

    5 + 3

    8

    1 1 1

    1 0 1

    0 1 1 +

    0 0 0 1

    3 + 3

    6

    1 1

    1 1

    1 1 + 0 1 1

    = 1 1 + 1 + 1 = 1

  • 39

    Binary Subtraction

    F JE????

    K

    - 0 0 0 = 1 1 0 1 = - 1 1 0 = - 0 1 1 =

    F JE

    `1`?1"

    `2``0`W

    2 - 1

    1

    10 10 - 0 1

    0 1

    37 - 10

    27

    1 10 10 0 10

    1 0 0 1 0 1

    1 0 1 0 -

    1 1 0 1 1

  • 40

    (First and Second Complement) W

    W A B = A + B' +1

    W

    01K

    W1010 9,7 K

    WK

    H 1 10000111 107 1 01101001 109

    W ( 1 )K

    ZH

    W1010 5,7 K

    WK W( 1 ) K

    H 1000+

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