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, , , .

2

.

.

( ) .

3

MMU.

.

4

RAM

, CPU, .

, .

.

60ns .

10ms (=10,000,000ns) .

.

5

: hardware & Operating System

..

.

.

(virtual memory).

6

CPU

7

.

8

(1/2)

(modules) (object code).

, .

.. .

9

(2/2)

(linker) modules module . module modules. module .

10

11

.

module . .

(relocation).

module . interpreter compiler .

12

(static linking):

object files .

(dynamic linking):

T bject files .

.

(system libraries).

13

& ( Linux)

, .

14

lsof (=list open files) ( Linux)

15

&

.

:

( virtual addresses).

( real addresses).

16

17

,

, . compilers . . .

, (.. ).

.

18

(1/2)

(modules ).

.

.

.

19

(2/2)

.

(Memory

Management Unit - MMU)

.

20

MMU

21

CPU

(base register) .

(bound or limit register)

.

,

.

, (interrupt) ..

:

(process image).

: ..

.

22

23

24

, .

, , .

(modules).

.

(read-only, execute-only).

.

25

. ( ).

.. .

( ) .

.

26

:

(paging).

(segmentation) ( !!!).

(segmentation with paging).

27

(blocks, chunks) .

(pages) (frames).

, (page frames) ( ).

.

28

29

Virtual Memory VS swapping

( ).

( ).

30

31

.. :

(page table) .

, .

( ) (offset)

( , ) ( , ).

32

33

CPU : ( p ). ( d ).

: .

.

:

.

= 2d bytes.

34

35

- 1

36

- 2

37

, :

1. .

2. .

3. .

.

. (;)

38

2 2 (

512 bytes 8192 bytes).

, .

2:

.

.

39

.

:

.

.

.

:

.

.

40

-

41

42

MMU 16 4 KB

43

, .

() .

bit: bit (Present bit)

.

bit (Modify bit) . , .

44

45

46

47

valid bit

48

Memory residentpage table(physical page

or disk address) Physical Memory

Disk Storage(swap file orregular file system file)

Valid

1

1

1

1

1

1

1

0

0

0

Virtual PageNumber

valid=1 RAM

(access rights).

49

:

50

,

.

( ) .

.

.

;

, . , .

51

:

Page Table Base Register (PTBR): .

Page-table length register (PRLR): .

(Pentium) .

52

Page tables

53

32 bits

4KB (=212),

220 ().

4 bytes

:

220 4 bytes = 222 bytes = 4 MB ( ).

25

: 25 4 = 100 !!!!

4Gb ;

64-bits

:

Intel Itanium, AMD Clawhammer, DEC Alpha.

54

2

55

2 32-bit

56

hardware TLB (1/2)

. (fetch) ,

.

.

.

57

hardware TLB (2/2)

cache Translation Look-aside Buffer (TLB) : ,

,

cache. TLB associative registers .

58

TLB (1/2) TLB.

( - hit) .

( - miss), . TLB . ( ) (page fault).

(hit ratio) TLB.

59

TLB (2/2)

60

61

62

TLB

63

TLB.

hit ratio.

(EAT) hit ratio.

EAT = hit ratio * entry found + (1-hit ratio) * entry not found

64

EAT : memory access time: 60 ns; TLB access time: 6 ns. EAT : 60 ns. EAT : 60 ns + 60 ns = 120 ns. EAT TLB/ . hit ratio 90% EAT = 0.9 * (6 + 60) + 0.1 * (6 + 60 + 60) = 59.4 + 12.6 = 72

20% hit ratio 99% EAT = 0.99 * (6 + 60) + 0.01 * (6 + 60 + 60) = 65.34 + 1.26 = 66.60

11%

65

4K (=4096 bytes)-(Sun SPARC 4Kb pages, Intel x86: 4Kb pages).

32 bits, 4GB.

.

220 () 4 Bytes. 4MB .

66

67

:

(reentrant) .

.

:

.

.

68

(segmentation) (1/2)

(segment) .. .

.

(offset).

69

. .

.

:

.

.

70

(Segmentation) (2/2)

71

(1/2)

72

( , !!!).

segments .. main program, function, objects, global variables, stack

.

73

74

( ).

.

(, instructions, stack, ).

.

, ( ).

75

76

(2/2)

77

: (1/2)

78

(Segment Tables)

segments .

segment.

: bit segment

,

bit segment .

, .

79

80

compiler segments : main( ), functions,

globals,

.

(segment number + offset) .

: segment table base register (STBR):

.

segment table length (limit) register (STLR): .

81

hardware . . . . segments (.. execute-only, read-write) . bits .

82

83

; ;

1

;

; ;

;

;

- - - - - - .

.

.

, .

.

, .

84

85

(1/2)

86

(2/2)

87

88

(1/2)

0001.

segment table .

. > .

=: + .

89

(2/2)

90

process segment table segment 0

: 512 + 128 + 64 + 32 + 8 + 4 + 2 = 750

2048 1024 512 256 128 64 32 16 8 4 2 1

0 0 1 0 1 1 1 0 1 1 1 0

segment 1 ( 752 > 750)

segment 1 :

base 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0

offset 0 0 0 0 0 0 1 0 1 1 1 1 0 0 0 0

address 0 0 1 0 0 0 1 1 0 0 0 1 0 0 0 0

: 0001001011110000.

: 4 bits 0001.

12 bits.

212= 4096 bytes.