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A Low-Voltage Folded- Switching Mixer in 0.18-um CMOSVojkan Vidojkovic, Johan van der Tang, Member, IEEE, Arjan Leeuwenburgh, andArthur H. M. van Roermund, Senior Member, IEEE

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005

指導教授 : 林志明 級別 : 碩一 學生 : 呂致遠

Mail:s94662010@mail.ncue.edu.tw 民國 95 年 1 月 5 日

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Outline

Abstract

Introduction

Transconductors for folded-switching mixers

AC-coupled folded-switching mixer with current-reuse

Die microphotograph

SIMULATION AND EXPERIMENTAL RESULTS

CONCLUSION

REFERENCES

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Abstract

Scaling of CMOS technologies has a great impact on analog design. The most severe consequence is the reduction of the voltage supply.

AC-coupled folded-switching mixer with current-reuse

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Introductionswitching stage Vdd=1v,saturation region

Transconductsthe goal is

to reduce the voltage drops across the load resistor

s and theswitching tra

nsistors

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Transconductors for folded-switching mixers

Vdd,min=Vov1+Vov2+Vrfdcp-V

rfdcnVdd,min=

Vov1+Vov2+2Vt

(Vt of 0.18- umCMOS is in the range

of 500mV.)

Vovn=Vrfdc-Vt

Vovp=Vdd-Vrfdc-Vt

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AC-coupled folded-switching mixer with current-reuse

A. Gain and Noise Figure

G=20log((2/π )gmn+gmp)R)

the dc voltage V2 has to bekept sufficiently high and voltage V1 sufficiently low. On the other hand, voltage V1 should be sufficiently high in order to keep the transistors M1and M2 saturated.

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AC-coupled folded-switching mixer with current-reuse

B. Linearity

The deviation dfrom a linear transfer function between the

points A and B

The input voltage range between the points A and B is denoted wi

th s

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AC-coupled folded-switching mixer with current-reuse

C.DC Stability

supply voltage variations

of 10% and temperature variations ( -25C to 70

C).

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Die microphotograph

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SIMULATION AND EXPERIMENTAL RESULTS

figure of meri

t(FOM)

FOM=

P

IIP

NF

G20

)103(

10

20 10

10

10

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CONCLUSION

A high-gain, low-voltage, low-power ac-coupled foldedswitching

mixer with current-reuse is presented. This mixer is designed and implemented in 0.18- m CMOS technology.

The main advantages of the proposed new mixer topology are high voltage gain (15.7 dB), moderate noise figure (12.9 dB), moderate linearity (IIP3=1 dBm), operation at low supply voltages (Vdd=1 V), and simplicity since common-mode Feedback is not necessary. Normalizing mixer performance wi

th a figure of merit shows that the ac-coupled folded-switching mixer with current-reuse has excellent performance incompar

ison with other CMOS mixers.

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REFERENCES[1] V. Vidojkovic et al., “Mixer topology selection for a 1.8–2.5 GHz multistandard

front-end in 0.18 mCMOS,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), vol. 2, 2003, pp. 300–303.

[2] A. Karanicolas et al., “A 2.7-V 900-MHz CMOS LNA and mixer,” IEEE J. Solid-State Circuits, vol. 31, no. 12, pp. 1939–1944, Dec. 1996.

[3] B. Razavi, Design of Analog CMOS Integrated Circuits. New York, NY: McGraw-Hill, 2001.

[4] C. Debono et al., “A 900 MHz, 0.9 V low-power CMOS down-conversion

mixer,” in Proc. IEEE Custom Integrated Circuit Conf. (CICC), 2001, pp. 527–530.

[5] P. Sullivan et al., “Low voltage performance of a microwave CMOS Gilbert cell mixer,” IEEE J. Solid-State Circuits, vol. 32, no. 7, pp. 1151–1155, Jul. 1997.

[6] C. Hermann et al., “A 0.6 V 1.6 mW transformer based 2.5 GHz downconversion

mixer with 5.4 dB gain and