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1 March 25, 2022 1 March 25, 2022 March 25, 2022 Azusa, Azusa, CA CA Sheldon X. Liang Ph. D. Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/ CS400 Compiler Construction CS400 Compiler Construction CS@APU: CS400 Compiler CS@APU: CS400 Compiler Construction Construction

1 October 18, 2015 1 October 18, 2015October 18, 2015October 18, 2015 Azusa, CA Sheldon X. Liang Ph. D. Azusa Pacific University, Azusa, CA 91702, Tel:

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1April 20, 2023

1April 20, 2023April 20, 2023 Azusa, CAAzusa, CA

Sheldon X. Liang Ph. D.

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS400 Compiler ConstructionCS400 Compiler Construction

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

2

Register Allocation

Consists of two parts: register allocation

What will be stored in registers Only unambiguous values

register assignment Which register will be assigned to each variable?

Goal : minimize spills How hard is it?

BB w/ one size of data: polynomial otherwise, NP-complete

based on graph coloring.

April 20, 20232

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

3April 20, 2023

3Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

Keep in mind following questionsKeep in mind following questions

Register allocation Register allocation and assignment NP complete Graph coloring

Local register allocation Within a local block Top-down approach insufficient

Global register allocation Live range Interference graph Graph coloring

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

4

Local Register Allocation

Within a basic block Top-down

Assign registers to the most heavily used variables

Traverse the block Count uses Use count as a priority function Assign registers to higher priority variables first

Advantage Heavily used values reside in registers

Disadvantage Does not consider non-uniform distribution of uses

April 20, 20234

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

5

Local Register Allocation

Is is sufficient? Does not take into account that some instructions

(e.g. those in loops) execute more frequently Forces us to store/load at basic block endpoints

since each block has no knowledge of the context of others.

We need Global Register Allocation Find out the live range(s) of each variable

The area(s) where the variable is used/defined. Cost of spilling will depend on frequencies and

locations of uses.April 20, 2023

5Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

6

Global register allocation Global register allocation can be seen as a graph coloring

problem Basic idea:

Identify the live range of each variable Build an interference graph that represents conflicts between

live ranges (two nodes are connected if the variables they represent are live at the same moment)

Issue : copy statements Coalesce live ranges?

Try to assign as many colors to the nodes of the graph as there are registers so that two neighbors have different colors.

In what order should we assign colors? Must define priority

April 20, 20236

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

7

Global register allocation

Estimating the cost of not assigning a register.

Size of live range Number of uses/definitions Frequency of execution Number of loads/stores needed. Cost of loads/stores needed.

April 20, 20237

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

8

Global register allocation Priority-based graph coloring

Live Range = a group of flow graph nodes in which a variable is defined and referenced.

Typically determined by a definition of a variable: The definition and all uses that it reaches (du-chain) define the live range. Additionally, if a use in this live range is reached by another definition (examine ud-chains), the ranges "merge".

Non-local references complicate this. Collect live variable info?

The live range is not necessarily contiguous.

April 20, 20238

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

9

Global register allocation Priority-based graph coloring

We will need LOADs at the entry points of the live range and STOREs at the exit points.

Consider:

April 20, 20239

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

10

Global register allocation Priority-based graph coloring

We will need LOADs at the entry points of the live range and STOREs at the exit points.

LOAD conditions: There is a reference before a definition AND

BB is an entry point to the live range BB is not an entry point but its predecessor has a

procedure call that accesses the variable. STORE conditions:

The live range contains definitions of the variable The variable is not dead on exit

BB is exit, but variable is not local BB ends in procedure call that accesses variable Variable is live in next block (this may apply after a split) Variable is LOADed in next block.

April 20, 202310

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

11

Global register allocation Priority-based graph coloring

LR(x) = {B | x is live at B} {B | x is reaching in B }

x live at B = x is referenced in B (before any definition), or x live at the end of B

x reaching in B = a definition of x reaches B a use of x (backwards-) reaches B

April 20, 202311

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

12

Global register allocation Priority-based graph coloring

Interference graph: nodes : live ranges of variables edges : two live ranges are connected if their

intersection in non-empty meaning : if two live ranges are connected, then the

variables they represent are both live at the same point, so they will need to be stored in different registers

April 20, 202312

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

13

Global register allocation Priority-based graph coloring

Priorities: Each live range lr is assigned a priority that measures

the relative benefits of assigning it to a register The priority function is

The size of the live range is the number of nodes in it. We must take into account loop structure.

)()(

)Pr(lrSIZE

lrTOTALSAVElr

April 20, 202313

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

14

Global register allocation Priority-based graph coloring

TOTALSAVE (lr) = (NETSAVEB nestingdepthB)

NETSAVE = LOADSAVE num_uses

+ STORESAVE num_defs

MOVECOST num_moves

num_moves is 0, 1, or 2. It is determined by the number of LOADs and STOREs needed at entry and exit points.

April 20, 202314

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

15

Global register allocation Priority-based graph coloring

LOADSAVE = The amount of execution time saved for each use of a variable residing in a register rather than

memory

STORESAVE = The amount of execution time saved for each definition of a variable residing in a register

rather than memory

MOVECOST = The cost of a memory-to-register or register-to-memory move.

• if the first occurrence of a variable in its live range is a use, then it must be loaded from memory

• if the variable is live at the end of its live range, then it must be stored to memory.

April 20, 202315

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

16

Global register allocation Priority-based graph coloring

unconstrained live range : a live range that has fewer neighbors in the interference graph than there are registers. It can ALWAYS be colored, so we color it last.

constrained live range : any range that is not unconstrained :)

April 20, 202316

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

17

Global register allocation Priority-based graph coloring

The coloring algorithm

1. Identify and set aside the unconstrained live ranges

2. While there remain constrained live ranges and more registers to be assigned, repeat steps (a) to (c)

(a) Compute the priority of each live range

(b) Assign a color to the live range lr with highest priority

(c) Update available color info for lr's neighbors. Check if any

need to be split and, if so, apply splitting algorithm.

3. Assign colors to the unconstrained live ranges

April 20, 202317

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

18

Global register allocation Priority-based graph coloring

The splitting algorithm

1. Find a block in lr in which the first appearance is a definition, preferably an entry point. Else, start with the first block that contains a use. This basic block must have available registers.

2. For each successor of the first block, check if it can be added to the new live range

3. Once the new live range has been determined, update the interference graph

April 20, 202318

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

19April 20, 2023

19Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

Got it with following questionsGot it with following questions

Register allocation Register allocation and assignment NP complete Graph coloring

Local register allocation Within a local block Top-down approach insufficient

Global register allocation Live range Interference graph Graph coloring

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction

20

Thank you very much!

Questions?

April 20, 202320

Azusa Pacific University, Azusa, CA 91702, Tel: (800) 825-5278 Department of Computer Science, http://www.apu.edu/clas/computerscience/

CS@APU: CS400 Compiler ConstructionCS@APU: CS400 Compiler Construction