354 33 Powerpoint-slides CH20

8/12/2019 354 33 Powerpoint-slides CH20

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N. Senthil Kumar,M. Saravanan &

S. Jeevananthan


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8096 INSTRUCTION SET AND

PROGRAMMING

Oxford University Press 2013


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Bytes Bytes are unsigned 8-bit variable, which can take on

the values between 0 and 255. Arithmetic and relational operators can be applied to

byte operands but the result must be interpreted in

modulo 256 arithmetic. Logical operations on bytes are applied bit wise. Bits within BYTES are labeled from 0 to 7, with 0

being the least significant bit.

These are no alignment restrictions for bytes, so theymay be placed any where in the address space.



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Words

Words are unsigned 16-bit variable, which can take on thevalues between 0 and 65535. Arithmetic and Relational operators can be applied to word

operands but the result must be interpreted in module 65536

arithmetic. Logical operations on words are applied bit wise. Bits within

words are labeled from 0 to 15 with 0 being the LSB. Words must be aligned at even byte boundaries in the MCS96

address space. The least significant byte of the WORD is in the even byte

address and the MSB is in the next higher (odd) address. The address of a word is the address of its LSB.



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Double Words Double words are unsigned 32 bit variables, which can

take on the values between 0 and 4, 294,967,295. The MCS 96 architecture provides direct support for this

operand type only for shifts and as the dividend in a 32by 16 divide and the product of a 16 by 16 multiply.

For these operations double word variables must residein the on board register file of the 8096 and be aligned atan address, which is evenly divisible by 4.

A double word operand is addressed by the address of itsleast significant byte.


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Long Integers Long integers are 32 bit signed variables, which can take

on the values between 2,147,483,648 and2,147,483,647.

The MCS96 architecture provides direct support for thisdata type only for shifts and as the dividend in a 32 by 16divide and the product of a 16 by 16 multiply.

Long integers can also be normalized. For theseoperations a long integer variable must reside in the on

board register file of the 8x9x and be aligned at anaddress, which is evenly divisible by 4. A long integer is addressed by the address of its least

significant byte.


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Addressing Modes Register direct Register indirect Register indirect with auto increment Immediate addressing Short indexed addressing Long indexed addressing


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Register-Direct Certain register names may be used as part of the opcode

mnemonic as source or destinations of data. The register direct mode is used to directly access a register

from the 256 byte on board register file. The register is selected by an 8 bit field within the instruction

and register address must conform to the alignment rules for theoperand type.

Depending on the instruction, up to three registers can take partin the calculation.

(Eg.)ADD AX, BX, CX ; AX =BX+CXMUL AX, BX ; AX =AX * BXINCB CL ; CL = CL + 1


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Indirect References The indirect mode is used to access an operand by placing its address in a

WORD variable in the register file. The calculated address must conform to the alignment rules for the

operand type. The indirect address can refer to an operand anywhere within the address

space of the 8x9x, including the register file. The register which contains the indirect address is selected by an eight-bit

field within the instruction. An instruction can contain only one indirect reference and the remaining

operands of the instruction ( if any) must be register direct references. e.g.

LD AX, [AX] ; AX = MEMWORD_CONTENT(AX)ADDB AL, BL,[CX] ; AL = BL + MEMBYTE_CONTENT(CX)


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Indirect With Auto IncrementReferences

This addressing mode is the same as the indirect mode exceptthat the WORD variable, which contains the indirect address,is incremented after it is used to address the operand.

If the instruction operates on BYTES or SHORT INTEGERS the

indirect address variable will be incremented by one, if theinstruction operates WORDS or INTEGERS, the indirectaddress variable will be incremented by two.

e.g.

LD AX, [BX];AX=MEMWORD_CONTENT(BX); BX = BX +2ADDB AL, BL, [CX]+ ;AL = BL + MEMBYTE_CONTENT(CX): X=CX+1


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Immediate References Immediate addressing identifies the operand as part of the

instruction itself. An immediate operand is represented by a # prefix. For operations on BYTE or SHORT INTEGER operands this field is

eight bits wide, for operations on WORD or INTEGER operands,the field is 16 bits wide.

An instruction can contain only one immediate reference andthe remaining operands must be register direct references.

e.g.ADD AX, #340 ; AX=AX+340PUSH # 1234H ; SP=SP-2; MEM_WORD (SP)=1234HDIVB AX, #10 ; AL=AX/10; AH=AX MOD 10


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Short Indexed References

In this addressing mode an 8-bit field in the instruction selectsa WORD variable in the register file, which is assumed tocontain an address.

A second eight-bit field in the instruction stream is signextended and summed with the WORD variable to form theaddress of the operand, which will take part in the calculation

An instruction can contain only one short indexed referencesand the remaining operands must be register-directreferences.

e.g.

LD AX, 12[BX] ; AX =MEM_WORD [BX+12]MULB AX, BL, 3[CX] ; AX = BL * MEM_ B Y TE (CX+3)


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Long Indexed Addressing This addressing mode is like the short indexed mode except

that a 16-bit field is taken from the instruction and added tothe WORD variable to form the address of the operand.

No sign extension is necessary. An instruction can contain only one long indexed reference

and the remaining operands must be register-directreferences.

e.g.

AND AX, BX, TABLE [CX] ; AX=BX AND MEM_WORD TABLE+CX)ST AX, TABLE [BX] ; MEM_WORD (TABLE+BX)=AX


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Zero Register Addressing The first two bytes in the register file are fixed at ZERO by the

8096 hardware. In addition to providing a fixed source of the constant Zero for

calculations and comparisons, this register can be used as theWORD variable in a long indexed reference.

This combination of register selection and address modeallows any location in memory to be addressed directly.

e.g.ADD AX, 1234[0]; AX=AX+MEM_WORD (1234)

POP 5678[0]; MEM_WORD(5678) :MEM_WORD (SP); SP = SP + 2


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Stack Pointer The system stack pointer in the 8x9x can be accessed as

register 18H of the internal register file. In addition to providing for convenient manipulation of

the stack pointer, this also facilitates the accessing ofoperands in the stack

The top of the stack (for example) can be accessed byusing the stack pointers as the WORD variable in anindirect reference.

In a similar fashion the stack pointer can be used in theshort indexed mode to access data within the stack.

e.g.PUSH [SP] :DUPLICATE TOP_O F _ STACKLD AX, 2[SP] :AX = NEXT_TO_TOP


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Classification of Instructions Data Transfer Instructions Arithmetic and Logical instructions Shift & Rotate Instructions Branching Instructions


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Data Transfer Instructions


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Arithmetic and Logical instructions


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Arithmetic and Logical instructions


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Shift and Rotate Instructions


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Unconditional Branching Using 8-bitOffset Address

Branch following a signed number comparison JLT offset Jump if N=1, PC PC+8-bit offset JGT offset Jump if N=0 and Z=0; PC PC+8-bit offset JGE offset Jump if N=0, PC PC+8-bit offset JLE offset Jump if N=1 and Z=1; PC PC+8-bit offset JE offset Jump if Z=1, PC PC+8-bit offset

JNE offset Jump if Z=0, PC PC+8-bit offset


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Branch Following an Unsigned NumberComparison

JC offset Jump if C=1, PC PC+8-bit offset

JNC offset Jump if C=0, PC PC+8-bit offset

JH offset Jump if C=1 and Z=0; PC PC+8-bit offset

JNH offset Jump if C=0 and Z=1; PC PC+8-bit offset

JE offset Jump if Z=1, PC PC+8-bit offset

JNE offset Jump if Z=0, PC PC+8-bit offset


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Branch Following a Flag BitChecking

JV offset Jump if V=1, PC PC+8-bit offset JNV offset Jump if V=0, PC PC+8-bit offset JVT offset Jump if VT=1 and clear VT, PC PC+8-bit offset JNVT offset Jump if VT=0, PC PC+8-bit offset JST offset Jump if ST=1, PC PC+8-bit offset JNST offset Jump if ST=0, PC PC+8-bit offset

Branch following bit value JBS offset Jump if specified bit =1, PC PC+8-bit offset JBC offset Jump if specified bit =0, PC PC+8-bit offset

Branch following Comparison DJNZ offset Decrement register and jump if the contents is not zero.


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Complete 8096 Instruction SetKeys:

BS, BS1, BS2 Byte type source operand having a page 0 address

WS, WS1, WS2 Word type source operand having a page 0 evenaddress

BD Byte type destination operand having a page 0 address

WD Word type destination operand having a page 0 even address

LD Long Word type destination operand having a page 0 address

Label 8-bit offset address


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Programming ExamplesUsing 8096 Instruction Set

To add two 16 bit Hex numbers residing in registers and storethe result in memory.

Ld ax, #8500h

Ld bx, #1234hLd cx, #5678hAdd dx, bx, cx

St dx, [ax]+

here: sjmp here


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To find the difference of two 16- bit hex number residing in register and store theresult in memory.

Ld ax, #8500h

Ld bx, #9999hLd cx, #369chSub dx, bx, cxSt dx, [ax]+

here: sjmp here

16 bit multiplicationLd ax, #8500hLd bx, #ofedchLd cx, #oba98h

Mul lx, bx, cxSt Ll, [ax]+St Lh, [ax]+

here: sjmp here


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32 Bit division To perform division of a 32 bit number by a 16-bit number and

store the quotient and remainder in memory

Ld ax, #8500hLd bx, #0F F F Eh

Ld Ll, #0EF F F hLd Lh, #0F F F F h

Div lx, bx

St Ll, [ax]+St Lh, [ax]+

here: sjmp here


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Multiplication of a given number:

Ld ax, #8500hLd bx, #0F F EhShl bx, #4h :Multiplication by 16St bx, [ax]+

Here: sjmp here

Division of a given number:

Ld ax, #8500hLd bx, #0F F EhShr bx, #4h :Division by 16St bx, [ax]+

here: sjmp here


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store numbers from FF to 00 in consecutive memory location. We have to store 256 numbers from FF to 00 in successive

memory locations. Hence the process has to be done 256times. The BL register is initialized with FF and used for thelooping or continuation of the process.

In this example, the number array is assumed to start atlocation 8500 as indicated by Ax. After execution [8500]=FF,

[8501]=FE and so on upto [85 F F ]=00Ld ax, #8500h

Ld b bl, #0F F hL1: Stb bl, [ax]+

DJNZ b1, L1

St b b1, [ax]+here: SJMP here


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To use subroutine to determine the highest of the given two bytes.Ld ax, #8500hLd b bl, [ax]+Ld b bh, [ax]+SCALL FindhghSt b cl, [ax]+

here: SJMP here

Subroutine:Findhgh:

cmp bl, bh jgt fvalLd b cl, bh

retfval: Ld b cl, blRet


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Changing sign of a number

Ld Reg1, #8500HLd Reg2, #9999hNEG Reg2St Reg2, [Reg1]here SJMP here

NORMAL Instruction: To demonstrate normalize long integer instruction.

The example uses two register namely Reg1 & Reg2. NORMAL Reg1, Reg2means Reg1 is left shifted until its most sign bit is 1. Reg2 will contain the number ofshifts required to perform this operation.

Program:Ldb Reg1, #dataNORMAL Reg1, Reg2Stb Reg2, 8500H

Move: SJMP Move


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354 33 Powerpoint-slides CH20