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Chapter 3Chapter 3

8051/8031 Family MCU

Architecture

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Ch03L4-"Microcontrollers....", RajKamal, from Pearson Education,

Port P3 Port P2

Port P1

Port P0 T1 Timer/Counter

T0 Timer CounterWDT

Lesson 4Lesson 4

SI

T2 Timer Counter (8052)

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A Timer

Timer is a counter gettingconstant interval periodic inputsfrom a clock source

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A timer Example

n-bit counter

Clock Inputs period = 1 s

for 12 MHz XTAL

Example Overflowsafter 2 nclockinputs if initialcount bitsall 0s.

Timeroverflowinterrupt if notmasked, anISRexecutes

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A Counter

Counter is a timer gettingirregular interval inputs froman event source

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A Counter Example

n-bit counter

Count Inputs from a

source on the events

Example Overflowsafter 2 ncountinputs if initialcount bitsset = all 0s.

Counteroverflowinterrupt if notmasked, anISRexecutes

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8051/8052 Timing/Counting Devices8051/8052 Timing/Counting Devices T1 and T0 and T2T1 and T0 and T2

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Outline Timers T1 and T0 and overflows,Timers T1 and T0 and overflows,

masking and priorities of theirmasking and priorities of theirinterruptsinterrupts

T2 (8052)T2 (8052) Modes 0, 1, 2 and 3

Timers Control and

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Timer-Counter T1/T0 SFRs RegisterT1/T0 16-bit in SFRs

8DH

Write/Read upper bits Write/Read lowerbits

8CH

T1/T0 16-bit in SFRs

8BH 8AH

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T1/T0 Timer/Counter

Features stop, reload,internal/external

clocking/event-inputsOverflow transition to

all bits = 0s

TF1 and TF0 bit at

TCON.7 andTCON.5 and a TFresets on an ISRstart

ET1 atIE.3 = 1

enables T1interrupt.ET0 atIE.1 = 1enables T0interrupt

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T1/T0 can gets inputs from externalinputs.

T1/T0 can be externally gated to run

T1/T0 can be stopped, Can be writtenfor load. Can be read on instructionfor move, store or add or otherexecutes.

Inputs period = 1 s for 12 MHz XTAL

when internal timer clocking mode isused.

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Event counter T1 and T0 gets countinputs from T1 and T0 pin (P3.5 andP3.4) or from the system Internal clock

T1/T0 Increments by -ve edges whenTR1/TR0 written = 1 atTCON.6/TCON.4, respectively

PT1 at IP.3 = 1 enables priority high for T1interrupt. PT0 at IP.1 = 1 enables priorityhigh for T0 interrupt.

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Outline Timers T1 and T0 and overflows,

masking and priorities of theirinterrupts

T2 (8052)T2 (8052) Modes 0, 1, 2 and 3

Timers Control

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Timer-Count T2 SFRs

T2 16-bit SFRs

CDH

Write/Read upper bitsWrite/Read lowerbits-ve edge inputs

CCHTH2 TL2

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Six Timer2 Functions

Timer

16-bits

Counter

16-bits

Input CaptureT2 16-bits atSFRs RCAP2H

and RCAP2L onan external inputedge

Reload the

presetvalue againon overflowand restart

Load

fromSFRsRCAP2HandRCAP2L

TCLK

RCLK

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An Input Capture of Timer

An edge forcing coping of thecounter reading into CaptureRegister if capture enabled

16-bit counter

Clock Inputs

16-bit CaptureRegister

Timercaptureinterrupt if notmasked, anISRexecutes

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A Reload of Counter on an input

An edge forcing coping of theinto counter starting value fromLoad Register if captureenabled

16-bit counter

Count Inputs

16-bit LoadRegister

Timer

reloadinterrupt if not

masked, anISRexecutes

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Reload-Capture T2 SFRs

T2 16-bit SFRs

CBH

Write/Read upper bitsWrite/Read lowerbits-ve edge input

capture

CAHRCAP2H RCAP2L

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Outline

Timers T1 and T0 and overflows ,masking and priorities of theirinterrupts

T2 (8052)T2 (8052)

Modes 0, 1, 2 and 3Modes 0, 1, 2 and 3

Timers control

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Timer-counter T1

Mode 2

16- bitstimer-counter

Mode 0 Mode 1

TH1 counts after pre

scaling by factor of 32

8- bits

Pre-scaling means thecounts or clock-inputsdivide by 32 before TH1gets the inputs.TL1 does

prescaling

TL1 counts the

count/clockinputs. TL1loads countsfrom TH1 onstart and oneach overflow

8- bits

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Timer-counter T1

Mode 2

16- bits

Mode 0 Mode 1 Mode3

8- bits

T1 stopped (frozen) as TH0functions as 8-bit timer-counter in place ofT1

TL0 as 8-bit timer-counter T0

8- bits

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Timer-counter T0

Mode 2

16- bits

Mode 0 Mode 1

TH0 counts after pre

scaling by factor of 32

Mode3

8- bits

Pre-scaling meansthe counts or clock-inputs divide by 32before TH0 gets the

inputs

TL0 counts thecount/clock inputsTL0 loads counts

from TH0 on startand on each overflow

8- bits

TL0 does pre-scaling

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Timer-counter T0

Mode 2

16- bits

Mode 0 Mode 1 Mode3

8- bits

T1 stopped (frozen) as TH0functions as an 8-bit timer-counter in place ofT1

TL0 as another 8-bit timer-counter T0

8- bits

T0-Two 8-bits

timers/ counters

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Write 4 mode/control bits in 8-bitTMOD for the timerT1 and Write 4

mode/control bits in 8-bit TMOD forthe timerT0

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T1 mode sets =0, 1, 2 or 3 byM1-M0

T0 mode sets = 0, 1, 2 or 3by M1-M0

b7 b5-b4b6 b3 b1-b0b2

GT1 Gate C/T1

GT0 Gate C/T0

TMOD SFR at 89H

Set T1/T0 Mode and control bits

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GT1 bit = 1 disables T1 gate1 pin inputGT1, T1 runs only by TR1 bit set =1.When bit = 0, T1 run enables after gate1

pin input = 0 after the TR bit is setGT0 bit = 1 disables T0 gate0 pin input

GT0, T0 runs only by TR0 bit set =1.When bit = 0, T0 enables run after gate0pin input = 0 after the TR bit is set

Define disable/enable T1/T0 gate input

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C/T1 bit = 1 disables internal clock inputs,T1 runs by external count-inputs at T1pin.When bit = 0, enables internal clock

inputs to T1, disable T1 pin inputsC/T0 bit = 1 disables internal clock

inputs, T0 runs by external count-inputsat T0 pin.When bit = 0, enables internalclock inputs to T0, disables T0 pin inputs.

Defining T1/T0 as counter or timer

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Outline Timers T1 and T0 and overflows,

masking and priorities of theirinterrupts

T2 (8052)T2 (8052) Modes 0, 1, 2 and 3

Timers controlTimers control

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TCON: T1-T0 Control and status SFR

TCON 8-bit SFR

88H

Write/Readbit5-bit4 set thendefine the RCLK-TCLK for SI baud

rates using T2 elseT1 defines baud

rate

TR1-TR0 at bit 6-bit 4run the T1-T0

FlagsTF1-TF0

at bit7-bit5

IT0-IE0 bit0-bit1

Bit Addresses 88HBit Addresses 88H --8FH8FH

IT1-IE1 bit2-bit3

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Timer overflow Flags TF1-TF0 forT1andT0 overflows

TCON.7 and TCON.5 show the flagstatuses

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Timer Run control TR1-TR0 forT1andT0 run

TCON.6 and TCON.4 control therunning of T1-T0

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IE0 bit = 1 at TCON.0 enable interruptand = 0 disables at INT0 (GT0) pin

Enable/disable Interrupt at INT0 /INT1pin

IE1 bit = 1 at TCON.3 enable -ve edgetransition interrupt and = 0 enables level

0 interrupt at INT1 (GT1) pin

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IT0 bit = 1 at TCON.0 enable -ve edgetransition interrupt and = 0 enables level0 interrupt at INT0 pin

Defining Interrupt type atINT0/INT1 pin

IT1 bit = 1 at TCON.2 enable -ve edgetransition interrupt and = 0 enables level

0 interrupt at INT1 pin

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T2 Control and status SFR

T2CON 8-bit SFR

C8H

Write/Read

bit5-bit4 set thendefine the RCLK-TCLK for SI baud

rates using T2 elseT1 defines baud

rate

TR2 at bit 2 = 2 runsthe T2

FlagsTF2-

EXF2 atbit7-bit6

CP/RL2 bit0,EXEN2 bit3

Bit Addresses C8HBit Addresses C8H --CFHCFH

C/T2 bit1

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C/T2 bit = 1 at T2CON.1 disables internalclock inputs, T2runs by external count-inputs at T2 pin.When bit = 0, enables

internal clock inputs to T1, disable T1 pininputs

Defining T2 as counter or timer

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Timer overflow Flag TF2 for T2overflow

T2CON.7 shows the flag status

EXEN at T2CON 2 enables e ternal inp t

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Timer Capture Flag EXF2 = 1 a -ve edge at

P1.1 causes input capture of T2 and T2 savesat RCAP2H-RCAP2L provided EXEN controlbit is 1 and when CP/RL2 (T2CON.0) = 1(defined for capture)

EXEN at T2CON.2 enables external inputcapture or reload by -ve edge at P1.1T2EX/INT2 pin

Timer Capture Flag EXF2 = 1 a -ve edge atP1.1 pin forces the T2 reload from RCAP2H-RCAP2L provided EXEN control bit is 1 andwhen CP/RL2 (T2CON.0) = 0 (defined for

reload)

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Summary

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Timer DevicesT0 and T1 T0 functions in 4 modes

T1 functions in 3 modes

Four modes are 8-bit mode with pre-scaling by 32, 16-bit mode, 8-bitauto reload mode and twoindependent 8-bit timers mode

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Timers T0, T1 and T2 Actions T0, T1 and T2 overflows and interrupts

T2 captures 16-bit T2 in RCAP2H-RCAP2L on a reload input

T2 reloads 16-bit from RCAP2H-RCAP2L on a reload input T2 controls RCLK-TCLK in place of T1

for SI device

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End of Lesson 4 on8051/52 Timing Devices

T0, T1 and T2,

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THANK YOU

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