22 kΩ

To Three Other Drivers

Common to All Four Drivers

GND

Enable G

Enable G

VCC

V

V

Output Y

9 Ω

Input A

22 kΩ

22 kΩ

All resistor values are nominal.

Output Z

9 Ω

Copyright © 2016, Texas Instruments Incorporated

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英語版のTI製品についての情報を翻訳したこの資料は、製品の概要を確認する目的で便宜的に提供しているものです。該当する正式な英語版の最新情報は、www.ti.comで閲覧でき、その内容が常に優先されます。TIでは翻訳の正確性および妥当性につきましては一切保証いたしません。実際の設計などの前には、必ず最新版の英語版をご参照くださいますようお願いいたします。

English Data Sheet: SLLS114

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31MJAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018

参参考考資資料料

AM26LS31x ククワワッッドド差差動動ラライインン・・ドドラライイババ

1

1 特特長長1• ANSI TIA/EIA-422-BとITUの要件を満たす、また

は超える性能• 5V単一電源で動作• TTL互換• 相補出力• 電源オフ状況での高い出力インピーダンス• 相補出力のイネーブル入力• MIL-PRF-38535認定オプション(M)対応：

特に記述のない限り、すべてのパラメータはテスト済みです。他のすべての製品については、量産プロセスにすべてのパラメータのテストが含まれているとは限りません。

2 アアププリリケケーーシショョンン• モータ・エンコーダ• フィールド・トランスミッタ：圧力センサおよび

温度センサ• 軍事/航空電子向け画像処理• Modbus使用の温度センサまたはコントローラ

3 概概要要AM26LS31ファミリのデバイスは、クワッド相補出力ライン・

ドライバで、ANSI TIA/EIA-422-BおよびITU（従来の

CCITT）勧告V.11の要件を満たすよう設計されています。

3ステート出力は、ツイストペアまたは平行線伝送線路など

の平衡ラインを駆動するための大電流能力を備え、電源

オフ時には高インピーダンス状態になります。イネーブル

機能は4つのドライバすべてに共通で、アクティブHIGHまたはアクティブLOWのイネーブル（G、G）入力を選択で

きます。低消費電力のショットキー回路により、速度を犠牲

にすることなく消費電力を削減しています。

製製品品情情報報(1)

型型番番 パパッッケケーージジ 本本体体ササイイズズ（（公公称称））

AM26LS31MFK LCCC (20) 8.89mm×8.89mmAM26LS31MJ CDIP (16) 19.60mm×6.92mmAM26LS31MW CFP (16) 10.30mm×6.73mmAM26LS31CD SOIC (16) 9.90mm×3.91mmAM26LS31CDB SSOP (16) 6.20mm×5.30mmAM26LS31CN PDIP (16) 19.30mm×6.35mmAM26LS31xNS SO (16) 10.30mm×5.30mm

(1) 利用可能なすべてのパッケージについては、このデータシートの末尾にある注文情報を参照してください。

回回路路図図（（各各ドドラライイババ））

2

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31MJAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018 www.ti.com

Copyright © 1979–2018, Texas Instruments Incorporated

目目次次1 特特長長.......................................................................... 12 アアププリリケケーーシショョンン ......................................................... 13 概概要要.......................................................................... 14 改改訂訂履履歴歴................................................................... 25 Pin Configuration and Functions ......................... 36 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ..................................... 46.2 ESD Ratings.............................................................. 46.3 Recommended Operating Conditions....................... 46.4 Thermal Information .................................................. 46.5 Electrical Characteristics .......................................... 56.6 Switching Characteristics – AM26LS31 .................... 56.7 Switching Characteristics – AM26LS31M................. 56.8 Typical Characteristics .............................................. 6

7 Parameter Measurement Information .................. 88 Detailed Description .............................................. 9

8.1 Overview ................................................................... 98.2 Functional Block Diagram ......................................... 9

8.3 Feature Description................................................... 98.4 Device Functional Modes........................................ 10

9 Application and Implementation ........................ 119.1 Application Information............................................ 119.2 Typical Application ................................................. 11

10 Power Supply Recommendations ..................... 1311 Layout................................................................... 13

11.1 Layout Guidelines ................................................. 1311.2 Layout Example .................................................... 13

12 デデババイイススおおよよびびドドキキュュメメンントトののササポポーートト ....................... 1412.1 ドキュメントのサポート .............................................. 1412.2 関連リンク ............................................................... 1412.3 ドキュメントの更新通知を受け取る方法..................... 1412.4 コミュニティ・リソース ................................................ 1412.5 商標 ....................................................................... 1412.6 静電気放電に関する注意事項 ................................ 1412.7 Glossary ................................................................ 14

13 メメカカニニカカルル、、パパッッケケーージジ、、おおよよびび注注文文情情報報 ................. 14

4 改改訂訂履履歴歴資料番号末尾の英字は改訂を表しています。その改訂履歴は英語版に準じています。

Revision K (July 2016) かからら Revision L にに変変更更 Page

• Changed VCC pin number From: 8 To: 16 in the Pin Functions table .................................................................................. 3• Changed GND pin number From: 16 To: 8 in the Pin Functions table ................................................................................. 3

Revision J (January 2014) かからら Revision K にに変変更更 Page

• 「アプリケーション」セクション、「製品情報」表、「ESD定格」表、「機能説明」セクション、「デバイスの機能モード」セクション、「アプリケーションと実装」セクション、「電源に関する推奨事項」セクション、「レイアウト」セクション、「デバイスおよびドキュメントのサポート」セクション、「メカニカル、パッケージ、および注文情報」セクションを追加............................................................... 1

• Split up Switching Characteristics table into two tables specified for each part..................................................................... 5

Revision I (February 2006) かからら Revision J にに変変更更 Page

• 新しいTIデータシート・フォーマットにドキュメントを更新 - 仕様変更なし....................................................................................... 1• 「注文情報」表を削除 ................................................................................................................................................................ 1• 「特長」を更新........................................................................................................................................................................... 1• 追加 「デバイスおよびドキュメントのサポート」セクション ............................................................................................................ 14

192013 2

17

18

16

15

14

1312119 10

5

4

6

7

8

4Y

4Z

NC

G

3Z

1Z

G

NC

2Z

2Y

1Y

1A

NC

V 4A

GN

D

NC

3A

3Y

2A

CC

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1A

1Y

1Z

G

2Z

2Y

2A

GND

VCC

4A

4Y

4Z

G

3Z

3Y

3A

3

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31Mwww.ti.com JAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018

Copyright © 1979–2018, Texas Instruments Incorporated

5 Pin Configuration and Functions

D, DB, N , NS, J, or W PackageSOIC, SSOP, PDIP, SO, CDIP, or CFP

Top ViewFK Package20-Pin LCCC

Top View

Pin FunctionsPIN

I/O DESCRIPTIONNAME

SOIC, SSOP,PDIP, SO, CDIP,

or CFPLCCC

1A 1 2 I Logic Data Input to RS422 Driver number 11Y 2 3 O RS-422 Data Line (Driver 1)1Z 3 4 O RS-422 Data Line (Driver 1)G 4 5 I Driver Enable (active high)G 12 15 I Driver Enable (active Low)2A 7 9 I Logic Data Input to RS422 Driver number 22Y 6 8 O RS-422 Data Line (Driver 2)2Z 5 7 O RS-422 Data Line (Driver 2)3A 9 12 I Logic Data Input to RS422 Driver number 33Y 10 13 O RS-422 Data Line (Driver 3)3Z 11 14 O RS-422 Data Line (Driver 3)4A 15 19 I Logic Data Input to RS422 Driver number 44Y 14 18 O RS-422 Data Line (Driver 4)4Z 13 17 O RS-422 Data Line (Driver 4)VCC 16 20 – Power Input. Connect to 5-V Power Source.GND 8 10 – Device Ground Pin

4

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31MJAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018 www.ti.com

Copyright © 1979–2018, Texas Instruments Incorporated

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under Recommended OperatingConditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values, except differential output voltage VOD, are with respect to network GND.

6 Specifications

6.1 Absolute Maximum Ratingsover operating free-air temperature range (unless otherwise noted) (1)

MIN MAX UNITVCC Supply voltage (2) 7 VVI Input voltage 7 V

Output off-state voltage 5.5 VLead temperature 1,6 mm (1/16 in) from case for 10 s 260 °CLead temperature 1,6 mm (1/16 in) from case for 60 s J package 300 °C

Tstg Storage temperature –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD RatingsVALUE UNIT

V(ESD)Electrostaticdischarge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000V

Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000

6.3 Recommended Operating ConditionsMIN NOM MAX UNIT

VCC Supply voltageAM26LS31C 4.75 5 5.25

VAM26LS31M 4.5 5 5.5

VIH High-level input voltage 2 VVIL Low-level input voltage 0.8 VIOH High-level output current –20 mAIOL Low-level output current 20 mA

TA Operating free-air temperatureAM26LS31C 0 70

°CAM26LS31I –40 85AM26LS31M –55 125

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics applicationreport.

(2) The package thermal impedance is calculated in accordance with JESD 51-7.

6.4 Thermal Information

THERMAL METRIC (1)AM26LS31x

UNITD (SOIC) DB (SSOP) N (PDIP) NS (SO)16 PINS 16 PINS 16 PINS 16 PINS

RθJA Junction-to-ambient thermal resistance (2) 73 82 67 64 °C/WRθJC(top) Junction-to-case (top) thermal resistance 38.1 – – 32.6 °C/WRθJB Junction-to-board thermal resistance 34.7 – – 36.8 °C/WψJT Junction-to-top characterization parameter 7.1 – – 4.2 °C/WψJB Junction-to-board characterization parameter 34.4 – – 36.5 °C/W

5

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Copyright © 1979–2018, Texas Instruments Incorporated

(1) For C-suffix devices, VCC min = 4.75 V and VCC max = 5.25 V. For M-suffix devices, VCC min = 4.5 V and VCC max = 5.5 V.(2) All typical values are at VCC = 5 V and TA = 25°C.(3) Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

6.5 Electrical Characteristicsover operating free-air temperature range (unless otherwise noted) (1)

PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNITVIK Input clamp voltage VCC = MIN, II = –18 mA –1.5 VVOH High-level output voltage VCC = MIN, IOH = –20 mA 2.5 VVOL Low-level output voltage VCC = MIN, IOL = 20 mA 0.5 V

IOZOff-state (high-impedance-state)output current VCC = MIN,

VO = 0.5 V –20μA

VO = 2.5 V 20II Input current at maximum input voltage VCC = MAX, VI = 7 V 0.1 mAIIH High-level input current VCC = MAX, VI = 2.7 V 20 μAIIL Low-level input current VCC = MAX, VI = 0.4 V –0.36 mAIOS Short-circuit output current (3) VCC = MAX –30 –150 mAICC Supply current VCC = MAX, all outputs disabled 32 80 mA

6.6 Switching Characteristics – AM26LS31TA = 25°C, VCC = 5 V (see Figure 11)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

tPLHPropagation delay time, low- tohigh-level output

CL = 30 pF, S1 and S2 open14 20

nstPHL

Propagation delay time, high- tolow-level output 14 20

tPZH Output enable time to high levelCL = 30 pF

RL = 75 Ω 25 40ns

tPZL Output enable time to low level RL = 180 Ω 37 45tPHZ Output disable time from high level

CL = 10 pF, S1 and S2 closed21 30

nstPLZ Output disable time from low level 23 35tSKEW Output-to-output skew CL = 30 pF, S1 and S2 open 1 6 ns

6.7 Switching Characteristics – AM26LS31MTA = 25°C, VCC = 5 V (see Figure 11)

PARAMETER TEST CONDITIONS MIN MAX UNIT

tPLHPropagation delay time, low- to high-level output

CL = 30 pF, S1 and S2 open30

nstPHL

Propagation delay time, high- to low-level output 30

tPZH Output enable time to high levelCL = 30 pF

RL = 75 Ω 60ns

tPZL Output enable time to low level RL = 180 Ω 68tPHZ Output disable time from high level

CL = 10 pF, S1 and S2 closed45

nstPLZ Output disable time from low level 53tSKEW Output-to-output skew CL = 30 pF, S1 and S2 open 9 ns

IOH − High-Level Output Current − mA

VCC = 5.25 V

VCC = 4.75 V

VCC = 5 V

TA = 25 C°

See Note A

−H

igh

-Level O

utp

ut

Vo

ltag

e−

VV

OH

4

3

2

1

0

0 −20 −40 −60 −80 −100

−H

igh

-Level

Ou

tpu

t Vo

ltag

e−

V

TA − Free-Air Temperature − °C

IOH = −20 mA

IOH = −40 mA

VO

H

VCC = 5 V

See Note A

4

3

2

1

0

0 25 50 75

5

VI − Enable G Input Voltage − V

−O

utp

ut

Vo

ltag

e−

VV

O

VCC = 5.25 V

VCC = 5 V

VCC = 4.75 V4

3

2

1

0

0 1 2 3

5

6

Load = 470 Ω to VCC

TA = 25 C°

See Note B

VI − Enable G Input Voltage − V

TA = 25 C°TA = 0 C°

TA = 70 C°

−O

utp

ut

Vo

ltag

e−

VV

O4

3

2

1

0

0 1 2 3

5

6

VCC = 5 V

Load = 470 Ω to VCC

See Note B

VI − Enable G Input Voltage − V

VCC = 5.25 V

VCC = 5 V

VCC = 4.75 V

Load = 470 Ω to GND

TA = 25 C°

See Note A

−Y

Ou

tpu

t V

olt

ag

e−

VV

O4

3

2

1

0

0 1 2 3

VI − Enable G Input Voltage − V

VCC = 5 V

Load = 470 Ω to GND

See Note A

TA = 70 C°

TA = 0 C°

TA = 25 C°

−Y

Ou

tpu

t V

olt

ag

e−

VV

O

4

3

2

1

0

0 1 2 3

6

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31MJAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018 www.ti.com

Copyright © 1979–2018, Texas Instruments Incorporated

6.8 Typical Characteristics

A. The A input is connected to VCC during testing of the Y outputsand to ground during testing of the Z outputs.

Figure 1. Output Voltage vs Enable G Input Voltage

A. The A input is connected to VCC during testing of the Y outputsand to ground during testing of the Z outputs.

Figure 2. Output Voltage vs Enable G Input Voltage

B. The A input is connected to ground during testing of the Youtputs and to VCC during testing of the Z outputs.

Figure 3. Output Voltage vs Enable G Input Voltage

B. The A input is connected to ground during testing of the Youtputs and to VCC during testing of the Z outputs.

Figure 4. Output Voltage vs Enable G Input Voltage

A. The A input is connected to VCC during testing of the Y outputsand to ground during testing of the Z outputs.

Figure 5. High-Level Output Voltage vs Free-AirTemperature

A. The A input is connected to VCC during testing of the Y outputsand to ground during testing of the Z outputs.

Figure 6. High-Level Output Voltage vs High-Level OutputCurrent

VCC = 5 V

VI − Data Input Voltage − V

VCC = 4.75 V

No Load

TA = 25 C°

VCC = 5.25 V

−Y

Ou

tpu

t V

olt

ag

e−

VV

O

4

3

2

1

0

0 1 2 3

5

TA = 25 C°

No Load

TA = 0 C°

TA = 70 C°

VI − Data Input Voltage − V

−Y

Ou

tpu

t V

olt

ag

e−

VV

O

4

3

2

1

0

0 1 2 3

5

−L

ow

-Level O

utp

ut

Vo

ltag

e−

V

TA − Free-Air Temperature − C°

VCC = 5 V

IOL = 40 mA

See Note B

VO

L

0.4

0.3

0.2

0.1

0

25 50 75

0.5

0

IOL − Low-Level Output Current − mA

VCC = 5.25 V

VCC = 4.75 V

TA = 25 C°

See Note B

−L

ow

-Level

Ou

tpu

t V

olt

ag

e−

VV

OL

0.4

0.3

0.2

0.1

0

40 80 120

0.5

0 1006020

0.6

0.7

0.8

0.9

1

7

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31Mwww.ti.com JAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018

Copyright © 1979–2018, Texas Instruments Incorporated

Typical Characteristics (continued)

B. The A input is connected to ground during testing of the Youtputs and to VCC during testing of the Z outputs.

Figure 7. Low-Level Output Voltage vs Free-Air Temperature

B. The A input is connected to ground during testing of the Youtputs and to VCC during testing of the Z outputs.

Figure 8. Low-Level Output Voltage vs Low-Level OutputCurrent

Figure 9. Y Output Voltage vs Data Input Voltage Figure 10. Y Output Voltage vs Data Input Voltage

Waveform 1(see Note E)

Output Z

Output Y

Input A(see Notes B

and C)

VOL

VOH

VOL

VOH

3 V

tPHL

Skew SkewtPLH

tPLH

tPHL

0 V

PROPAGATION DELAY TIMES AND SKEW TEST CIRCUIT

VCCTest Point

S1

S275 Ω

180 Ω

CL(see Note A)

From OutputUnder Test

VOH

VOL

≈1.5 V

0 V

3 V

Enable G

Enable G(see Note D)

S1 OpenS2 Closed

S1 ClosedS2 Open

tPZH

tPZL

tPHZ

tPLZ

S1 ClosedS2 Closed

0.5 V

≈0 V

≈4.5 VS1 ClosedS2 Closed

≈1.5 V

ENABLE AND DISABLE TIME WAVEFORMS

See Note D

NOTES: A. CL includes probe and jig capacitance.B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 15 ns, tf ≤ 6 ns.C. When measuring propagation delay times and skew, switches S1 and S2 are open.D. Each enable is tested separately.E. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

1.3 V 1.3 V

1.5 V

1.5 V

1.5 V 1.5 V

Waveform 2(see Note E)

0.5 V

1.5 V

1.5 V

8

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31MJAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018 www.ti.com

Copyright © 1979–2018, Texas Instruments Incorporated

7 Parameter Measurement Information

Figure 11. Test Circuit and Voltage Waveforms

1Z

1Y

G

G

1A

4

12

1

2

3

2Z

2Y

2A7

6

5

3Z

3Y

3A9

10

11

4Z

4Y

4A15

14

13

Copyright © 2016, Texas Instruments Incorporated

9

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Copyright © 1979–2018, Texas Instruments Incorporated

8 Detailed Description

8.1 OverviewThe AM26LS31x differential bus transmitter is a monolithic integrated circuit designed for unidirectional datacommunication on transmission lines. It is designed for balanced transmission lines and meets ANSI StandardEIA/TIA-422-B and ITU Recommendation V.11.

The AM26LS31x has a four 3-state differential line drivers that operate from a single 5-V power supply. Thedriver also integrates active-high and active-low enables for precise device control.

The driver is designed to handle loads of a minimum of ±30 mA of sink or source current. The driver featurespositive- and negative-current limiting for protection from line fault conditions.

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Complementary Output-Enable InputsThe AM26LS31x can be configured using the G and G logic inputs to control transmitter outputs. Setting either Gto a logic HIGH or G to an logic LOW enables the transmitter outputs. If G is set to logic LOW and G is set tologic HIGH, the transmitter outputs are disabled. See Table 1 for a complete truth table.

8.3.2 High Output Impedance in Power-Off ConditionsWhen the AM26LS31x transmitter outputs are disabled using G and G, the outputs are set to a high impedancestate.

8.3.3 Complementary OutputsThe AM26LS31x is the driver half of a pair of devices, with the AM26LS32 being the complementary receiver. TIrecommends using these devices together for optimal performance, but any RS-422 compliant receive mustensure proper RS-422 communication and logic level translation.

10

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8.4 Device Functional ModesTable 1 lists the functional modes of the AM26LS31.

(1) H = high level, L = low level,X = irrelevant,Z = high impedance (off)

Table 1. Function Table (1)

(Each Driver)

INPUTA

ENABLES OUTPUTSG G Y Z

H H X H LL H X L HH X L H LL X L L HX L H Z Z

A DB

Z

Status

R

D R

D R

D R

AM26LS31 AM26LS32

Encoder

Interpolation

Electronics

Encoder Phase A

Encoder Phase B

Encoder Index

Status

xxx

xxx

xxx

xxx

xxx

xxx

xxx

xxx

xxx

xxx

xxx

Servo Drive Motion Controller

Copyright © 2016, Texas Instruments Incorporated

11

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9 Application and Implementation

NOTEInformation in the following applications sections is not part of the TI componentspecification, and TI does not warrant its accuracy or completeness. TI’s customers areresponsible for determining suitability of components for their purposes. Customers shouldvalidate and test their design implementation to confirm system functionality.

9.1 Application InformationWhen designing a system that uses drivers, receivers, and transceivers that comply with RS-422 or RS-485,proper cable termination is essential for highly reliable applications with reduced reflections in the transmissionline. Because RS-422 allows only one driver on the bus, if termination is used, it is placed only at the end of thecable near the last receiver. In general, RS-485 requires termination at both ends of the cable. Factors toconsider when determining the type of termination usually are performance requirements of the application andthe ever-present factor, cost. The different types of termination techniques discussed are unterminated lines,parallel termination, AC termination, and multipoint termination. Laboratory waveforms for each terminationtechnique (except multipoint termination) illustrate the usefulness and robustness of RS-422 (and, indirectly, RS-485). Similar results can be obtained if 485-compliant devices and termination techniques are used. Forlaboratory experiments, 100 feet of 100-Ω, 24-AWG, twisted-pair cable (Bertek) was used. A single driver andreceiver, TI AM26LS31 and AM26LS32C, respectively, were tested at room temperature with a 5-V supplyvoltage. Two plots per termination technique are shown. In each plot, the top waveform is the driver input and thebottom waveform is the receiver output. To show voltage waveforms related to transmission-line reflections, thefirst plot shows output waveforms from the driver at the start of the cable; the second plot shows input waveformsto the receiver at the far end of the cable.

9.2 Typical Application

Figure 12. Encoder Application

±3

±2

±1

0

1

2

3

4

5

0 0.1 0.2 0.3 0.4 0.5

Vol

tage

(V

)

Time (s)

Y A/B

C001

12

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31MJAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018 www.ti.com

Copyright © 1979–2018, Texas Instruments Incorporated

Typical Application (continued)9.2.1 Design RequirementsThis example requires the following:• 5-V power source• RS-485 bus operating at 10 Mbps or less• Connector that ensures the correct polarity for port pins

9.2.2 Detailed Design ProcedurePlace the device close to bus connector to keep traces (stub) short to prevent adding reflections to the bus line.

If desired, add external fail-safe biasing to ensure 200 mV on the A-B port, if the drive is in high impedance state(see Failsafe in RS-485 data buses).

9.2.3 Application Curve

Figure 13. Differential 120-Ω Terminated Output Waveforms (Cat 5E Cable)

AM26LS31

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

VCC

0.1uF

Reduce logic signal trace

where possible1A

GND

VCC

13

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31Mwww.tij.co.jp JAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018

Copyright © 1979–2018, Texas Instruments Incorporated

10 Power Supply RecommendationsPlace a 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies.

11 Layout

11.1 Layout GuidelinesFor best operational performance of the device, use good PCB layout practices, including:• Noise can often propagate into analog circuitry through the power supply of the circuit. Bypass capacitors are

used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry.– Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as

close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-supply applications.

• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effectivemethods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digitaland analog grounds, paying attention to the flow of the ground current.

• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. Ifit is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular asopposed to in parallel with the noisy trace.

• Place the external components as close to the device as possible. Keeping RF and RG close to the invertinginput minimizes parasitic capacitance.

• Keep the length of input traces as short as possible. Always remember that the input traces are the mostsensitive part of the circuit.

11.2 Layout Example

Figure 14. Layout Recommendation

14

AM26LS31, AM26LS31C, AM26LS31I, AM26LS31MJAJSGF9L –JANUARY 1979–REVISED OCTOBER 2018 www.tij.co.jp

Copyright © 1979–2018, Texas Instruments Incorporated

12 デデババイイススおおよよびびドドキキュュメメンントトののササポポーートト

12.1 ドドキキュュメメンントトののササポポーートト

12.1.1 関関連連資資料料関連資料については、以下を参照してください。

『RS-485データ・バスのフェイルセーフ』(SLYT080)

12.2 関関連連リリンンクク次の表に、クイック・アクセス・リンクを示します。カテゴリには、技術資料、サポートおよびコミュニティ・リソース、ツールとソフトウェア、およびサンプル注文またはご購入へのクイック・アクセスが含まれます。

表表 2. 関関連連リリンンクク製製品品 ププロロダダククトト・・フフォォルルダダ ササンンププルルととごご購購入入 技技術術資資料料 ツツーールルととソソフフトトウウェェアア ササポポーートトととココミミュュニニテティィ

AM26LS31 ここをクリック ここをクリック ここをクリック ここをクリック ここをクリック

AM26LS31C ここをクリック ここをクリック ここをクリック ここをクリック ここをクリック

AM26LS31I ここをクリック ここをクリック ここをクリック ここをクリック ここをクリック

AM26LS31M ここをクリック ここをクリック ここをクリック ここをクリック ここをクリック

12.3 ドドキキュュメメンントトのの更更新新通通知知をを受受けけ取取るる方方法法ドキュメントの更新についての通知を受け取るには、ti.comのデバイス製品フォルダを開いてください。右上の隅にある「通知を受け取る」をクリックして登録すると、変更されたすべての製品情報に関するダイジェストを毎週受け取れます。変更の詳細については、修正されたドキュメントに含まれている改訂履歴をご覧ください。

12.4 ココミミュュニニテティィ・・リリソソーーススThe following links connect to TI community resources. Linked contents are provided "AS IS" by the respectivecontributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms ofUse.

TI E2E™オオンンラライインン・・ココミミュュニニテティィ TIののE2E（（Engineer-to-Engineer））ココミミュュニニテティィ。。エンジニア間の共同作業を促進するために開設されたものです。e2e.ti.comでは、他のエンジニアに質問し、知識を共有し、アイディアを検討して、問題解決に役立てることができます。

設設計計ササポポーートト TIのの設設計計ササポポーートト役に立つE2Eフォーラムや、設計サポート・ツールをすばやく見つけることができます。技術サポート用の連絡先情報も参照できます。

12.5 商商標標E2E is a trademark of Texas Instruments.All other trademarks are the property of their respective owners.

12.6 静静電電気気放放電電にに関関すするる注注意意事事項項これらのデバイスは、限定的なESD（静電破壊）保護機能を内 蔵しています。保存時または取り扱い時は、MOSゲートに対す る静電破壊を防止するために、リード線同士をショートさせて おくか、デバイスを導電フォームに入れる必要があります。

12.7 GlossarySLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 メメカカニニカカルル、、パパッッケケーージジ、、おおよよびび注注文文情情報報以降のページには、メカニカル、パッケージ、および注文に関する情報が記載されています。これらの情報は、指定のデバイスに対して提供されている最新のデータです。このデータは予告なく変更されることがあり、ドキュメントが改訂される場合もあります。このデータシートのブラウザ対応版については、左側にあるナビゲーションを参照してください。

重重要要ななおお知知ららせせとと免免責責事事項項

TI は、技術データと信頼性データ（データシートを含みます）、設計リソース（リファレンス・デザインを含みます）、アプリケーションや設計に関する各種アドバイス、Web ツール、安全性情報、その他のリソースを、欠陥が存在する可能性のある「現状のまま」提供しており、商品性および特定目的に対する適合性の黙示保証、第三者の知的財産権の非侵害保証を含むいかなる保証も、明示的または黙示的にかかわらず拒否します。

これらのリソースは、TI 製品を使用する設計の経験を積んだ開発者への提供を意図したものです。(1) お客様のアプリケーションに適した TI 製品の選定、(2) お客様のアプリケーションの設計、検証、試験、(3) お客様のアプリケーションが適用される各種規格や、その他のあらゆる安全性、セキュリティ、またはその他の要件を満たしていることを確実にする責任を、お客様のみが単独で負うものとします。上記の各種リソースは、予告なく変更される可能性があります。これらのリソースは、リソースで説明されている TI 製品を使用するアプリケーションの開発の目的でのみ、TI はその使用をお客様に許諾します。これらのリソースに関して、他の目的で複製することや掲載することは禁止されています。TI や第三者の知的財産権のライセンスが付与されている訳ではありません。お客様は、これらのリソースを自身で使用した結果発生するあらゆる申し立て、損害、費用、損失、責任について、TI およびその代理人を完全に補償するものとし、TI は一切の責任を拒否します。

TI の製品は、TI の販売条件（www.tij.co.jp/ja-jp/legal/termsofsale.html）、または ti.com やかかる TI 製品の関連資料などのいずれかを通じて提供する適用可能な条項の下で提供されています。TI がこれらのリソースを提供することは、適用されるTI の保証または他の保証の放棄の拡大や変更を意味するものではありません。IMPORTANT NOTICE

Copyright © 2018, Texas Instruments Incorporated日本語版 日本テキサス・インスツルメンツ株式会社

PACKAGE OPTION ADDENDUM

www.ti.com 9-Mar-2021

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead finish/Ball material

(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

5962-7802301M2A ACTIVE LCCC FK 20 1 Non-RoHS& Green

SNPB N / A for Pkg Type -55 to 125 5962-7802301M2AAM26LS31MFKB

5962-7802301MEA ACTIVE CDIP J 16 1 Non-RoHS& Green

SNPB N / A for Pkg Type -55 to 125 5962-7802301MEAAM26LS31MJB

5962-7802301MFA ACTIVE CFP W 16 1 Non-RoHS& Green

SNPB N / A for Pkg Type -55 to 125 5962-7802301MFAAM26LS31MWB

5962-7802301Q2A ACTIVE LCCC FK 20 1 Non-RoHS& Green

SNPB N / A for Pkg Type 5962-7802301Q2AAM26LS31M

AM26LS31CD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDBR ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SA31C

AM26LS31CDBRE4 ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SA31C

AM26LS31CDE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 AM26LS31CN

AM26LS31CNSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 26LS31

AM26LS31INSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 26LS31

AM26LS31MFKB ACTIVE LCCC FK 20 1 Non-RoHS& Green

SNPB N / A for Pkg Type -55 to 125 5962-7802301M2AAM26LS31

PACKAGE OPTION ADDENDUM

www.ti.com 9-Mar-2021

Addendum-Page 2

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead finish/Ball material

(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

MFKB

AM26LS31MJB ACTIVE CDIP J 16 1 Non-RoHS& Green

SNPB N / A for Pkg Type -55 to 125 5962-7802301MEAAM26LS31MJB

AM26LS31MWB ACTIVE CFP W 16 1 Non-RoHS& Green

SNPB N / A for Pkg Type -55 to 125 5962-7802301MFAAM26LS31MWB

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to twolines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

PACKAGE OPTION ADDENDUM

www.ti.com 9-Mar-2021

Addendum-Page 3

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

AM26LS31CDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

AM26LS31CDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

AM26LS31CDRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

AM26LS31CDRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

AM26LS31CNSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

AM26LS31INSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 17-Dec-2020

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

AM26LS31CDR SOIC D 16 2500 853.0 449.0 35.0

AM26LS31CDR SOIC D 16 2500 333.2 345.9 28.6

AM26LS31CDRG4 SOIC D 16 2500 853.0 449.0 35.0

AM26LS31CDRG4 SOIC D 16 2500 333.2 345.9 28.6

AM26LS31CNSR SO NS 16 2000 367.0 367.0 38.0

AM26LS31INSR SO NS 16 2000 853.0 449.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 17-Dec-2020

Pack Materials-Page 2

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE

4040065 /E 12/01

28 PINS SHOWN

Gage Plane

8,207,40

0,550,95

0,25

38

12,90

12,30

28

10,50

24

8,50

Seating Plane

9,907,90

30

10,50

9,90

0,38

5,605,00

15

0,22

14

A

28

1

2016

6,506,50

14

0,05 MIN

5,905,90

DIM

A MAX

A MIN

PINS **

2,00 MAX

6,90

7,50

0,65 M0,15

0°–8°

0,10

0,090,25

NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.D. Falls within JEDEC MO-150

重要なお知らせと免責事項TI は、技術データと信頼性データ (データシートを含みます)、設計リソース (リファレンス・デザインを含みます)、アプリケーションや設計に関する各種アドバイス、Web ツール、安全性情報、その他のリソースを、欠陥が存在する可能性のある「現状のまま」提供しており、商品性および特定目的に対する適合性の黙示保証、第三者の知的財産権の非侵害保証を含むいかなる保証も、明示的または黙示的にかかわらず拒否します。これらのリソースは、TI 製品を使用する設計の経験を積んだ開発者への提供を意図したものです。(1) お客様のアプリケーションに適したTI 製品の選定、(2) お客様のアプリケーションの設計、検証、試験、(3) お客様のアプリケーションが適用される各種規格や、その他のあらゆる安全性、セキュリティ、またはその他の要件を満たしていることを確実にする責任を、お客様のみが単独で負うものとします。上記の各種リソースは、予告なく変更される可能性があります。これらのリソースは、リソースで説明されている TI 製品を使用するアプリケーションの開発の目的でのみ、TI はその使用をお客様に許諾します。これらのリソースに関して、他の目的で複製することや掲載することは禁止されています。TI や第三者の知的財産権のライセンスが付与されている訳ではありません。お客様は、これらのリソースを自身で使用した結果発生するあらゆる申し立て、損害、費用、損失、責任について、TI およびその代理人を完全に補償するものとし、TI は一切の責任を拒否します。TI の製品は、TI の販売約款 (https://www.tij.co.jp/ja-jp/legal/terms-of-sale.html)、または ti.com やかかる TI 製品の関連資料などのいずれかを通じて提供する適用可能な条項の下で提供されています。TI がこれらのリソースを提供することは、適用される TI の保証または他の保証の放棄の拡大や変更を意味するものではありません。IMPORTANT NOTICE

日本語版 日本テキサス・インスツルメンツ合同会社Copyright © 2021, Texas Instruments Incorporated