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Chapter 4 Computer Hardware. 國立聯合大學 電子工程學系 蕭裕弘. Chapter Goals. 說明硬體與軟體的內容與差異 介紹個人電腦硬體的組成 說明 Von Neumann Architecture 的基本架構 說明主記憶體的組成與作業 說明 CPU 的組成與作業 說明輸入與輸出設備的種類與相關資料 介紹電腦未來的發展. 1. Introduction. Hardware Equipment involved in the function of a computer. - PowerPoint PPT Presentation
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Chapter 4Computer Hardware
國立聯合大學 電子工程學系蕭裕弘
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 2 / 35
Chapter Goals
說明硬體與軟體的內容與差異
介紹個人電腦硬體的組成
說明 Von Neumann Architecture 的基本架構
說明主記憶體的組成與作業
說明 CPU 的組成與作業
說明輸入與輸出設備的種類與相關資料
介紹電腦未來的發展
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 3 / 35
1. Introduction
Hardware Equipment involved in the function of a
computer.
Hardware is a comprehensive term for
all of the physical parts of a computer.
Computer hardware consists of the
components that can be physically
handled.
The physical, touchable, material parts
of a computer system.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 4 / 35
Software
Software
The set of instructions a computer uses to
manipulate data, such as a word-processing
program or a video game.
Software provides instructions for the hardware
to accomplish tasks.
These programs are usually stored and
transferred via the computer's hardware to and
from the CPU.
Software also governs how the hardware is
utilized; for example, how information is
retrieved from a storage device.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 5 / 35
2. 個人電腦系統單元 (PC system unit)
A system unit, also known as a base unit is the main body of a computer, typically consisting of: A plastic or metal enclosure The motherboard A CPU (or processor) A power supply Cooling fans Internal disk drives The circuit boards that are plugged
into the motherboard, such as video and network cards.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 6 / 35
主機板上的主要成員 晶片組 (chipset)
可視為是電腦系統的心臟 匯流排 (buses)
資料匯流排 (data bus) 位址匯流排 (address bus) 控制匯流排 (control bus)
擴充槽 (expansion slots) 加速圖形連接埠 (accelerate graphi
cs port, AGP) 週邊連接介面 (peripheral connecti
on interface, PCI) 其他常見的連接埠 (posts)
通用序列匯流排 (universal serial bus, USB) 連接埠
序列連接埠 (serial ports) 並列連接埠 (parallel port)
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 7 / 35
匯流排 (Buses)
A bus is an electronic path on the motherboard or within the CPU or other computer component along which bits are transmitted.
Types of Buses: Internal bus
The bus that moves data around within the CPU.
System bus The bus that moves data back and forth between the CPU and memory.
Expansion buses Buses that connect the CPU to peripheral devices. Expansion buses are etched onto the motherboard, and connect the CPU to
the expansion slots on the motherboard to which external devices may be connected.
ISA, PCI, AGP, USB, Firewire/IEEE 1394
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 8 / 35
Chipset and Buses
IDE
Serial ATA
USB 2.0/1.1
10/100M LAN
AC’97 Audio
PCI Bus
PS/2
Parallel/Serial
Floppy
IrDA
SuperI/O
SouthBridge
North Bridge
CPU
AGP 8X/4X Memory
Front-Side Bus (FSB)AGP Bus
CPU Chipset
System Bus
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 9 / 35
Parallel vs. Serial Transmission
In parallel transmission, all bits in a single
character are transmitted simultaneously.
Parallel transmission is primarily limited to
transmission of data within a computer,
between computers and between a computer
and a printer.
It is fast compared to serial transmission but
limited to shorter distances.
In serial transmission, bits are transmitted in a
linear fashion, one after the other.
It is slower but can travel longer distances
and is widely used.
0
1
0
0
0
0
0
1
01000001
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 10 / 35
3. Von Neumann Architecture - 1
The so-called von Neumann architecture is a model for a computing
machine that uses a single storage structure to hold both the set of
instructions on how to perform the computation and the data required
or generated by the computation.
Such machines are also known as stored-program computers. The
separation of storage from the processing unit is implicit in this
model.
The architecture is named after mathematician John von Neumann
who provided an early written account of a general purpose stored-
program computing machine.
The term Harvard architecture originally referred to computer architectures that used physically separate storage devices for their instructions and data.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 11 / 35
Von Neumann Architecture - 2
Input
Output
Control
Arithmetic& Logic
Memory
CPU
Memory
Control
Arithmetic& Logic
CPU
InputOutput
Buses
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 12 / 35
4. Memory
記憶體 (memory) 是一種固態積體電路 (solid-stat
e IC) ,可用來作為資料的儲存場所。 主記憶體 (main memory or primary memory)
主機板上常見的記憶體種類: 隨機存取記憶體 (random access memory, RAM)
動態隨機存取記憶體 (dynamic RAM, DRAM)
靜態隨機存取記憶體 (static RAM, SRAM)
唯讀記憶體 (read-only memory, ROM)
遮罩式唯讀記憶體 (Mask ROM)
可規劃之唯讀記憶體 (programmable ROM, PRO
M)
快閃記憶體 (flash memory)
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 13 / 35
Memory Addressing
Memory is a collection of
cells, each with a unique
physical address.
When a block of data,
instruction, program, or
result of a calculation is
stored in memory, it is stored
into one or more consecutive
addresses, depending on its
size.
Address
0000 0000
0000 0001
0000 0002
.
.
.
FFFF FFFE
FFFF FFFF
.
.
.
1110 0011
1010 1010
0101 0101
1110 0011
1010 1010
Contents
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 14 / 35
相關名詞
Memory operation speed Memory access time:
The average period of time (in nanoseconds) it takes for RAM to complete one access and begin another.
Access time is composed of latency (the time it takes to initiate a request for data and prepare to access it) and transfer time.
DRAM chips for personal computers have accessing times of 50 to 150 nanoseconds. SRAM has access times as low as 10 nanoseconds.
Parity check Odd Even
0 1 0 0 1 1 0 1 1
0 1 0 0 1 1 0 1 0
Data bits Parity bit
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 15 / 35
常見的 PC DRAM 規格
Synchronous Dynamic RAM (SDRAM)
比傳統記憶體的 clock rate 要快上許多。 和 CPU 的匯流排同步。 作業速度可達 133 MHz 。
Rambus DRAM (RDRAM)
Internally similar to DDR SDRAM, but uses a spe
cial method of signaling developed by the Rambus
Company that allows faster clock speeds.
作業速度可達 1200 MHz 。 Double data rate (DDR) SDRAM
一種雙倍速的 SDRAM ,在每一個 clock cycl
e 的兩個觸發邊緣都能傳輸資料。 作業速度可達 200 MHz 。
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 16 / 35
Memory Hierarchy
Registers
Cache
Main memory
Disks
Tapes
Volatile
Non-Volatile
A cache is a collection of duplicate data, where the original data is expensive to fetch relative to the cache.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 17 / 35
5. Central Processing Unit (CPU)
The central processing unit (CPU) is the part of a computer that interprets and carries out the instructions contained in the software. Processor and microprocessor
In most CPUs, this task is divided between: A control unit (CU): it directs program flow. An arithmetic and logic unit (ALU): it
performs operations on data. Registers: a small amount of very fast
computer memory used to speed the execution of computer programs by providing quick access to commonly used values.
ALUDoes all the computing
CUControls and
checks
RegistersWorkspace
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 18 / 35
Basic Structure of A CPU
Program Counter
Registers
ALU
Instruction Register
Control Unit
Control signals
Memory Address Register
Memory Data Register
Control Bus
Address Bus
Data Bus
Inte
rnal
Bus
es
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 19 / 35
The Control Unit
The control unit coordinates the steps necessary to execute each instruction. It causes each instruction to be moved to the CPU and then decodes it so that it can
be executed. It then tells the other parts of the CPU what to do and when to do it. It is in overall charge of the movement of the vast amounts of instructions and data
used by the computer.
Obviously, the movement of all these data must be coordinated and synchronized. To do this, the control unit uses a clock that issues control pulses.
The frequency of this clock is important as the more control pulses that it can generate in a given time, the faster data will be moved around the computer.
The clock is rated in megahertz - 1 megahertz means that 1 million control signals a second are generated.
Clock
A cycle
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 20 / 35
The Fetch-Execute Cycle
The instruction stage Fetch the instruction. Decode the instruction.
The execution stage Execute the instruction. Store the result to a
register or memory.
Fetch
Decode
ExecuteStor
eMachine Cycle
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 21 / 35
Implementation of Control Unit
Machine code -> Control signals – how? Early computers hardwired this. RISC machines do as well. Microprogramming is an alternative that allows for simpler machine
hardware.
Microprogramming: design is simpler – problem of
timing each instruction is broken down. Microinstruction cycle handles timing in a simple and systematic way.
easier to modify slower than hardwired control
Hardwired: composed of combinatorial and
sequential circuits that generate complete timing that corresponds with execution of each instruction.
time-consuming and expensive to design
difficult to modify … but fast
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 22 / 35
The Arithmetic and Logic Unit (ALU)
The Arithmetic and logic unit is responsible for doing the actual computing and so can be considered to be the brain of the computer.
The most common available operations are The integer arithmetic operations of addition, subtraction, and multiplication. The bitwise logic operations of AND, NOT, OR, and XOR. Various shift operations, such as shift left, shift right, etc.
Typically, a standard ALU does not handle integer division nor any floating point operations. For these calculations a separate component, such as a divider or floating point unit (FPU), is often used.
The ALU takes as inputs the data to be operated on and a code from the control unit indicating which operation to perform, and for output provides the result of the computation.
In some designs it may also take as input and output a set of condition codes, which can be used to indicate cases such as carry-in or carry-out, overflow, or other statuses.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 23 / 35
Bitwise Logic Operations
Operations
BitsNOT
X
OR AND XOR
X Y
0 0 1 0 0 0
0 1 1 1 0 1
1 0 0 1 0 1
1 1 0 1 1 0
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 24 / 35
The Shift and Rotation Operations
Shift left
Shift right
Arithmetic shift left
Arithmetic shift right
Rotate left
Rotate right
0 1 1 0 1 1 0 0
0 1 1 0 0 0 1 1
0 1 1 0 0 1 0 0
1 0 0 0 1 1 0 0
1 0 0 1 1 1 0 0
1 0 0 1 0 0 1 1
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 25 / 35
Registers in CPU
General purpose registers (GPRs) 儲存資料或指令。
Special purpose registers Program counter, PC (or Instruction pointer, I
P) 儲存下一個要被執行之指令的位址。
Instruction register, IR 儲存要被執行的指令。
Memory address register, MAR 儲存要送到主記憶體的位址。
Memory data register, MDR 儲存從記憶體讀取或是要寫入記憶體的
資料。 Flag register (or program status word, PSW)
儲存 CPU 與 ALU 目前的處理狀態。 ...
MDR MAR
PC IR
Indexregisters
Flag GPRs
Stackpointer Accumulator
Databus
Controlbus
Addressbus
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 26 / 35
Measurements of CPU Performance
CPU clock rate: ~GHz
Throughput
The speed at which a computer
processes data end to end.
MIPS
Million instructions per second
MFLOPS
Million floating operations per
second
TPS
Transactions per second
單 位 縮寫 十進位標記
millisecond ms 10-3
microsecond µs 10-6
nanosecond ns 10-9
picosecond ps 10-12
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 27 / 35
6. Input Unit
A device through which data and
programs from the outside world
are entered into the computer.
Input hardware consists of
external devices that provide
information and instructions to the
computer.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 28 / 35
Keyboards
A computer keyboard is a peripheral modelled after the typewriter keyboar
d. Designed to be used by a human to enter data by manual depression of k
eys. Most keyboards have characters engraved or printed on the keys, these
usually represent characters selected from some language alphabet along wi
th numbers and punctuation and other control keys.
The IBM PC keyboard with the QWERTY layout is nearly universal.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 29 / 35
Pointing Devices
Mouse Joystick Trackball Graphics tablet Touch screens Pointing stick ...
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 30 / 35
Scanners and Related Devices
Optical scanner Optical character recognition (OCR)
Optical reader ...
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 31 / 35
Multimedia Input Devices
Digital camera Video camera Audio input device i-Phone ...
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 32 / 35
7. Output Unit
Output hardware consists of external devices that transfer information from the computer's CPU to the computer user.
Hard copy Output that has been recorded
in a permanent form onto a medium such as paper.
Soft copy Generally refers to display
output, which appears only temporarily.
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 33 / 35
Display Devices
A display device is the most common form of output device. It is used to display output on a computer screen; for PCs, this device is usually called a monitor. Cathode ray tube (CRT) Flat-panel screen
Features of display devices Size Resolution Graphics standards
Video graphics array VGA (640*480*16), SVGA (800*600*16), XGA
(1024*768*256)
Color vs. monochrome display
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 34 / 35
Printers
Characteristics of printers Print resolution
Dots per inch (DPI) Impact printing
Dot-matrix printers ...
Nonimpact printing Laser printers Ink-jet printers ...
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 35 / 35
Multimedia Output Devices
Speakers Data and multimedia projectors Multifunction devices
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 36 / 35
8. Strategies for Making Computer Speedier
Moving circuits close together: 0.13 -> 0.09 µm
Increasing register size: 32 -> 64 bits
Faster and wider buses: 800 MHz FSB
Improved materials for IC
Improved instruction set design:
CISC: complex instruction set computing
RISC: reduced instruction set computing
Pipelining and superscalar processing
Multiprocessing and parallel processing
國立聯合大學電子工程學系 – 計算機概論 – 蕭裕弘 Chapter 4: Page 37 / 35
Future Trends
Ultrafast science Nanoscale technology Biotechnology Advance robotics Accelerated computing Pervasive connectivity