1-1

1

CMOS

1-2

CMOS

1-3

LSI : Large Scale Integrated Circuit

12 30cm)

1-4

1900 1910 1920 1930 1940 1950 1960 1970 1980 1990 2000 2010

1906 1946 ENIAC1947

1959

1962MOSFET

1971

pMOS nMOS CMOS

110

1001000

104

105

106

107

108

109

1010

1011

/

(nm)

1965Moore

15 1/10

3 4

1-5

SiO2

n+

n-p

n+

n+ n+

p p

MOSFET

FET: Field Effect Transistor)

(1947)

FET

LSI (1990 )

LSI CMOSFET

1980 1985 1990 1995 20001

10

100

CMOSuni-processor5 10

Bipolaruni-processor5 2

n+ : n

1-6

ENIAC

18,800

1,000,000 cm2 (60

150,000 W

~ 0.05 MIPS

0.12 cm2

1946

4004

1971

2,300

1 W

0.06 MIPS

Core 2 (Penryn)

2007

410,000,000

1.07 cm2

65W

12500 MIPS

http://en.wikipedia.org/wiki/ENIAC http://www.4004.com/ http://www.intel.co.jp/technology/45nm/index.htm?iid=tech_sil+45nm

1-7n MOSFET

Metal-Oxide-Semiconductor Field Effect Transistor

source= )gate

(drain= )

n+

p

n+

1-8

n+ n+

S G D

VGS +

P

SiO2/Si p

1-9

np

n

np

n

+Q

Q

(0V) (> 0V)

(0V)

(0V) (> 0V)

(1.3V)

n MOSFET

1-10

- =

- = 0V

p MOSFET

p+

n

p+

1-11

n+ n+

p

nMOSFET

pMOSFET

p+ p+

n

VD > VS

VD < VS

- -

1-12

p+ p+ p+n+ n+ n+

n

p

B S G D S G D B

CMOS (Complementary MOS)

nMOSFET pMOSFET

p n-WELL

nMOSFET VB nMOSFET

pMOSFET VB pMOSFET

nMOSFET VB pMOSFETVB nMOSFET

pMOSFET

nMOSFET pMOSFET

1-13

p+ p+ p+n+ n+ p+

n

p

B S G D S G D B

CMOS

nMOSFET pMOSFET

D

S

G

D

S

G

D

S

G

B

S

D

G

B

S

D

G

S

D

G

p n=

npn, pnp

1-14MOS

CMOS(Complementary Metal-Oxide-Semiconductor)

pMOSFET

nMOSFET

VDD:

VSS:

vIN VSS VSS

0

0

vOUT

VDD VDD

VDD VDD

VSS VSS

V V1V2

V = V1 V2

1-15MOS

CMOS (Complementary Metal-Oxide-Semiconductor)

vIN

vOUT

VDD

VDD

VSSVSS

VDD:

VSS:

vIN vOUT

1-16

1-17

12 30cm)

~ 1 cm

1-18

CZ

CZ

200mm60 100kg

1200mm

http://www.sumcosi.com/products/process/step_01.html

1-19

1-20

CVD (Chemical Vapor Deposition)

(SiO2)(Si3N4)

(Si)

O2, H2O

Si

SiO2

O2 O2

700-1000

tox

0.44tox

Si

1-21Photolithography

Si

1/5

1-22

RIE (Reactive Ion Etching)

+ +

+N

= 7 : 1 (25 )SiO2 100 nm/min

= 10 : 1 (25 ) SiO2 35 nm/min

= 100:1 Si 100 nm/min

X = 500:50:1 (50 )

Si 8~18 nm/min

( 160-180 ) Si3N4 5nm/min

KOH: = 4:6 Si 25 nm/min(111)

Al = 75:15:5:5

Al 50 nm/min

1-23

B, P, As

p n

B P, As

http://www1.ocn.ne.jp/~raichi/test/raichi/timp/timp.html

Si(700 -1000

1-24

p

n

LSI

(Al)

(SiO2)

1-25

p

n

(Al)

(SiO2)

1-26

p

n

(Al)

(SiO2)STI : shallow trench isolation

1-27

p

n

(Al)

(SiO2)

1-28

p

n

(Al)

(SiO2)

1-29

p

n

(Al)

(SiO2)

1-30

p

n

(Al)

(SiO2)

1-31

p

n

(Al)

(SiO2)

1-32

p

n

(Al)

(SiO2)

1-33

p

n

(Al)

(SiO2)

1-34

(nm

)1mm

SiSi

45nm

1-35

LDD(Lightly Doped Drain)pocket

Si3N4 self-aligned S/D contact

High-kSiO2 SiON, Al2O3, HfO2, ZrO2

Si

Si

SiGe

/

1-36

(nm

)

1mm

SiSi

45nm

6nm

6nm

2025LSI

Si 15

6nm

B. Doris, et al. (IBM),International Electron Device Meeting (IEDM) Technical Digest, 10.6, 2002

1-37LSI

n+ n+

pp+ p+

n

M1

M2

M3

M4

M5

M6

VIA