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Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
임베디드시스템설계실습 (6)
Embedded System Design
Real-Time Computing and Communications Lab.
Hanyang University
2Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 2Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
HARDWARE INTERRUPT
3Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 3Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VPOS커널을포팅하기위한준비
1. 커널컴파일 + 커널이미지를 RAM에적재
2. Startup code 작성
3. UART 설정
4. TIMER 설정
5. Hardware Interrupt Handler구현(1) UART Interrupt
6. Software Interrupt Entering/Leaving Routine 구현
7. Timer Interrupt
4Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 4Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
목차
1. Exception
2. Interrupt
3. Vectored Interrupt Controller
4. Interrupt Entering & leaving Routine
5. UART Interrupt Handler
6. Homework
5Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 5Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
EXCEPTION
6Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 6Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Exception
Exception? 명령어들의순차적인실행과정을중단시켜야하는상태
예외상황이나인터럽트가발생한상태
• 정의되어있지않은명령어
• 메모리액세스실패
• 소프트웨어인터럽트
• 외부하드웨어인터럽트
• …
기존에실행하고있던루틴에서벗어나익셉션핸들러(Exception
Handler)로이동
메인루틴 익셉션발생
익셉션핸들러
7Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 7Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Exception의종류
Exception Mode Vector table offset
Reset SVC +0x00
Undefined Instruction UND +0x04
Software Interrupt(SWI) SVC +0x08
Prefetch Abort ABT +0x0c
Data Abort ABT +0x10
Not assigned - +0x14
IRQ IRQ +0x18
FIQ FIQ +0x1c
8Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 8Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Entering Exception Handler
익셉션이발생하면 CPU는자동으로,
1. CPSR 값을익셉션모드의 SPSR에저장
2. PC 값을익셉션모드의 Link Register(lr)에저장
3. CPSR의모드비트를변경하여해당익셉션모드로진입
4. PC에익셉션핸들러의주소를저장하여익셉션핸들러를실행
• Vector table base address + Vector table offset
• Vector table base address는 ARM Coprocessor에저장
Vector Table
Vector base address 저장
9Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 9Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Exception Handler
익셉션핸들러(Exception Handler)
익셉션의원인을찾아해당익셉션을처리
익셉션이인터럽트라면, 인터럽트를처리하고메인루틴으로복귀해야함
익셉션처리를끝내고원래루틴으로돌아오려면,
movs pc, lr
• Link Register의값을 PC에저장
Link register의값은익셉션에따라추가계산필요
• 익셉션모드의 SPSR을 CPSR에저장
10Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 10Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
INTERRUPT
11Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 11Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Polling vs. Interrupt
지금디바이스를사용할수있는지어떻게알수있는가?
Polling & Interrupt
Polling
CPU가디바이스의상태를일정주기마다확인
상태비트(status bit)의값을확인
Interrupt
디바이스가데이터를보낼수있거나외부로부터데이터를수신하면 CPU에게알림
CPU는인터럽트가발생할때까지다른일을할수있음
12Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 12Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt
ARM의 Interrupt
IRQ : Normal Interrupt
• 범용인터럽트
• FIQ보다낮은우선순위와높은우선순위지연시간
FIQ : Fast Interrupt
• 빠른응답시간을요하는인터럽트소스에사용
• 특정어플리케이션을위해서만사용
SWI : Software Interrupt
• 특권모드로진입하기위한소프트웨어인터럽트
• 커널함수를호출하기위해사용
13Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 13Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt Controller
정의 CPU의인터럽트요청포트중하나에여러외부인터럽트를연결하기위한제어장치
I/O works (Interrupt)
Interrupt Controller
CPU
IRQ FIQ
Interrupt Line
14Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 14Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt Service Routine
정의 인터럽트가발생하였을때해당인터럽트를처리하는루틴
• 타이머인터럽트스케줄러호출
• UART 인터럽트외부에서전송된데이터를수신
15Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 15Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt 처리방법
인터럽트
인터럽트비활성화pc = 벡터테이블엔트리
spsr_(mode) = cpsr
문맥저장
인터럽트핸들러
인터럽트서비스루틴
문맥복원
인터럽트활성화pc = lr – 4
cpsr = spsr_(mode)
메인루틴으로 복귀
16Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 16Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
1. 디바이스에서인터럽트발생
2. ARM CPU는 IRQ 모드로변경 (CPU가자동으로처리)
인터럽트비활성화(disable)
CPSR 값을 SPSR에저장
벡터테이블의인터럽트핸들러로이동
3. 문맥저장 이전모드(User 모드)의 r0-r12, sp, lr값을스택에저장 (stmfd)
4. 인터럽트핸들러에서인터럽트소스를찾아해당인터럽트서비스루틴(ISR)실행
5. 인터럽트서비스루틴을실행하여인터럽트를처리
Interrupt 처리방법
17Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 17Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
6. 문맥복원
스택에저장한 r0-r12, sp, lr값을이전모드의각레지스터에로드 (ldmfd)
7. 인터럽트활성화
8. lr = lr - 4
파이프라인(pipeline)
IRQ는현재명령어가실행된후에발생하기때문에복귀할주소는다음명령어, 즉 lr-4의값을복귀주소로사용해야함
9. ‘movs pc, lr’ 명령어를사용하여원래루틴으로복귀
Interrupt 처리방법
18Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 18Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VECTORED INTERRUPT CONTROLLER
19Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 19Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Vectored Interrupt Controller
VIC (Vectored Interrupt Controller)
Vector방식의 interrupt 레지스터세트를지원
• Interrupt source마다레지스터를하나씩할당
• 각레지스터에는인터럽트서비스루틴의주소를저장
• 인터럽트가발생하면 controller는해당인터럽트의서비스루틴주소를 VICADDRESS 레지스터에자동으로로드
• CPU는 VICADDRESS 레지스터에저장된인터럽트서비스루틴으로점프
20Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 20Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Vectored Interrupt Controller
문맥저장
인터럽트핸들러
인터럽트서비스루틴
문맥복원
SW 핸들러에서인터럽트소스식별
VIC기존의 IC
문맥저장
인터럽트서비스루틴
문맥복원
하드웨어에서인터럽트소스식별
SW 인터럽트핸들러필요없음!
21Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 21Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Vectored Interrupt Controller
장점 인터럽트지연시간을줄일수있음
• 다른 Interrupt Controller에서는소프트웨어인터럽트핸들러에서인터럽트소스를식별
• VIC에서는소프트웨어인터럽트핸들러가필요없음
하드웨어상에서인터럽트소스를알수있음
다른 IC보다더빠르게 ISR을실행할수있음
22Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 22Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
S5PC100의 VIC
3개의 VIC 존재 하나의 VIC마다 32개의인터럽트소스지원
인터럽트소스(Interrupt Source) 목록 Datasheet Page. 360~362 참고
VIC 전체에서 43번VIC 1에서 11번
23Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 23Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VIC의레지스터
제어레지스터 VICINTSELECT
VICINTENABLE
VICINTENCLEAR
VICSWPRIORITYMASK
상태레지스터 VICIRQSTATUS
ISR 주소저장레지스터 VICVECTADDR[0-31]
VICADDRESS
24Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 24Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VICINTSELECT
레지스터 : VICINTSELECT
Interrupt Select Register
• Interrupt Source를 IRQ/FIQ로설정하는레지스터
• 하나의인터럽트소스는하나의비트와대응
ex) 0번인터럽트소스는 0번비트에대응
25Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 25Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VICINTENABLE
레지스터 : VICINTENABLE
Interrupt Enable Register
• Interrupt Source를활성화(enable)시켜주는레지스터
• 비활성화(disable)하는기능은없음
26Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 26Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VICINTENCLEAR
VICINTENCLEAR
Interrupt Enabler Clear Register
• Interrupt Source를비활성화(disable)시켜주는레지스터
27Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 27Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VICSWPRIORITYMASK
VICSWPRIORITYMASK
Software Priority Mask Register
• 16개우선순위레벨의인터럽트들을 mask하는레지스터
28Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 28Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VICIRQSTATUS
레지스터 : VICIRQSTATUS
IRQ Status Register
• 어떤 Interrupt가발생했는지나타내는레지스터
• 특정 Interrupt가발생하면해당 interrupt를가리키는비트가 1
로 set
29Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 29Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VICVECTADDR[0-31]
레지스터 : VICVECTADDR[0-31]
Vector Address Register
• 각 Interrupt Source의 ISR 주소를저장하는레지스터
• 32개의 Interrupt Source에대응하는 32개의 VICVECTADDR존재
S5PC100은 3개의 VIC가있으므로총 96개의 VICVECTADDR존재
30Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 30Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VICADDRESS
레지스터 : VICADDRESS
Vector Address Register
• Interrupt가발생했을때해당 Interrupt source의 ISR 주소를로드
• Controller가자동으로로드
ex) 12번 interrupt source에서 interrupt 발생
VICADDRESS VICVECTADDR[12]
31Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 31Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
UART INTERRUPT CODE (C CODE)
32Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 32Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VPOS_kernel_main()
소개 VPOS 커널데이터구조체를초기화
시리얼장치와타이머등하드웨어를초기화
인터럽트 enable
부팅메시지출력
쉘스레드생성
스케줄러호출하는 VPOS_start
루틴으로진입
소스코드위치 vpos/kernel/kernel_start.c
33Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 33Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
set_interrupt()
위치 vpos/kernel/kernel_start.c
코드추가 vh_serial_irq_enable() 함수호출
34Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 34Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vh_serial_irq_enable()
역할 UART1 Interrupt를활성화(enable)시키는함수
위치 vpos/hal/io/serial.c
35Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 35Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vh_serial_irq_enable()
실행순서1. VIC1VECTADDR11 레지스터에 ISR 주소저장
• vh_serial_interrupt_handler() 함수주소저장
2. VIC1INTENABLE 레지스터에서 UART1 인터럽트를활성화
• 11번비트를 1로 set
3. VIC1INTSELECT 레지스터에서 UART1 인터럽트를 IRQ로설정
• 11번비트를 0으로 clear
4. VIC1SWPRIORITYMASK레지스터를모두mask
• 모든비트를 1로 set
36Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 36Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vh_serial_irq_enable()
코드추가
vpos/hal/include/vh_io_hal.h
37Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 37Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vh_serial_interrupt_handler()
설명 UART1 Interrupt Handler
키보드입력을받아버퍼에저장
위치 vpos/hal/io/serial.c
38Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 38Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vh_serial_interrupt_handler()
실행순서1. URXH 레지스터에수신된키보드문자데이터를버퍼에저장
• vk_serial_push() 함수호출
2. UART1 인터럽트를 pending clear
• VICINTENCLEAR 레지스터에서 UART1 인터럽트를비활성화
11번비트를 1로 set
• VIC1INTENABLE 레지스터에서 UART1 인터럽트를활성화
11번비트를 1로 set
• UINTP1 레지스터에서 UART1 인터럽트를다시설정
모든비트를 1로 set
UINTP1 레지스터를 1로 set해서인터럽트를 clear
39Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 39Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vh_serial_interrupt_handler()
코드추가
URXH 레지스터에수신된키보드문자데이터를버퍼에저장
UART1 인터럽트를 Pending Clear
40Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 40Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
getc() 수정
코드수정 vpos/hal/io/serial.c
주석처리
주석해제
41Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 41Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
UART INTERRUPT CODE (ASSEMBLY)
42Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 42Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt 진입루틴
루틴흐름1. Link register 보정
2. 이전모드의레지스터들과 SPSR을스택에저장
3. VICIRQSTATUS를확인하여 3개의 Controller 중어디에서인터럽트가발생하였는지확인
• 본실습에서는 VIC 0과 VIC 1만사용
4. pc에 VICADDRESS의값을저장
43Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 43Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt 복귀루틴
루틴흐름1. CPSR을수정하여 IRQ 모드로바꾸고 IRQ Mask bit를 1로 set
2. 이전모드의레지스터와 SPSR을스택에서복원
3. movs pc, lr명령어를사용하여원래의루틴으로복귀
44Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 44Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt 진입루틴 : vh_irq
코드 vpos/hal/cpu/HAL_arch_startup.S
^ : 이전모드의레지스터
SPSR과 Link Register 저장
VIC0IRQSTATUS
VIC1IRQSTATUS
문맥저장
45Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 45Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Interrupt 진입 & 복귀루틴 : vh_irq_VIC1
코드 vpos/hal/cpu/HAL_arch_startup.S
VIC0ADDRESS에저장된인터럽트핸들러주소로점프
VIC 인터럽트서비스완료
문맥복원
46Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 46Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
HOMEWORK
47Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 47Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
실습및과제
UART1 Interrupt 관련코드추가 vpos/hal/io/serial.c
• UART1 Interrupt Enable
vh_serial_irq_enable()
• UART1 Interrupt Handler
vh_serial_interrupt_handler()
• getc() 함수주석처리수정
vpos/hal/cpu/HAL_arch_startup.S
• vh_irq와 vh_irq_VIC1
48Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 48Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
실습및과제
VIC 관련레지스터주소정의 vpos/hal/include/vh_io_hal.h
• VIC1INTSELECT
• VIC1INTENABLE
• VIC1INTENCLEAR
• VIC1SWPRIORITYMASK
• VIC1VECTADDR11
49Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 49Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
보고서제출
보고서 학과, 학번, 이름
코드를캡쳐해서보고서에첨부
• serial.c에서수정한부분 (함수 3개)
vh_serial_irq_enable()
vh_serial_interrupt_handler()
getc()
• HAL_arch_startup.S에서수정한부분(레이블 2개)
vh_irq
vh_irq_VIC1
• vh_io_hal.h의 VIC 관련레지스터주소정의부분
50Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 50Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
SOFTWARE INTERRUPT
51Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 51Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VPOS커널을포팅하기위한준비
1. 커널컴파일 + 커널이미지를 RAM에적재
2. Startup code 작성
3. UART 설정
4. TIMER 설정
5. Hardware Interrupt Handler구현(1) UART Interrupt
6. Software Interrupt Entering/Leaving Routine 구현
7. Timer Interrupt
52Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 52Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
목차
1. Software Interrupt
2. Scheduler of VPOS
3. SWI Entering Routine & Leaving Routine
4. Homework
53Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 53Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
SOFTWARE INTERRUPT
54Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 54Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Software Interrupt
정의 프로그램의실행을그프로그램에포함시킨명령어로중단시키고,
다른프로그램의실행으로제어를옮기는것
하드웨어적으로인터럽트를거는방식이아님
SWI 명령어를사용해인터럽트를발생시킴
목적 커널함수를호출하기위해특권모드에진입하고자할때사용
• User Mode Privileged Mode(Supervisor Mode)
55Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 55Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Hardware Interrupt vs. Software Interrupt
비교
하드웨어인터럽트(IRQ/FIQ) 소프트웨어인터럽트(SWI)
목적 일반인터럽트처리 운영체제보호모드
벡터테이블오프셋 0x18 0x08
익셉션우선순위 4 6
인터럽트활성화여부 비활성화 비활성화하지않음
링크레지스터보정 lr = lr - 4 불필요
56Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 56Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Hardware Interrupt vs. Software Interrupt
링크레지스터보정 하드웨어인터럽트
• 현재실행중인명령어를실행한뒤인터럽트를처리
• 다음에실행할명령어는 pc – 4에위치
• lr = lr -4를통해링크레지스터의값을수정해야함
소프트웨어인터럽트
• 파이프라인의 3단계중 decode 단계에서 swi명령어를인식하고소프트웨어인터럽트를발생시킴
• PC가가리키는명령어는 swi다음명령어
• 링크레지스터값을수정할필요없음
57Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 57Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
SWI
SWI 명령어 소프트웨어인터럽트를발생시키는명령어
프로세스모드를 Supervisor mode로변경시켜운영체제루틴이특권모드에서호출될수있도록해줌
표기법 : SWI {<조건>} SWI_number
• SWI_number : 특별한함수호출이나특징을나타내는데사용
58Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 58Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
SCHEDULER OF VPOS
59Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 59Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VPOS에서의스케줄러
vk_scheduler()
VPOS의스케줄러함수
• 32단계의정적우선순위 Ready 큐구조
• 같은우선순위내에서는 Round-Robin 스케줄링방식
• 타이머인터럽트로일정주기마다 vk_scheduler()를호출하여스레드는정해진 time slice동안만실행
커널함수
• User Mode가아닌 Privileged Mode나 System Mode에서호출해야함
• 커널함수를사용하기위해서는 User Mode에서 Privileged
Mode로전환해야함
Software Interrupt 사용
60Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 60Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
스케줄러호출순서 (VPOS)
1. 현재실행중인스레드의구조체변수중 ‘swi_number’ 변수에 ‘CS’저장
2. “swi 0x00” 명령어로소프트웨어인터럽트를발생시킴
3. SWI진입루틴에서 vk_swi_classifier() 함수로점프
4. ‘swi_number’ 변수값을확인하여커널함수호출 CS인경우 vk_scheduler() 호출
5. 스케줄링시작
61Real-Time Computing and Communications Lab., Hanyang University
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vk_swi_scheduler() & vh_swi()
현재스레드의구조체변수중 ‘swi_number’ 변수에 ‘CS’
저장1. VPOS_start()실행
2. vk_swi_scheduler() 실행
3. 현재실행중인스레드의구조체변수중 ‘swi_number’ 변수에‘CS’ 저장
4. vh_swi() 실행
“swi 0x00” 명령어로소프트웨어인터럽트를발생시킴
62Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 62Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vk_swi_scheduler() & vh_swi()
현재스레드의구조체변수중 ‘swi_number’ 변수에 ‘CS’
저장
63Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 63Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
vk_swi_classifier()
SWI진입루틴을통해 vk_swi_classifier() 함수로점프
SWI 벡터엔트리
64Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 64Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
APCS
int add(int a1, int a2, int a3, int a5, int a6, int a7)
{
int v1, v2, v3, v4, v5, v6;
int sum;
v1 = a1;
v2 = a2;
…
sum = v1 + v2 + … + v6;
return sum;
}
r0 – r3 and Stack
r4 – r10 and Stack
r0
65Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 65Real-Time Computing and Communications Lab., Hanyang University
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SWI ENTERING ROUTINE &
LEAVING ROUTINE
66Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 66Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Software Interrupt 진입루틴
루틴흐름1. 이전모드의레지스터들과 SPSR, lr을스택에저장
2. r0~r3 레지스터에커널함수가사용할매개변수저장(APCS)
• 함수를호출하면서 r0~r3 레지스터에자동으로매개변수저장
• 진입루틴에서 r0~r3 레지스터를수정하였다면커널함수를실행하기전에다시원래값으로되돌려야함
3. SWI 핸들러로점프
• vk_swi_classifier()로점프
67Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 67Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
Software Interrupt 복귀루틴
루틴흐름1. 이전모드의레지스터와 SPSR을스택에서복원
2. movs pc, lr명령어를사용하여원래의루틴으로복귀
68Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 68Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
HOMEWORK
69Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 69Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
VPOS_kernel_main()
소개 VPOS 커널데이터구조체를초기화
시리얼장치와타이머등하드웨어를초기화
인터럽트 Enable
부팅메시지출력
쉘스레드생성
스케줄러호출하는 VPOS_start
루틴으로진입
소스코드위치 vpos/kernel/kernel_start.c
주석처리해제
70Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 70Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
실습및과제
SWI 관련코드추가 vpos/hal/cpu/HAL_arch_startup.S
• SWI Entering Routine
vh_entering_swi (레이블)
• SWI Leaving Routine
vh_leaving_swi (레이블)
71Real-Time Computing and Communications Lab., Hanyang University
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vh_entering_swi
SWI 진입루틴구현 1
1. ‘vk_save_swi_mode_stack_ptr’ 변수에현재 sp값을저장 (str)
2. 이전모드의 pc, lr레지스터와범용레지스터들을스택에저장
• 이전모드 : ^ 사용
3. SPSR과 lr을스택에저장
• mrs명령어로 SPSR을 r0에저장한뒤 r0를스택에저장
4. IRQ 익셉션을비활성화
• r0 레지스터에 cpsr값을저장하고인터럽트마스크비트수정
5. ‘vk_save_swi_current_tcb_bottom’ 변수에현재 sp값을저장
72Real-Time Computing and Communications Lab., Hanyang University
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vh_entering_swi
SWI 진입루틴구현 2
6. r0 레지스터에커널함수가사용할매개변수를다시저장
• ldr명령어를사용. sp에오프셋을더해 2.에서저장한 r0값을스택에서로드
ldr r0, [sp, #offset]
7. SWI 핸들러로점프
• “bl vk_swi_classifier”
73Real-Time Computing and Communications Lab., Hanyang University
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vh_leaving_swi
SWI 복귀루틴구현1. 스택에저장했던모든레지스터들을복원
• msr명령어로 SPSR에저장해야함
2. movs pc, lr명령어를사용하여원래의루틴으로복귀
74Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 74Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
보고서제출
보고서 학과, 학번, 이름
코드를캡쳐해서보고서에첨부
• HAL_arch_startup.S에서추가한부분(레이블 2개)
vh_entering_swi
vh_leaving_swi
kernel_start.c의주석을수정한후화면캡쳐
• 익셉션이발생하지않고쉘까지출력되어야함
• 쉘에 ‘ls’ 입력후캡쳐
75Real-Time Computing and Communications Lab., Hanyang University
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보고서제출
76Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 76Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
제출방법
제출방법 워드나한글로작성하여메일에첨부
문서제목에학번과이름을적을것
E-mail (반드시아래 2개의메일계정으로모두전송)
메일제목 [임베디드시스템실습과제5]학번_이름
마감일 다음실습수업시간전까지
77Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr 77Real-Time Computing and Communications Lab., Hanyang University
http://rtcc.hanyang.ac.kr
수고하셨습니다.