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Bandgap Reference: Basics

Thanks for the help provided by M. Mobarak ,Faramarz Bahmani and Heng Zhang

ECEN 607 (ESS)

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Outline

IntroductionTemperature-independent referencePTAT generatorSupply insensitive current sourceDesign example

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IntroductionConditions to be satisfied for an IC in production:– Work even when Vcc changes (Supply variation):

• eg: Vcc: 2.7V 3.0V– Work even when temperature changes (Temperature variation):

• eg: T: -25C 0 25C 75C– Work even when physical properties change (Process variation):

• BJTs: β: ±30%• MOS: μ: ±10%, Vth: ±100mV• Resistors: R: ±20%• Capacitors: C: ±5%• Inductors: L: ±1%

All combinations of supply voltage (Vcc), temperature (T) and process (P) variations have to be considered in design. This is often referred to as PVT (process, voltage and temperature)

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Introduction: Case studySmall signal gain variation with PVT:

• Supply variation: low frequency gain almost insensitive to VCC variation (assuming Q in active region)

• Temperature variation: gm is changing (decreasing) with T (assuming ICQ independent of T) gain is dependent on temperature.– Solution: Make ICQ a function of T (increases

with T) gain remains insensitive to T.

• Process variations: In BJTs, VT=KT/q is almost insensitive to process variation (assuming ICQinsensitive to process variations) gm remained intact. However, variations in resistor R results in gain variation.

Vcc

R R

Q1 Q2

biasI

+Vin −Vin

↑==

==

qKT

ICQ

T

CQm

min

out

VI

g

RgVV

Gain

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Introduction: Case studySmall signal gain variation with PVT:

• Supply variation: low frequency gain almost insensitive to VCC variation (assuming Q in active region)

• Temperature and Process variations: Holding R/Rs constant low frequency gain is held constant. can be easily accomplished by– using the same type of resistors for R & Rs– following the standard layout practices to

achieve good component matching

• Bad news: The gain has significantly reduced!

Vcc

biasI

R

Q1+Vin

R

Q1 +Vin

Rs Rs

RsR

VV

Gainin

out ≈=

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Temperature-Independent Reference

ref 1 21 2

V V V=c c 0T T T

∂ ∂ ∂+ =

∂ ∂ ∂

ref 1 1 2 2V c V c V= +

Reference voltages and/or currents with little dependence to temperature prove useful in many analog circuits.

Key idea: add two quantities with opposite temperature coefficient with proper weighting the resultant quantity exhibits zero temperature coefficient.

Eg: V1 and V2 have opposite temperature dependence, choose the coefficients c1 and c2 in such a way that:

Thus, the reference voltage Vref exhibits zero temperature coefficient.

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1 22

V 0 : NTCTif c , c 0V 0 : PTCT

∂⎧ <⎪⎪ ∂⇒ > ⇒ ⎨∂⎪ >⎪ ∂⎩

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Bandgap Voltage ReferenceTarget: A fixed dc reference voltage that does not change with temperature.– Useful in circuits that require a stable reference voltage. E.g.

ADCThe characteristics of BJT have proven the most well-defined quantities providing positive and negative TCkT/q has a positive temperature coefficient– "PTAT" proportional to absolute temperature

VBE of a BJT decreases with temperature– "CTAT" complementary to absolute temperature

Can combine PTAT + CTAT to yield an approximately zero TC voltage reference

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Thermal behavior of BJT

Q

BEQV

CQI

CBE

S

IKTV ln( )q I

=

exp BEC S

T

VI IV

⎛ ⎞= ⎜ ⎟

⎝ ⎠

Even though KT/q increases with temperature, VBE decreasesbecause IS itself strongly depends on temperature

• I0 is a device parameter, which also depends on temperature – We'll ignore this for now• VG0 is the bandgap voltage of silicon "extrapolated to 0° K"

Assuming both I0 and IC are constant over T:

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Extrapolated Bandgap

[Pierret, AdvancedSemiconductor

Fundamentals, p.85]

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PTAT GeneratorAmplifying the difference in VBE of two BJTs PTAT termDifferent VBE voltages can be obtained by:– Applying different ICQ– Using two BJT’s with different emitter areas but equal ICQ

Q2

ccV

CQ2I

BE2V

Q1

ccV

CQ1I

BE1V

0T

ΔV1II

if

)II

ln(q

KTV-VV

BE

CQ2

CQ1

CQ2

CQ1BE2BE1BE

>∂

∂⇒>

==ΔCQ CQ

BEQ1 BEQ2

I IKT KTV ln( ) , V ln( )q αA q αmA

= =

ln(m)q

KTV-VV BEQ2BEQ1BEQ ==Δ

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Bandgap Voltage Reference• Generate an inverse PTAT and a PTAT and sum them appropriately.

– VBE is inverse PTAT at roughly -2.2 mV/°C at room temperature– Vt = kT/q is PTAT that has a temperature coefficient of +0.085 mV/°C

at room temperature.• Multiply Vt by a constant M and summed with the VBE to get

VREF = VBE + MVt

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Bandgap Voltage Reference

Combining VBE and an appropriately scaled version of kT/qproduces a temperature independent voltage, equal to VG0

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PTAT Generator

tR1R1

1 1

2R2 2 R1 t

1

R2 2

1

VVI ln(m)R R

2RV 2R I V ln(m)R

V 2R K ln(m) 0 ; PTC!T R q

= =

= =

∂⇒ = >

∂

• How do we generate a voltage that is the difference of two VBE?

CQ CQBE1 BE2

I IKT KTV ln( ) , V ln( )q αA q αmA

= =

1 BE BE1 BE2KTV V -V ln(m)qRV = Δ = =

IR1 IR1

+

-VR1

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Bandgap Voltage Reference• More to come!

R2BE1BG VVV +=

(NTC)

0T

VBE1 <∂

∂

(PTC)

0T

VR2 >∂∂

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Supply Insensitive Current Source• How can we generate the bias currents ICQ?

– Conventional current mirror:• Current is essentially proportional to VDD

• E.g. if VDD varies by X%, bias current will roughly vary by the same amount.

– Supply insensitive current source:

By using a sufficiently large device,we can make VOV << Vt, and achieve:

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Supply Insensitive Current SourceIn the above discussed bias generator circuits, the supply sensitivity is still fairly high, because IIN is essentially directly proportional to VDD

Idea: Mirror output current back to input instead of using supply dependent input current!

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Start-up Circuit

There exists a stable operating point with all currents =0

(weak)

Can use a simple start-up circuit to solve this problem

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PTAT Current Generation

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Compatibility with CMOS Technology• In CMOS technologies, where the independent bipolar

transistors are not available, parasitic bipolar transistors are used.

• Realization of PTAT voltage from the difference of the source-gate voltages of two MOS transistors biased in weak inversion is also reported in the literature.

"parasitic" substrate PNP transistor available in any CMOS technology

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CMOS Bandgap Reference With Substrate PNP BJTs

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Design example

( ) 22

3

ln 1out BE TRV V V nR

⎛ ⎞= + +⎜ ⎟

⎝ ⎠

Specifications:Vsupply: 5V, 0.5um CMOS processVref : 1.2VTemperature dependence: < 60ppm/C

X Y 1 2 EQ2 EQ1

22 2 3

1

3 1 2

3 22 2 2 2

3 3

22

3

V V , R R , A A

1 ; ;

ln( )

ln( )

1 ln( )

Cout EB R R

C

R EB EB EB T

RR R T

out EB T

nJ V V V VJ n

V V V V V nV RV R I R V nR R

RV V V nR

= = =

⇒ = = + +

= − = Δ =

= = =

⎛ ⎞⇒ = + +⎜ ⎟

⎝ ⎠

A critical point: DC output of Op Amp should be > 700mV for start up

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Choice of n• Usually make n=integer2-1, e.g. n=8

Layout:

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Simulations Result

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A Low-Supply-Voltage CMOS Sub-Bandgap Reference

Ref: A. Becker-Gomez, T. L. Viswanathan, T.R. Viswanathan, "A Low-Supply-Voltage CMOS Sub-Bandgap Reference," IEEE Transactions on Circuits and Systems II: Express Briefs, vol.55, no.7, pp.609-613, July 2008

• Low supply voltage • No resistor or op-amp

is used, thus it is compatible with digital processes

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A Low-Supply-Voltage CMOS Sub-Bandgap Reference

( ) TT01C2

02C1TBE2BE1PTAT 4.6V100lnV

IIII

lnVVVV ==⎟⎟⎠

⎞⎜⎜⎝

⎛=−=

( )2i

2PTAT

iSG2SG1PTAT

/nA1

kVI

I/nkAI/kVVV

−=⇒

−=−=

PTATBE2i

iPTATBE2BG

iSG2SG6BE2BG

Vm/rV/nA1

/nAm/rVVV

I/nkAmI/rkVVVV

+≈−

−+=⇒

−=−=−

• r is the ratio between M6/M1

• m is the ratio between M5/M1• For Ai <<1, n>>1

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SummaryHow to Build a Bandgap.-

1. Generate two currents and dump into the transistors

2. Add a mechanism to force Vo1 = Vo2

3. Add a scale factor to generate zero TC output

4. Startup circuit, some tweaking

Done!!!

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ReferencesFirst bandgap voltage reference:R. J. Widlar, "New developments in IC voltage regulators," IEEE J. Solid-State Circuits, pp. 2-7, Feb. 1971.A classic implementation:A. P. Brokaw, "A simple three-terminal IC bandgapreference,“ IEEE J. Solid-State Circuits, pp. 388-393, Dec. 1974.Design of Analog Integrated Circuits, Behzad RazaviAnalysis and Design of Analog Integrated Circuits, P.R. Gray, P. Hurst