FEATURES LOW DISTORTION: 0.0003% at 1kHz

LOW NOISE: 10nV/√Hz

HIGH SLEW RATE: 25V/µs

WIDE GAIN-BANDWIDTH: 20MHz

UNITY-GAIN STABLE

WIDE SUPPLY RANGE: VS = ±4.5 to ±24V

DRIVES 600Ω LOAD

DUAL VERSION AVAILABLE (OPA2604)

FET-Input, Low DistortionOPERATIONAL AMPLIFIER

APPLICATIONS PROFESSIONAL AUDIO EQUIPMENT

PCM DAC I/V CONVERTERS

SPECTRAL ANALYSIS EQUIPMENT

ACTIVE FILTERS

TRANSDUCER AMPLIFIERS

DATA ACQUISITION

OPA604

DESCRIPTIONThe OPA604 is a FET-input operational amplifier designedfor enhanced AC performance. Very low distortion, low noiseand wide bandwidth provide superior performance in highquality audio and other applications requiring excellent dy-namic performance.

New circuit techniques and special laser trimming of dynamiccircuit performance yield very low harmonic distortion. Theresult is an op amp with exceptional sound quality. The low-noise FET input of the OPA604 provides wide dynamicrange, even with high source impedance. Offset voltage islaser-trimmed to minimize the need for interstage couplingcapacitors.

The OPA604 is available in 8-pin plastic mini-DIP and SO-8surface-mount packages, specified for the –25°C to +85°Ctemperature range.

DistortionRejectionCircuitry(1)

(3)

(+)

(2)

(–)

(7)V+

(6)VO

(4)V–

OutputStage(1)

NOTE: (1) Patents Granted: #5053718, 5019789

(5)

(1)

OPA604 OPA604

SBOS019A – JANUARY 1992 – SEPTEMBER 2003

www.ti.com

PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

Copyright © 1992-2003, Texas Instruments Incorporated

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

OPA6042SBOS019Awww.ti.com

ABSOLUTE MAXIMUM RATINGS

Power Supply Voltage ....................................................................... ±25VInput Voltage ............................................................... (V–)–1V to (V+)+1VOutput Short Circuit to Ground ................................................ ContinuousOperating Temperature .................................................. –40°C to +100°CStorage Temperature ...................................................... –40°C to +125°CJunction Temperature .................................................................... +150°CLead Temperature (soldering, 10s) AP .......................................... +300°CLead Temperature (soldering, 3s) AU ............................................ +260°C

PIN CONFIGURATION

Top View DIP, SOIC

1

2

3

4

Offset Trim

–In

+In

–VS

8

7

6

5

No Internal Connection

+VS

Output

Offset Trim

ELECTROSTATICDISCHARGE SENSITIVITY

Any integrated circuit can be damaged by ESD. Texas Instru-ments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handlingand installation procedures can cause damage.

ESD damage can range from subtle performance degradationto complete device failure. Precision integrated circuits may bemore susceptible to damage because very small parametricchanges could cause the device not to meet published speci-fications.

PACKAGE/ORDERING INFORMATION

For the most current package and ordering information, seeto the Package Option Addendum at the end of this datasheet.

OPA604 3SBOS019A www.ti.com

ELECTRICAL CHARACTERISTICSTA = +25°C, VS = ±15V, unless otherwise noted.

OPA604AP, AU

PARAMETER CONDITION MIN TYP MAX UNITS

OFFSET VOLTAGEInput Offset Voltage ±1 ±5 mVAverage Drift ±8 µV/°CPower Supply Rejection VS = ±5 to ±24V 80 100 dB

INPUT BIAS CURRENT(1)

Input Bias Current VCM = 0V 50 pAInput Offset Current VCM = 0V ±3 pA

NOISEInput Voltage NoiseNoise Density: f = 10Hz 25 nV/√Hz

f = 100Hz 15 nV/√Hzf = 1kHz 11 nV/√Hzf = 10kHz 10 nV/√Hz

Voltage Noise, BW = 20Hz to 20kHz 1.5 µVPP

Input Bias Current NoiseCurrent Noise Density, f = 0.1Hz to 20kHz 4 fA/√Hz

INPUT VOLTAGE RANGECommon-Mode Input Range ±12 ±13 VCommon-Mode Rejection VCM = ±12V 80 100 dB

INPUT IMPEDANCEDifferential 1012 || 8 Ω || pFCommon-Mode 1012 || 10 Ω || pF

OPEN-LOOP GAINOpen-Loop Voltage Gain VO = ±10V, RL = 1kΩ 80 100 dB

FREQUENCY RESPONSEGain-Bandwidth Product G = 100 20 MHzSlew Rate 20VPP, RL = 1kΩ 15 25 V/µsSettling Time: 0.01% G = –1, 10V Step 1.5 µs

0.1% 1 µsTotal Harmonic Distortion + Noise (THD+N) G = 1, f = 1kHz 0.0003 %

VO = 3.5Vrms, RL = 1kΩ

OUTPUTVoltage Output RL = 600Ω ±11 ±12 VCurrent Output VO = ±12V ±35 mAShort Circuit Current ±40 mAOutput Resistance, Open-Loop 25 Ω

POWER SUPPLYSpecified Operating Voltage ±15 VOperating Voltage Range ±4.5 ±24 VCurrent ±5.3 ±7 mA

TEMPERATURE RANGESpecification –25 +85 °CStorage –40 +125 °CThermal Resistance(2), θJA 90 °C/W

NOTES: (1) Typical performance, measured fully warmed-up. (2) Soldered to circuit board—see text.

OPA6044SBOS019Awww.ti.com

TYPICAL CHARACTERISTICSTA = +25°C, VS = ±15V, unless otherwise noted.

TOTAL HARMONIC DISTORTION + NOISEvs FREQUENCY

Frequency (Hz)

TH

D +

N (

%)

1

0.1

0.01

0.001

0.0001

20 100 1k 10k 20k

G = 100V/V

G = 10V/V

G = 1V/V

Measurement BW = 80kHzSee “Distortion Measure-ments” for description oftest method.

1kΩ

V =3.5Vrms

O

TOTAL HARMONIC DISTORTION + NOISEvs OUTPUT VOLTAGE

Output Voltage (VPP)

TH

D +

N (

%)

0.1 1 10 100

0.1

0.01

0.001

0.0001

1kΩ

V O

f = 1kHzMeasurement BW = 80kHz

See “Distortion Measurements”for description of test method.

OPEN-LOOP GAIN/PHASE vs FREQUENCY

Frequency (Hz)

Vol

tage

Gai

n (d

B)

120

100

80

60

40

20

0

–201 10 100 1k 10k 100k 1M 10M

0

–45

–90

–135

–180

Pha

se S

hift

(Deg

rees

)

G

φ

INPUT VOLTAGE AND CURRENT NOISESPECTRAL DENSITY vs FREQUENCY

Frequency (Hz)

Vol

tage

Noi

se (

nV/

Hz)

1

1k

100

10

110 100 1k 10k 100k 1M

Cur

rent

Noi

se (

fA/

Hz)

1k

100

10

1

Voltage Noise

Current Noise

INPUT BIAS AND INPUT OFFSET CURRENT vs TEMPERATURE

Ambient Temperature (°C)

Inpu

t Bia

s C

urre

nt (

pA)

–75

100nA

10nA

1nA

100

10

1

Inpu

t Offs

et C

urre

nt (

pA)

10nA

1nA

100

10

1

0.1–50 –25 0 25 50 75 100 125

InputOffset Current

InputBias Current

INPUT BIAS AND INPUT OFFSET CURRENT vs INPUT COMMON-MODE VOLTAGE

Common-Mode Voltage (V)

Inpu

t Bia

s C

urre

nt (

pA)

–15

10nA

1nA

100

10

Inpu

t Offs

et C

urre

nt (

pA)

1nA

100

10

1–10 –5 0 5 10 15

InputOffset Current

InputBias Current

OPA604 5SBOS019A www.ti.com

TYPICAL CHARACTERISTICS (Cont.)TA = +25°C, VS = ±15V, unless otherwise noted.

COMMON-MODE REJECTION vs COMMON-MODE VOLTAGE

Common-Mode Voltage (V)

Com

mon

-Mod

e R

ejec

tion

(dB

)

–15

120

110

100

90

80–10 –5 0 5 10 15

POWER SUPPLY AND COMMON-MODEREJECTION vs FREQUENCY

Frequency (Hz)

Pow

er S

uppl

y R

ejec

tion

(dB

)

10

120

100

80

60

40

20

0100 1k 10k 100k 1M 10M

Com

mon

-Mod

e R

ejec

tion

(dB

)120

100

80

60

40

20

0

+PSR

–PSRCMR

AOL, PSR, AND CMR vs SUPPLY VOLTAGE

Supply Voltage (±VS)

AO

L, P

SR

, CM

R (

dB)

5

120

110

100

90

80

7010 15 20 25

CMR

AOL

PSR

GAIN-BANDWIDTH AND SLEW RATEvs TEMPERATURE

Temperature (°C)

Gai

n-B

andw

idth

(M

Hz)

–75

28

24

20

16

12–25 25 75 125

Sle

w R

ate

(V/µ

s)

30

25

20

15

10–50 0 50 100

Slew Rate

Gain-BandwidthG = +100

INPUT BIAS CURRENT vs TIME FROM POWER TURN-ON

Time After Power Turn-On (min)

Inpu

t Bia

s C

urre

nt (

pA)

0

1nA

100

10

11 2 3 4 5

VS = ±24V

VS = ±15V

VS = ±5V

GAIN-BANDWIDTH AND SLEW RATEvs SUPPLY VOLTAGE

Supply Voltage (±VS)

Gai

n-B

andw

idth

(M

Hz)

5

28

24

20

16

1210 15 20 25

Slew RateGain-BandwidthG = +100

Sle

w R

ate

(V/µ

s)

33

29

25

21

17

OPA6046SBOS019Awww.ti.com

TYPICAL CHARACTERISTICS (Cont.)T

A = +25°C, V

S = ±15V, unless otherwise noted.

0

SETTLING TIME vs CLOSED-LOOP GAIN

Closed-Loop Gain (V/V)

Set

tling

Tim

e (µ

s)

–1

5

4

3

2

1

0–10 –100 –1000

0.01%

0.1%

VO = 10V StepRL = 1kΩCL = 50pF

MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY

Frequency (Hz)

Out

put V

olta

ge (

Vp-

p)

10k

30

20

10

0100k 1M 10M

V = ±15VS

SUPPLY CURRENT vs TEMPERATURE

Ambient Temperature (°C)

Sup

ply

Cur

rent

(m

A)

−75

7

6

5

4

3−50 −25 0 25 50 75 100 125

VS = ±24V

VS = ±15V

VS = ±5V

SHORT-CIRCUIT CURRENT vs TEMPERATURE

Ambient Temperature (°C)

Sho

rt-C

ircui

t Cur

rent

(m

A)

–75

60

50

40

30

20–50 –25 0 25 50 75 100 125

ISC+ and ISC–

–100

+100

21

Out

put

Vol

tage

(V

)

SMALL-SIGNAL TRANSIENT RESPONSE

0

–10

+10

105

Out

put

Vol

tage

(V

)LARGE-SIGNAL TRANSIENT RESPONSE

OPA604 7SBOS019A www.ti.com

TYPICAL CHARACTERISTICS (Cont.)T

A = +25°C, V

S = ±15V, unless otherwise noted.

APPLICATIONS INFORMATIONOFFSET VOLTAGE ADJUSTMENT

The OPA604 offset voltage is laser-trimmed and will requireno further trim for most applications. As with most amplifiers,externally trimming the remaining offset can change driftperformance by about 0.3µV/°C for each 100µV of adjustedoffset. The OPA604 can replace many other amplifiers byleaving the external null circuit unconnected.

The OPA604 is unity-gain stable, making it easy to use in awide range of circuitry. Applications with noisy or high imped-ance power supply lines may require decoupling capacitorsclose to the device pins. In most cases, a 1µF tantalumcapacitor at each power supply pin is adequate.

DISTORTION MEASUREMENTS

The distortion produced by the OPA604 is below the mea-surement limit of virtually all commercially available equip-ment. A special test circuit, however, can be used to extendthe measurement capabilities.

Op amp distortion can be considered an internal error sourcewhich can be referred to the input. Figure 2 shows a circuitwhich causes the op amp distortion to be 101 times greaterthan normally produced by the op amp. The addition of R3 tothe otherwise standard noninverting amplifier configurationalters the feedback factor or noise gain of the circuit. Theclosed-loop gain is unchanged, but the feedback availablefor error correction is reduced by a factor of 101. Thisextends the measurement limit, including the effects of thesignal-source purity, by a factor of 101. Note that the inputsignal and load applied to the op amp are the same as withconventional feedback without R3.

Validity of this technique can be verified by duplicatingmeasurements at high gain and/or high frequency where thedistortion is within the measurement capability of the testequipment. Measurements for this data sheet were madewith the Audio Precision System One, which greatly simpli-fies such repetitive measurements. The measurement tech-nique can, however, be performed with manual distortionmeasurement instruments.

CAPACITIVE LOADS

The dynamic characteristics of the OPA604 have beenoptimized for commonly encountered gains, loads and oper-ating conditions. The combination of low closed-loop gainand capacitive load will decrease the phase margin and maylead to gain peaking or oscillations. Load capacitance reactswith the op amp’s open-loop output resistance to form anadditional pole in the feedback loop. Figure 3 shows variouscircuits which preserve phase margin with capacitive load.For details of analysis techniques and applications circuits,refer to application bulletin AB-028 (SBOA015) located atwww.ti.com.

FIGURE 1. Offset Voltage Trim.

Supply Voltage, ±VS (V)

6 8 10 12 14 16 18 20 22 24

0.5

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

Pow

er D

issi

patio

n (W

)POWER DISSIPATION vs SUPPLY VOLTAGE

No signalor no load

Typical high-levelmusic RL = 600Ω

Worst case sinewave RL = 600Ω

Ambient Temperature (°C)

0

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

Tot

al P

ower

Dis

sipa

tion

(W)

MAXIMUM POWER DISSIPATION vs TEMPERATURE

25 50 75 100 125 150

J-A = 90°C/WSoldered to

Circuit Board(see text)

θ

MaximumSpecified Operating

Temperature85°C

OPA604

±50mV TypicalTrim Range

NOTE: (1) 50kΩ to 1MΩTrim Potentiometer(100kΩ Recommended)

+VCC

–VCC

7

6

5

1

(1)

4

3

2

OPA6048SBOS019Awww.ti.com

For the unity-gain buffer, Figure 3a, stability is preserved byadding a phase-lead network, RC and CC. Voltage dropacross RC will reduce output voltage swing with heavy loads.An alternate circuit, Figure 3b, does not limit the output withlow load impedance. It provides a small amount of positivefeedback to reduce the net feedback factor. Input impedanceof this circuit falls at high frequency as op amp gain rolloffreduces the bootstrap action on the compensation network.

Figures 3c and 3d show compensation techniques fornoninverting amplifiers. Like the follower circuits, the circuit inFigure 3d eliminates voltage drop due to load current, but atthe penalty of somewhat reduced input impedance at highfrequency.

Figures 3e and 3f show input lead compensation networksfor inverting and difference amplifier configurations.

NOISE PERFORMANCE

Op amp noise is described by two parameters—noise volt-age and noise current. The voltage noise determines thenoise performance with low source impedance. Low noisebipolar-input op amps such as the OPA27 and OPA37provide very low voltage noise. But if source impedance isgreater than a few thousand ohms, the current noise of

bipolar-input op amps react with the source impedance andwill dominate. At a few thousand ohms source impedanceand above, the OPA604 will generally provide lower noise.

POWER DISSIPATION

The OPA604 is capable of driving a 600Ω load with power-supply voltages up to ±24V. Internal power dissipation isincreased when operating at high power supply voltage. Thetypical characteristic curve, Power Dissipation vs PowerSupply Voltage, shows quiescent dissipation (no signal or noload) as well as dissipation with a worst case continuous sinewave. Continuous high-level music signals typically producedissipation significantly less than worst-case sine waves.

Copper leadframe construction used in the OPA604 im-proves heat dissipation compared to conventional plasticpackages. To achieve best heat dissipation, solder the de-vice directly to the circuit board and use wide circuit boardtraces.

OUTPUT CURRENT LIMIT

Output current is limited by internal circuitry to approximately±40mA at 25°C. The limit current decreases with increasingtemperature as shown in the typical curves.

FIGURE 2. Distortion Test Circuit.

R2

OPA604

R1

R3 VO = 10Vp-p (3.5Vrms)

GeneratorOutput

AnalyzerInput

Audio PrecisionSystem OneAnalyzer(1)

RL1kΩ

IBM PCor

Compatible

SIG.GAIN

DIST.GAIN R1 R2 R3

∞

500Ω

50Ω

5kΩ

5kΩ

5kΩ

50Ω

500Ω

∞

1

10

100

101

101

101

NOTE: (1) Measurement BW = 80kHz

OPA604 9SBOS019A www.ti.com

FIGURE 3. Driving Large Capacitive Loads.

NOTE: Design equations and component values are approximate. User adjustment is required for optimum performance.

CC

820pF

RC

750Ω

CL5000pF

ei

CC = 120 X 10–12 CL

(a)

eo

CL5000pF

ei

RC =

(b)

RC

10Ω

CC0.47µF

R2

2kΩ

R2

4CL X 1010 – 1

CC =CL X 103

RC

eo

CL5000pF

R2

10kΩ

R1

10kΩ

CC =50R2

CL

ei

RC

25Ω

CC

24pF

(c)

eo

CL5000pF

R2

2kΩ

R1

2kΩ

ei

RC20Ω

CC0.22µF

(d)

RC =R2

2CL X 1010 – (1 + R2/R1)

eo

CL5000pF

R2

2kΩ

R1

2kΩei

RC20Ω

CC0.22µF

(e)

RC =R2

2CL X 1010 – (1 + R2/R1)

eo

CL5000pF

R2

2kΩ

R1

2kΩe1

RC20Ω

CC0.22µF

(f)

RC =R2

2CL X 1010 – (1 + R2/R1)

R3

2kΩe2

R4

2kΩ

eo

OPA604

CC =CL X 103

RC

CC =CL X 103

RC

CC =CL X 103

RC

OPA604

OPA604

OPA604

OPA604

OPA604

OPA60410SBOS019Awww.ti.com

FIGURE 5. Three-Pole Generalized Immittance Converter (GIC) Low-Pass Filter.

FIGURE 4. Three-Pole Low-Pass Filter.

R5

2kΩ

VO

C31000pF

Low-pass3-pole Butterworthf–3dB = 40kHz

R1

6.04kΩVIN

R2

4.02kΩ

R2

4.02kΩ

C21000pF

C11000pF

R4

5.36kΩ

See Application Bulletin AB-026for information on GIC filters.

1 2

OPA2604

1 2

OPA2604

OPA604

FIGURE 6. Differential Amplifier with Low-Pass Filter.

R4

22kΩ

R3

10kΩ VO

C22000pF

R2

22kΩ

C13000pF

R1

2.7kΩVIN

fp = 20kHz

C3

100pF

OPA604

VOG = 1

100pF

–

VIN

+

7.87kΩ

7.87kΩ

10kΩ 10kΩ

10kΩ 10kΩ100kHz Input Filter

OPA604

1 2

OPA2604

1 2

OPA2604

OPA604 11SBOS019A www.ti.com

FIGURE 8. Digital Audio DAC I-V Amplifier.FIGURE 7. High Impedance Amplifier.

FIGURE 9. Using Two OPA604 Op Amps to Double the Output Current to a Load.

OPA604OPA604

A1

A2

VIN

R1

R2I1

R4

51Ω

I2

OPA604

R3

51Ω

IL = I1 + I2

Load

VOUT = VIN (1+R2/R1)

VOUT

OPA604

G = 101 (40dB)

100Ω 10kΩ

PiezoelectricTransducer

1MΩ(1)

NOTE: (1) Provides inputbias current return path.

OPA604

VO = ±3Vp

RF = Internal feedback resistance = 1.5kΩfC = Crossover frequency = 8MHz

C1(1)

NOTE: (1) C1 ≈COUT

2π Rf fc

To low-passfilter.

OPA604

5

6

9

PCM6320-bitD/A

Converter

10

OPA60412SBOS019Awww.ti.com

1

00 1

IC(mA)

0 5

log(VO)

1 2 3 4

fO 2fO 3fO 4fO 5fO

VBE = 1kHz + DC Bias

VBE (V)0.65

FFT

Frequency (kHz)

1

01 0

–ID(mA)

0 5

log(VO)

1 2 3 4

fO 2fO 3fO 4fO 5fO

VGS = 1kHz + DC Bias

VGS (V)

FFT

Frequency (kHz)

VO

ID

VGS

VO

IC

VBE

FIGURE 10. I-V and Spectral Response of NPN andJFET.

THE OPA604 DESIGN

The OPA604 uses FETs throughout the signal path,including the input stage, input-stage load, and theimportant phase-splitting section of the output stage.Bipolar transistors are used where their attributes,such as current capability are important, and wheretheir transfer characteristics have minimal impact.

The topology consists of a single folded-cascode gainstage followed by a unity-gain output stage. Differen-tial input transistors J1 and J2 are special large-geom-etry, P-channel JFETs. Input stage current is a rela-tively high 800µA, providing high transconductanceand reducing voltage noise. Laser trimming of stagecurrents and careful attention to symmetry yields anearly symmetrical slew rate of ±25V/µs.

The JFET input stage holds input bias current toapproximately 50pA or roughly 3000 times lower thancommon bipolar-input audio op amps. This dramati-cally reduces noise with high-impedance circuitry.

The drains of J1 and J2 are cascoded by Q1 and Q2,driving the input stage loads, FETs J3 and J4. Distor-tion reduction circuitry (patented) linearizes the open-loop response and increases voltage gain. The 20MHzbandwidth of the OPA604 further reduces distortionthrough the user-connected feedback loop.

The output stage consists of a JFET phase-splitterloaded into high speed all-NPN output drivers. Outputtransistors are biased by a special circuit to preventcutoff, even with full output swing into 600Ω loads.

The following discussion is provided, recognizing thatnot all measured performance behavior explains orcorrelates with listening tests by audio experts. Thedesign of the OPA604 included consideration of bothobjective performance measurements, as well as anawareness of widely held theory on the success andfailure of previous op amp designs.

SOUND QUALITY

The sound quality of an op amp is often the crucialselection criteria—even when a data sheet claimsexceptional distortion performance. By its nature, soundquality is subjective. Furthermore, results of listeningtests can vary depending on application and circuitconfiguration. Even experienced listeners in controlledtests often reach different conclusions.

Many audio experts believe that the sound quality of ahigh performance FET op amp is superior to that ofbipolar op amps. A possible reason for this is thatbipolar designs generate greater odd-order harmonicsthan FETs. To the human ear, odd-order harmonicshave long been identified as sounding more unpleas-ant than even-order harmonics. FETs, like vacuumtubes, have a square-law I-V transfer function which ismore linear than the exponential transfer function of abipolar transistor. As a direct result of this square-lawcharacteristic, FETs produce predominantly even-or-der harmonics. Figure 10 shows the transfer function ofa bipolar transistor and FET. Fourier transformation ofboth transfer functions reveals the lower odd-orderharmonics of the FET amplifier stage.

SOUND QUALITY

DistortionRejectionCircuitry

(+)

(–)OutputStage

R3

1kΩR4

1kΩR8

3kΩR9

3kΩ

R1

75ΩR2

75ΩR5

500ΩR7

4kΩ

R6

500Ω

I1800µA

J1 J2 J3 J4

Q4

Q2Q3Q1

J5

I2

200µA

R1010kΩ

R1110kΩ

PACKAGE OPTION ADDENDUM

www.ti.com 6-Sep-2016

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

OPA604AP ACTIVE PDIP P 8 50 Green (RoHS& no Sb/Br)

CU NIPDAU N / A for Pkg Type -40 to 85 OPA604AP

OPA604APG4 ACTIVE PDIP P 8 50 Green (RoHS& no Sb/Br)

CU NIPDAU N / A for Pkg Type -40 to 85 OPA604AP

OPA604AU ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)

CU NIPDAU Level-3-260C-168 HR -40 to 85 OPA604AU

OPA604AU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAU Level-3-260C-168 HR -40 to 85 OPA604AU

OPA604AU/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAU Level-3-260C-168 HR -40 to 85 OPA604AU

OPA604AUE4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)

CU NIPDAU Level-3-260C-168 HR -40 to 85 OPA604AU

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

PACKAGE OPTION ADDENDUM

www.ti.com 6-Sep-2016

Addendum-Page 2

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

OPA604AU/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2013

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

OPA604AU/2K5 SOIC D 8 2500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2013

Pack Materials-Page 2

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