FX-GXDeveloper SFC Tutorial

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  • Trng i Hc Bch Khoa H Ni

    Vin in

    Ti liu hng dn lp trnh SFC cho PLC ca MISTSUBISHI h

    FX CPU bng phn mm GX Developer

    Gio vin hng dn: Thy Dng Minh c

    Sinh vin thc hin: ng Vit Ha

    ng Ngc Hnh

    Trn Cng nh

    H Ni 11/2012

  • 1

    MC LC

    I. Tng quan v ngn ng SFC cho PLC h FX. 3

    1. Grafcet. 3

    2. Gii thiu ngn ng SFC. 3

    3. Cc thao tc c bn trong lp trnh SFC 5

    II. Cc biu tng s dng trong lp trnh SFC cho PLC h FX CPU 6

    III. To v chnh sa s SFC 8

    IV. Cc v d minh ha 16

    V d 1. 16

    V d 2. 34

    Ti liu tham kho 41

  • Hng dn lp trnh SFC cho PLC h FX CPU

    3 ng Ngc Hnh ng Vit Ha Trn Cng nh

    I- Tng quan v ngn ng SFC cho PLC h FX.

    1. Grafcet.

    thy s ng dng ca phng php Grafcet trong lp trnh cho PLC (chnh l ngn ng SFC),

    phn ny s nhc li mt s khi nim c bn ca Grafcet. (Tt c cc khi nim, thng tin v

    Grafcet vit phn ny u c trch t ti liu hc tp mn iu khin logic v PLC ca thy

    Dng Minh c - Vin in - Trng i Hc Bch Khoa H Ni).

    Grafcet (Graphe Fonctinnel de Conmmande tape Transition) l mt hnh chc nng

    cho php m t cc trng thi lm vic ca h thng v biu din qu trnh iu khin vi cc

    trng thi chuyn bin t trng thi ny sang trng thi khc, l mt graph nh hng v c

    xc nh bi cc phn t sau:

    G={E,T,A,M}

    Trong :

    E={E1, E2,,Em} l tp hu hn cc trng thi (giai on) ca h thng. Mi trng thi ng

    vi nhng tc ng no ca phn iu khin v trong mt trng thi cc hnh vi iu khin

    l khng thay i. Mt trng thi c hai kh nng l hot ng v khng hot ng. iu khin

    chnh l thc hin cc mnh logic cha cc bin vo v cc bin ra h thng c c mt

    trng thi xc nh trong h v cng chnh l mt trng thi ca Grafcet.

    T={t1,t2,,tp} l tp hu hn cc chuyn tip (chuyn trng thi). Hm Boole gn vi mt

    chuyn tip c gi l mt tip nhn. Gia hai trng thi lun lun tn ti mt chuyn tip.

    A={a1,a2,,an} l tp cc cung nh hng ni gia mt trng thi ny vi mt chuyn tip

    hoc gia mt chuyn tip vi mt trng thi.

    M={m1,m2,,mm) l tp cc gi tr 0 v 1. Nu mi=1 th trng thi th I l hot ng, nu

    mi=0 th trng thi i khng hot ng.

    V cc k hiu ca cc trng thi, chuyn tip, phn nhnh trong Grafcet, cc bn c th tm hiu

    (hoc c li) trong ti liu ging dy ca thy Dng Minh c.

    2. Gii thiu v ngn ng SFC cho PLC h FX.

    Cc Step hay cn gi l SFC process (In GX Developer, an SFC process is called a "step")

    trong ngn ng SFC, tng ng vi Grafcet l cc trng thi E. Mi Step (S) u c nh s

    tng t cc trng thi E. V d Step S1, S2, S3, tng t cc trng thi E1, E2, E3

    Cc Step chnh l cc R-le trng thi trong PLC (State Relay). Cc Step bt u t S0-S9

    c gi l cc Step khi to (Initial Step), v lun l Step u tin bt u cho mt khi SFC

    (SFC Block). Cc Step bt u t S10 tr i c s dng nh cc Step thng thng, s Step

    ti a cho mt khi SFC l 512 Step.Mi Step (hay State Relay) c ni vi mt mch in

    ni(internal circuit) bn trong PLC.Trng thi hot ng ca cc mch in ni kt ni vi cc

    Step c phn thnh 3 trng thi l ON, OFF, v khng hot ng, c miu t nh hnh

    di.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    4 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Hnh 1- Cc trng thi hot ng ca mch in ni.

    Cc chuyn tip tng ng trong Grafcet, c gi l cc Transition trong ngn ng SFC. Cc

    Transition c nh s nh cc Step. Nh hnh trn, cc Transistion u c ni vi cc

    mch in ni. Khi tha mn iu kin chuyn, th Step tip theo c hot ng, v Step trc

    s b dng.

    Cc mch in ni l cc khi Ladder, v hot ng ging nh cc khi Ladder khi vit chng

    trnh bng ngn ng Ladder.

    Cc phn nhnh c s Step tip theo ti a l 8, nhng nu c nhiu phn nhnh, th tng s

    ti a cc Step tip theo l 16, c miu t nh hnh di.

    Hnh 2- S Step "tip theo" cho mi phn nhnh.

    Trong ngn ng SFC, chuyn ti cc Step trc , hay mt khi SFC khc, c th dung

    biu tng nhy(Jump Symbol). Cc thuc tnh km theo nh sau:

    Nhy ti mt Step khc. Step khc c th nm trong cng khi vi Step trc , hoc

    nm mt khi khc.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    5 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Reset Step: Nu s dng biu tng ny th Step ch s c Reset khi iu kin

    chuyn tha mn.

    Lnh RET: Trong lp trnh SFC cho FX CPU, lnh RET s c t ng thm vo sau mi

    khi (Block), ngi vit chng trnh khng phi thm lnh RET cui mi Block. V lnh

    RET cng s khng c hin th , nh i vi lp trnh bng ngn ng Ladder.

    Ngi lp trnh c th vit cc ch thch (comment) cho cc Step, nhng i vi FX CPU,

    vic vit cc ch thch cho cc Transition s khng c cho php.

    3. Cc thao tc c bn vit v sa mt chng trnh SFC cho PLC h FX CPU.

    Cc thao tc c bn c minh ha nh hnh sau, Hnh 3.

    Hnh 3- Cc thao tc c bn to/sa chng trnh SFC.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    6 ng Ngc Hnh ng Vit Ha Trn Cng nh

    II- Cc biu tng s dng trong lp trnh SFC cho PLC h FX CPU.

    Cc biu tng s dng trong lp trnh SFC cho PLC h FX CPU ca MITSUBISHI s dng phn

    mm GX Developer.

    Cc biu tng c chia thnh cc lp v c biu din bi cc hnh nh sau:

    Lp Ladder (Ladder Class):

    Khi Ladder (Ladder Block):

    Lp Step (lp cc trng thi):

    Step khi to: vi i l s th t ca Step (Step number).

    Step thng thng: s Step ti a cho mi khi SFC (SFC Block) l 512.

    Lp chuyn tip (Transition Class):

    Chuyn tip ni tip (Series Transition):

    R nhnh la chn (Selective Branch):

    Selective Branch trong ngn ng lp trnh SFC chnh l phn nhnh phn k HOC

    trong Grafcet.

    Hi t la chn: (Selective Coupling):

    Selective Coupling trong ngn ng lp trnh SFC chnh lphn nhnh hi t HOC

    trong Grafcet.

    R nhnh song song (Parallel Branch):

    Parallel Branch trong ngn ng lp trnh SFC chnh l phn nhnh phn k V trong

    Grafcet.

    Hi t song song (Parallel Coupling):

    Parallel Coupling trong ngn ng lp trnh SFC chnh l phn nhnh hi t V trong

    Grafcet.

    Chuyn tip Jump:

    Chuyn tip Jump dng nhy ti mt Step trc nm trong cng mt khi SFC hoc

    nm mt khi SFC khc.

    Reset JUMP:

    Reset JUMP s reset trng thi ca Step ch, v nhy v Step trc ca chuyn tip.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    7 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Bng sau tng hp li cc biu tng s dng trong lp trnh SFC cho PLC h FX CPU.

    Bng 1-Cc biu tng trong lp trnh SFC cho FX CPU.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    8 ng Ngc Hnh ng Vit Ha Trn Cng nh

    III- To v chnh sa lu SFC.

    Hnh 4-Ca s lp trnh SFC.

    Hnh trn l ca s ngi dng trong lp trnh SFC cho PLC bng phn mm GX Developer. Ca s

    lm vic bao gm cc vng sau:

    1) Vng hin th tn Project, s cc Step c s dng, s th t ca Block ang c chnh sa

    (Block number), ch ca Project

    2) Cc tab Menu trn thanh Menu.

    3) Cc biu tng trn thanh cng c.

    4) Vng hin th cc thng tin ca Project.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    9 ng Ngc Hnh ng Vit Ha Trn Cng nh

    5) Vng vit/chnh sa lu SFC.

    6) Vng lp trnh cc hot ng u ra hoc lp trnh iu kin cho cc chuyn tip (hay l Internal

    circuit nh ni phn trn). Ngn ng dng cho vng ny l Ladder.

    7) Loi CPU c s dng trong Project.

    8) Hin th ch chnh sa (Edit mode).

    to lu SFC, cc biu tng (SFC symbol) c ly ra, t vo khi SFC, sau kt ni cc

    biu tng li vi nhau theo mt trnh t.

    ly ra cc biu tng, ngi lp trnh c th s dng mt trong 4 cch sau:

    S dng cc Nt trn thanh cng c (Toolbar button).

    S dng cc phm chc nng (Function key).

    S dng cc Menu trn Toolbar.

    Hoc nhn phm Enter trong vng vit/chnh sa SFC.

    Khi s dng mt trong cc cch trn, mt ca s hin ra cho php la chn biu tng cn ly gi l

    ca s Enter SFC symbol. Vi ca s ny, ngi lp trnh c th ly ra biu tng cn thit.

    Hnh 5-Ca s Enter SFC symbol.

    Trong lp trnh SFC cho FX CPU, ton b chng trnh c chia thnh cc KHI (Block), tng

    ng cho mi phn on ca qu trnh sn xut. Cc Block c chia thnh hai loi l SFC Block, hay

    Ladder Block. Khi lp trnh cho mi Block, ngi lp trnh cn chn loi Block cho Block , l SFC

    Block hay Ladder Block. Vi Ladder Block, ngn ng lp trnh l Ladder nh thng thng. vi SFC

    Block, ngn ng lp trnh l SFC, chnh l cc biu tng SFC (SFC Symbol) ni trn.

    Trong vng 4, Vng hin th cc thng tin ca Project, chn Program => Main, danh sch cc block

    s hin ra.

    Nhy p chut vo Block cn lp trnh, la chn Block l SFC Block hay Ladder Block. t

    tn cho Block trong Block title.Sau nhn Excute vo ca s vit chng trnh.Cc bc trn

    c minh ha thng qua cc hnh sau.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    10 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Hnh 6- t tiu v thit lp mt Ladder Block.

    Hnh 7 - t tiu v thit lp mt SFC Block.

    Nh ni trn, khi mt Block l Ladder Block, th ngn ng lp trnh cho Block s l ngn ng

    Ladder nh thng thng.Nn trong phn ny s khng cp ti vic vit chng trnh cho mt khi

    l Ladder Block.Vi mt Block l SFC Block, ngn ng lp trnh l SFC vi cc biu tng c

  • Hng dn lp trnh SFC cho PLC h FX CPU

    11 ng Ngc Hnh ng Vit Ha Trn Cng nh

    gii thiu trn.Phn sau y s hng dn vic ly ra cc biu tng (SFC symbol) dng trong lp

    trnh SFC.

    a) To mt Step (trng thi).

    T ca s lp trnh nhn phm F5 , hoc nhn chut vo biu tng tng ng trn thanh cng

    c, xut hin ca s Enter SFC Symbol.

    Hnh 8 - To mt Step.

    phn Symbol nhn nt th xung v chn Step nh hnh sau:

    Hnh 9 - La chn thuc tnh cho Symbol l Step.

    S th t ca Step (Step number): ngay cnh phn Symbol chnh l s th t ca Step. Nu

    mc nh, s th t ca Step c t ng tng ln so vi Step trc . Ngi lp trnh c th

    ty chn chnh sa s th t ca Step, vi s th t mi khng c trng s vi cc Step

    trc (khng k Step trc trong cng mt Block hay Block khc). Cc Step c s th

    t t 0 ti 9 c gi l cc Step khi to (Initial Step) nh ni trn.

    Step attribute: thuc tnh ca Step b n khi CPU l FX CPU. Nn khng cn quan tm ti

    Step attribute.

    Comment: b sung thm thng tin cho Step, ngoi s th t ca Step, Comment cho php

    ngi lp trnh vit thm cc thng tin khc, v c hin th ca s lp trnh nu ch hin

    th Comment c bt.

    Ch : tng s Step ti a cho mi Block khng c vt qu 512 Step. Ngoi cc Step thng

    thng v Step khi to, Dummy Step cng c s dng trong lp trnh SFC. Cc Dummy

    Step cng chnh l cc Step thng thng, nhng khng c lp trnh u ra hay ni cch

    khc l Step khng c ni vi mch in ni no.

    b) To mt Transition .

    T ca s lp trnh, nhn phm F5, trong phn Symbol ca ca s Enter SFC symbol hin ra, la

    chn thuc tnh ca Symbol l TR. (ch : trc khi nhn F5, con tr chut phi c t

    dng tip theo sau Step, nh mi tn trong hnh pha di ch ti)

  • Hng dn lp trnh SFC cho PLC h FX CPU

    12 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Hnh 10 - To mt Transition.

    Cng ging vi vic to mt Step, mt Transition cng c nh s. S th t ca cc Transition

    cng c t ng tng ln, hoc ngi lp trnh c th nh s khc cho Transition. S khc bit

    vi Step l, s th t ca Transition ch c ngha trong Block, hay ni cch khc, cc

    Transistion cc Block khc nhau c th c cng s th t.

    Vi lp trnh SFC cho FX CPU, vic b sung thm thng tin cho Transition thng qua Comment

    khng c h tr. V Comment s b n.

    c) To Selective Brach .

    T ca s lp trnh, nhn phm F6, trong phn Symbol ca ca s Enter SFC Symbol xut hin,

    la chn thuc tnh ca Symbol l --D nh hnh v.

    Hnh 11 - To Selective Branch.

    Ngay cnh phn Symbol, gi l s lng nhnh (Number of Branch). Khi s lng nhnh l 1, th

    gi nguyn gi tr mc nh l 1.Nu s lng nhnh nhiu hn 1, ngi lp trnh c th thay th

    mt gi tr khc ph hp vi s lng nhnh cn s dng. Khi gi tr ca s lng nhnh c

    nhp vo l s dng th nhnh s c to t tri sang phi, nu mt s b hn khng c nhp

    vo, th nhnh s c to t phi qua tri nh hnh v sau.

    Hnh 12 - S lng nhnh c gi tr m.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    13 ng Ngc Hnh ng Vit Ha Trn Cng nh

    d) To Parallel Branch .

    T ca s lp trnh, nhn phm F7, trong phn Symbol ca ca s Enter SFC Symbol xut hin,

    la chn thuc tnh ca Symbol l ==D nh hnh v.

    Hnh 13 - To Parallel Branch.

    Tng t vi vic to mt Selective Branch, s lng nhnh cng c th c thay i theo mong

    mun.

    e) To Selective Coupling .

    T ca s lp trnh, nhn phm F8, trong phn Symbol ca ca s Enter SFC Symbol xut hin,

    la chn thuc tnh ca Symbol l --C nh hnh v.

    Hnh 14 - To Selective Coupling.

    Vic chn s lng nhnh tng t nh trn.

    f) To Parallel Coupling .

    T ca s lp trnh, nhn phm F9, trong phn Symbol ca ca s Enter SFC Symbol xut hin,

    la chn thuc tnh ca Symbol l ==C nh hnh v.

    Hnh 15 - To Parallel Coupling.

    Vic chn s lng nhnh tng t nh trn.

    g) To Jump transition .

    T ca s lp trnh, nhn phm F8, trong phn Symbol ca ca s Enter SFC Symbol xut hin,

    la chn thuc tnh ca Symbol l JUMP nh hnh v.

    Hnh 16 - To Jump transition.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    14 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Ngay cnh phn thuc tnh ca Symbol, c gi l S th t ca Step ch (Jump destination

    step number), gi tr trong ny chnh l s th t ca Step mun nhy ti khi tha mn iu kin

    chuyn. Step ch (destination step) c th nm trong cng mt Block, hoc nm mt Block

    khc.

    phn thuc tnh ca Jump Transition, Step Attribute, la chn thuc tnh l [--], c ngha,

    Jump transition ny l mt lnh nhy thng thng.

    h) To Reset jump.

    Tng t nh i vi vic to Jump transition, vic to Reset Jump c thc hin nh vic to

    Jump transition.Nhng phn Step attribute, thuc tnh c la chn l [R]. C ngha Jump

    transition ny l mt Reset jump.

    Khi iu kin chuyn tha mn, Reset jump c thc hin. Trng thi ca Step ch c reset,

    nhng s khng nhy n Step ch m nhy v Step trc Reset jump.

    Hnh 17 - To Reset jump.

    i) Thay i chng trnh.

    Sau khi vit xong chng trnh, nu mun thay i, ngi lp trnh c th nhy p vo biu tng

    mun thay i, ca s Enter SFC symbol s xut hin, ngi lp trnh c th thay i cc thng s

    cho cc biu tng theo mun. Ngoi ra c th chm thm hay xa b cc biu tng, c minh

    ha nh cc hnh sau.

    Hnh 18 - Chm thm dng mi.

    Hnh 19 - Chm thm ct mi.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    15 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Hnh 20 - Xa mt dng.

    Hnh 21 - Xa mt ct.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    16 ng Ngc Hnh ng Vit Ha Trn Cng nh

    IV- V d minh ha.

    Phn trn trnh by cc thnh phn ca ngn ng SFC dng cho PLC h FX CPU, v cch to cc SFC

    symbol to lu SFC.Phn ny s a ra cc v d, trnh by tng bc vic vit mt chng

    trnh SFC nh th no s dng chng trnh GX Developer.Sau chy m phng cc chng trnh

    bng GX Simulator.

    1- V d 1.

    C hai cng vic c phn chia thi gian thc hin nh sau: cng vic th nht CVI c thc

    hin trong khong thi gian t1, sau khi ht thi gian t1 tm dng thc hin cng vic CVI v

    chuyn sang thc hin cng vic th hai l CVII trong khong thi gian t2. Ht thi gian t2, tm

    dng cng vic CVII v chuyn sang thc hin cng vic CVI vi thi gian t1. C th lp i lp

    li. trng thi u tin, cc cng vic u b tm dng, ch khi no nhn nt Start th mi bt u

    qu trnh.

    gii quyt bi ton trn bng PLC, trc tin ta quy nh cc u vo/ra tng ng vi cc cng

    vic c thc hin. Ta c bng vo/ra nh sau:

    Thc t PLC

    Nt Start X0

    CVI Y1

    t1 T1

    CVII Y2

    t2 T2

    Lu Grafcet c th hin nh sau:

    Hnh 22 - Lu Grafcet v d 1.

    Sau khi c lu Grafcet ca qu trnh, ta bt u vit chng trnh cho PLC thc hin cng

    vic theo yu cu bng ngn ng SFC. Cc bc thc hin nh sau:

  • Hng dn lp trnh SFC cho PLC h FX CPU

    17 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Khi ng phn mm GX Developer.

    To mt Project mi bng cch nhn biu tng New trn thanh cng c. Chn PLC series l

    FXCPU. Chn PLC type l FX3U(C). Phn Program type, chn loi chng trnh l SFC.

    Nh hnh minh ha pha di.

    Sau khi nhn OK, s xut hin danh sch Block list, vi cc Block cha c lp trnh nh

    hnh di.

    Sau khi xut hin danh sch cc Block, ta bt u vit chng trnh cho cc Block thc hin

    c cng vic theo yu cu.

    Chn Block th hai (Block No.1). Nhy p chut, ca s Block information setting xut hin.

    Ta in cc thng tin cho Block:

    + Block title: t tn cho Block l Thuc hien cong viec.

    + Block type: chn Block type l SFC.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    18 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Sau khi ci t xong thng tin cho Block, nhn Execute vo ca s vit chng trnh cho

    Block.

    Mc nh Step S0 v Transition 0 c thm vo chng trnh. Nh ni trn cc Step

    t S0 ti S9 l cc Step khi ng, nn ta s khng vit chng trnh u ra cho Step S0.

    + Chn Transition 0 (Click chut vo Transition 0) :

  • Hng dn lp trnh SFC cho PLC h FX CPU

    19 ng Ngc Hnh ng Vit Ha Trn Cng nh

    + phn bn tri, ta vit iu kin chuyn bng Ladder cho Transition 0 nh sau:

    Click chut sang phn bn phi:

    Nhn F5, sau chn u vo l X0 nh bng vo ra chn pha trn. Nhn OK.

    Sau khi nhn OK:

  • Hng dn lp trnh SFC cho PLC h FX CPU

    20 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Tip theo nhn F8. Ri nhn Enter. Ch : sau khi nhn F8, ca s Enter symbol xut hin,

    nhng khng vit g vo ca s Enter symbol, m nhn phm Enter.

    Sau khi nhn Enter:

    ( [TRAN ] chnh l chuyn tip. Khi X0 ON, th TRAN s c tch cc v trng thi

    tip theo c hot ng. Trng thi ph trc s b ngng hot ng. Khi nhn F8, chng ta

    khng phi g vo TRAN, nu TRAN c g vo ca s Enter symbol th khi nhn Enter s

    bo li).

    Sau khi vit xong u ra cho mt Step hay iu kin chuyn cho mt Transition, chng ta phi

    Convert on chng trnh Ladder va vit cho Step hoc Transition. Nu khng Convert on

    chng trnh Ladder , khi chuyn sang Transition khc hay Step khc, on chng trnh

    Ladder cho Step hoc Transition s b xa.

    Convert, ta nhn phm F4, v mu nn on chng trnh Ladder cho Step hoc Transition

    s chuyn sang mu trng thng bo c Convert nh hnh pha di.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    21 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Sau khi vit xong iu kin chuyn cho Transition 0, tip theo ta vit u ra cho Step S1.

    Vit u ra cho Step S1:

    + thm S1, Click chut vo dng tip theo sau Transition 0 (phn lu SFC bn tri).

    Thm biu tng Step, bng cch nhn phm F5 nh phn III) trnh by, v in cc thng

    s nh sau:

    Sau khi in cc thng s cho Step S10, nhn OK. Ca s lp trnh s hin ra nh sau ( Chn

    Step number l 10. Phn Comment c th c hoc khng.):

  • Hng dn lp trnh SFC cho PLC h FX CPU

    22 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Click chut chn Step S10:

    Ging nh Transition 0, ta cng vit on chng trnh u ra cho Step S10 phn bn phi

    lu SFC bng ngn ng Ladder. Sau khi vit xong, nhn F4 Conver. V c nh sau:

    Ta gi s thi gian T1 cho cng vic CVI l t1=10*(gi tr Timer 1).

    Tip theo ta vit iu kin chuyn cho Transition 1, l chuyn tip khi kt thc thi gian t1 ca

    cng vic CVI

    + Click chut vo dng tip theo sau Step S10, nhn phm F5.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    23 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Sau nhn OK.

    + Click chut chn Transition 1. Click chut sang pha bn phi lu SFC. Vit on chng

    trnh iu kin chuyn cho Transition 1 bng ngn ng Ladder.Ta c nh hnh sau:

  • Hng dn lp trnh SFC cho PLC h FX CPU

    24 ng Ngc Hnh ng Vit Ha Trn Cng nh

    u vo ca Transition 1 chnh l T1.( Ch khi vit u ra [TRAN ]: nhn F8, sau

    nhn Enter. Khng vit TRAN vo ca s Enter symbol sau khi nhn F8.)

    Nhn F4 Convert cho Transition 1:

    Tip theo to Step S11 v Transition 2 ging nh to Step S10 v Transition 1. Nhng Step

    S11, ta ly Timer 2 lm b nh thi cho cng vic CVII. Gi s t2=10*(gi tr Timer 2).

    + To Step S11:

  • Hng dn lp trnh SFC cho PLC h FX CPU

    25 ng Ngc Hnh ng Vit Ha Trn Cng nh

    + To Transition 2:

    Sau khi thc hin cng vic CVII, v ht thi gian t2, s quay tr li thc hin cng vic CVI

    trong thi gian T1. Nn tip theo ta s to Jump transition nhy v Step S10 (l trng thi

    ca cng vic CVI

    To Jump Transition:

    Click chut vao dng tip theo pha sau Transition 2, v nhn phm F5. Phn Symbol chn mi

    tn th xun chn JUMP.V in 10 (l Step S10) l gi tr ca Step ch. Nh hnh sau:

  • Hng dn lp trnh SFC cho PLC h FX CPU

    26 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Phn Step attribute gi nguyn nh mc nh. Sau khi in xong thng s, nhn OK.

    Step S10 c du chm en gia sau khi Reset jump c to vi Step ch l S10.

    Trong lu SFC vit trn ta thy, Step khi to S0 c du chm hi. l do ta khng

    vit u ra cho Step S0. V Step S0 cng chnh l mt Dummy Step nh ni phn III).

    Trong Grafcet, cho Grafcet c th hot ng c th trng thi khi to u tin phi c

    hot ng u tin. Nn mt tn hiu g c thm vo trng thi khi to cho php trng thi

    u tin hot ng.

    V trong lp trnh SFC ta cng phi lm tng t Step S0 hot ng khi bt u qu trnh.

    To tn hiu g trong lu SFC:

  • Hng dn lp trnh SFC cho PLC h FX CPU

    27 ng Ngc Hnh ng Vit Ha Trn Cng nh

    + Trong phn 4) Vng hin th cc thng tin ca Project, chn Program , nhy p vo main

    hin th danh sch Block (Block list):

    + Nhy p chut vo Block 0 (Block No.0 pha trn Block 1 l Block SFC chng ta va to. Ca

    s Block information setting xut hin, in tn cho Block trong Block title l Khoi tao.Chn

    Block type l Ladder.

    Nhn Execute vo ca s lp trnh cho Block 0.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    28 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Phn bn tri l biu tng Ladder ni phn II).Phn bn phi l ni vit on chng trnh

    Ladder khi to bng ngn ng ladder.

    on chng trnh khi to c vit nh hnh sau:

    Sau nhn F4 Convert cho on Ladder va vit.[SET S0 ] chnh l tn hiu g c thm

    vo trng thi khi to u tin trogn Grafcet.(M8002 dng SET S0, khi PLC c cp in,

    M8002 s c ON v cho php Step S0 hot ng).

    M phng: sau khi vit xong lu SFC cho cng vic cn thc hin. Tip theo chng ta s

    m phng lu SFC va c vit kim tra s hot ng ca lu .

    Tr li danh sch Block (Block list bng Program => Main).

  • Hng dn lp trnh SFC cho PLC h FX CPU

    29 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Trong danh sch Block, ta thy hai Block c to l Block 0 v Block 1. c th m phng

    c, cc Block cn phi c Convert. Trong danh sch Block, ct ngay cnh ct Block title

    chnh l trng thi ca Block c Convert hay cha. Vi mt Block c Conver th s c

    k hiu l -, vi Block cha c Convert th s c k hiu l *. ngha cc k hiu c th

    hin trong phn c khoanh vng hnh trn (pha bn phi ).

    Convert cc Block cha Convert, trn Menu Bar chn Convert => Convert Block (all block).

    Sau khi nhn Convert Blocl (all block):

  • Hng dn lp trnh SFC cho PLC h FX CPU

    30 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Cc Block u c Convert (tt cc u c k hiu -).

    + M phng SFC tng t nh i vi m phng chng trnh Ladder. Chn Start ladder logic

    test m phng lu SFC va to.

    Sau khi chn Start ladder logic test m phng lu , tr li danh sch Block, nhy p vo

    Block 1 l Block chng ta vit trc xem trng thi ca cc Step. Step S0 s c ON, v

    c mu xanh.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    31 ng Ngc Hnh ng Vit Ha Trn Cng nh

    cho php Step S10 hot ng, Click chn Transition 0, tch cc X0, cho php Transition 0

    chuyn Step.

    M phng chng trnh SFC tng t nh m phng mt chng trnh Ladder. Nhn FORCE ON

    tch cc X0, cho phep Transition 0 chuyn sang Step S10. Sau nhn FORCE OFF, a

    X0 v trng thi trc ( khng c tch cc). Sau Step S10 s c mu xanh, c ngha l

    Step S10 ang hot ng. Step S0 s mt mu xah, c ngha l Step S0 b ngng hot ng.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    32 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Khi Click vo Step S10 s thy u ra Y1 c ON, v Timer 1 tnh thi gian:

    Khi Timer 1 m ht thi gian t1, Transition 1 tha mn.

    Transition 1 tha mn, Step S10 s b ngng hot ng, v Step S11 c hot ng.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    33 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Tng t, sau khi Timer 2 m ht thi gian t2, Transition 2 tha mn, Jump Transition s nhy v

    Step S10.

    kt thc m phng, chn Tools => End ladder logic test

  • Hng dn lp trnh SFC cho PLC h FX CPU

    34 ng Ngc Hnh ng Vit Ha Trn Cng nh

    2- V d 2.

    Cho s chuyn ng:

    a1

    a0

    b0 b1

    S1=T

    S1=X S1=L

    S1=P

    H thng gm 2 c cu chuyn ng ln xung v phi tri cng vi cc cm bin v tr (a0, a1,

    b0 v b1). u tin c cu ln xung thc hin chuyn ng xung (trong mi thi im ch c 1

    c cu hot ng, tc l hin ti c cu phi tri ang ng yn). Khi gp cm bin a1 th s thc

    hin chuyn ng ln. Khi gp cm bin a0 th c cu ln xung dng li v c cu phi tri

    mang theo c c cu ln xung chuyn ng sang phi. Khi gp cm bin b1 th c cu phi tri

    dng li v c cu ln xung thc hin chuyn ng xung, n khi gp cm bin a1 th n chuyn

    ng ln. Khi gp cm bin a0 th c cu ln xung dng li, c cu phi tri thc hin chuyn

    ng sang tri. Khi gp b0 th c cu phi tri dng li v c cu ln xung thc hin chuyn

    ng xung. H thng li bt u mt chu k mi.

    Sau y chng ta s gii quyt bi ton bng PLC s dng ngn ng SFC.

    Thnh lp s Graphcet:

    S0 .

    S4S3

    S2

    S1 S1=X

    S1=L

    S1=P S1=T

    a0.b0

    a1

    a0.b0

    b1

    a0.b1

    b0

    K hiu u vo ra:

    Thc t PLC

    Cm bin a0 X0

  • Hng dn lp trnh SFC cho PLC h FX CPU

    35 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Cm bin a1 X1

    Cm bin b0 X2

    Cm bin b1 X3

    START X4

    i Xung (X) Y0

    i Ln (L) Y1

    Sang Phi (P) Y2

    Sang Tri (T) Y3

    To mt block : Vi Du 2.

    V s SFC da vo lu Graphcet:

  • Hng dn lp trnh SFC cho PLC h FX CPU

    36 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Ch thch (Comment) cho cc u vo ra:

    Vit chng cho cc chuyn tip v cc step:

    Chuyn tip (Transition) 0:

    Step 10 (i xung):

    Chuyn tip 1:

    Step 11(i ln):

  • Hng dn lp trnh SFC cho PLC h FX CPU

    37 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Chuyn tip 2:

    Step 13(Sang phi):

    Chuyn tip 4:

    Chuyn tip 3:

    Step 12 (Sang tri):

  • Hng dn lp trnh SFC cho PLC h FX CPU

    38 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Chuyn tip 5:

    To mt xung khi to cho trng thi ban u S0:

    Sau khi hon tt chn Convert/Compile all program trnh bin dch lin kt tt c cc

    khi va to.

    Tip theo chng ta tin hnh m phng hot ng ca chng trnh.Chn (Start or end ladder

    logic test ) .

    Sau khi chn (Start or end ladder logic test ) =>Program=> main=> block quan st trng

    thi ca cc Step.

    u tin kch hot xung khi to S0: X004(START) = ON.

    Vo Block title START kch chut vo X004 => chut phi =>Device test.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    39 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Trong ca s Device test =>FORCE ON (X004 ON) =>FORCE OFF (X004 OFF). Nt nhn

    X004 (to xung khi ng S0) c nhn=>S0 ON

    Vo Block c tn Vi Du 2 quan st trng thi ca cc Step.

    Kch hot cc chuyn tip quan st s chuyn trng thi ca cc Step:

    Kch chut vo chuyn tip (transiton) 0.=>chut phi=>Device test. Trong ca s Device test

    ON (FORCE ON), OFF (FORCE OFF) cc u vo X000 (cm bin a0), X002 (cm bin b0) v

    quan st s chuyn trng thi.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    40 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Tng t cho cc chuyn tip(transition) cn li.

    kt thc m phng chn Tools => End ladder logic test.

  • Hng dn lp trnh SFC cho PLC h FX CPU

    41 ng Ngc Hnh ng Vit Ha Trn Cng nh

    Ti liu tham kho.

    1. MITSUBISHI PLC. SFC-GX Developer Operation Manual.

    2. MITSUBISHI PLC. MELSEC FX series Programmable Controller Programming Manual (Basic

    & applied Instructions Editor).

    3. Thy Dng Minh c Vin in, H Bch Khoa H Ni. Ti liu v iu khin Logic v k

    thut lp trnh PLC.

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