Giao Trinh Vdk AVR Doc

GIO TRNH VI IU KHIN AVR

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Mc Lc BI 1 : GII THIU V VI IU KHIN AVR.................................................. 5 1. Gii thiu v vi iu khin ............................................................................. 5 2. Gii thiu v vi iu khin AVR ................................................................... 7 3. Lp trnh cho AVR....................................................................................... 10 BI 2 : GIAO TIP VO RA I/O ........................................................................ 17 1. Gii thiu giao tip vo ra I/O ..................................................................... 17 2. Cch cu hnh chc nng IO ........................................................................ 18 3. V d minh ha ............................................................................................. 19 BI 3 : GIAO TIP VI LED 7 THANH............................................................ 24 1. C bn v led 7 thanh................................................................................... 24 2. Nguyn l lp trnh cho led 7 thanh.............................................................. 26 3. V d minh ha ............................................................................................. 27 BI 4 : GIAO TIP VI BN PHM .................................................................. 31 1. C bn v phm bm .................................................................................... 31 2. Chng trnh v d ....................................................................................... 32 3. K thut chng rung bn phm...................................................................... 34 BI 5 : B CHUYN I ADC.......................................................................... 36 1. Gii thiu v ADC ....................................................................................... 36 2. Cch cu hnh ADC trong Code Vision cho Atmega32. ............................. 38 3. V d minh ha ............................................................................................. 39 BI 6 : GIAO TIP LCD...................................................................................... 41 1. Gii thiu v LCD 16x2............................................................................... 41 2. Cch cu hnh cho LCD trong Code Vision cho Atmega32........................ 47 3. V d.......................................................................................................... 49 BI 7 : GIAO TIP VI LED MA TRN........................................................... 51 1. C bn v led ma trn................................................................................... 51 2. To font cho led ma trn .............................................................................. 53GIO TRNH VI IU KHIN AVR

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3. V d minh ha. ............................................................................................ 54 BI 8: GIAO TIP MY TNH ........................................................................... 55 1. C bn v giao tip RS232........................................................................... 55 2. Cch cu hnh module UART trong Code Vision ....................................... 57 3. V d. ............................................................................................................ 58 BI 9 : GIAO TIP I2C......................................................................................... 66 1. Gii thiu chung v I2C ............................................................................... 66 2. Module I2C trong Atmega32 ........................................................................ 74 3. V d ............................................................................................................. 76 BI 10 : NG C BC.................................................................................. 80 1. C bn v ng c bc............................................................................... 80 2. Cc mch iu khin ng c bc ............................................................. 82 3. V d ............................................................................................................. 85 BI 11 : GIAO TIP VI CNG LPT ................................................................ 87 1. C bn v cng LPT..................................................................................... 87 2. V d minh ha ............................................................................................. 90 BI 12 : GIAO TIP VI MA TRN PHM ...................................................... 92 1. C bn v ma trn phm ............................................................................... 92 2. V d minh ha ............................................................................................. 94 BI 13 : TIMER .................................................................................................... 96 1. Gii thiu v timer ....................................................................................... 96 2. V d minh ha ........................................................................................... 100 BI 14 : NGT ................................................................................................... 101 1. Gii thiu v ngt ....................................................................................... 101 2. Cc bc cu hnh cho ngt hot ng ...................................................... 104 3. V d........................................................................................................ 105 BI 15 : IU KHIN NG C MT CHIU............................................. 107 1. Gii thiu v ng c mt chiu ................................................................ 107


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2. V d minh ha ........................................................................................... 109 BI 16 : GIAO TIP VI GLCD....................................................................... 111 1. C bn v GLCD........................................................................................ 111 2. V d minh ha ........................................................................................... 116


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BI 1 : GII THIU V VI IU KHIN AVR - Gii thiu chung v vi iu khin. - Gii thiu v vi iu khin Atmega32. - Lp trnh cho Atmega32.

1. Gii thiu v vi iu khin Khi nim vi iu khin (microcontroller MC) kh quen thuc vi cc sinh vin CNTT, in t, iu khin t ng cng nh C in t N l mt trong nhng IC thch hp nht thay th cc IC s trong vic thit k mch logic. Ngy nay c nhng MC tch hp tt c cc chc nng ca mch logic. Ni nh vy khng c ngha l cc IC s cng nh cc IC mch s lp trnh c khc nh PLC khng cn dng na. MC cng c nhng hn ch m r rng nht l tc chm hn cc mch logic MC cng l mt my tnh my tnh nhng v n c y chc nng ca mt my tnh. C CPU, b nh chng trnh, b nh d liu, c I/O v cc bus trao i d liu. Cn phn bit khi nim MC vi khi nim vi x l (microprocessor MP) nh 8088 chng hn. MP ch l CPU m khng c cc thnh phn khc nh b nh I/O, b nh. Mun s dng MP cn thm cc chc nng ny, lc ny ngi ta gi n l h vi x l (microprocessor system). Do c im ny nn nu la chn gia MC v MP trong mt mch in t no th tt nhin ngi ta s chn MC v n s r tin hn nhiu do tch hp cc chc nng khc vo trong chip. Vy mt vi iu khin chy c th cn nhng iu kin g :


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- Th nht l ngun cp, ngun cp l ci u tin, c bn nht trong cc mch in t, v vn v ngun l 1 trong nhng vn rt au u. Khng c ngun th khng th gi l 1 mch in c. Ngun cp cho vi iu khin l ngun 1 chiu. - Th hai l mch dao ng, mch dao ng lm g ? Gi s cc bn lp trnh cho con AVR : n thi im A lm 1 cng vic g , th th n ly ci g xc nh c thi im no l thi im A ? chnh l mch dao ng. V d nh mi ngi u thng nht vo mt gi chun lm vic. C h thng vi iu khin cng vy, c h thng khi u ly xung nhp clock xung nhp mch dao ng lm xung nhp chun hot ng. - Th ba l ngoi vi, ngoi vi y l cc thit b giao tip vi vi iu khin thc hin 1 nhim v no m vi iu khin a ra. V d nh cc bn mun iu khin ng c 1 chiu, nhng v vi iu khin ch a ra cc mc in p 0-5V, v dng iu khin c my chc mA, vi ngun cp ny th ko th ni trc tip ng c vo vi iu khin iu khin, m phi qua 1 thit b khc gi l ngoi vi, chnh xc hn y l driver, ngi ta dng driver c th iu khin c cc dng in ln t cc ngun in nh. Cc bn phm, cng tc l cc ngoi vi. - Th 4 l chng trnh, y l file .hex np cho vi iu khin, chng trnh chnh l thut ton m bn trin khai thnh cc cu lnh ri bin dch thnh m hex np vo vi iu khin. Cc cng c hc AVR : - Ngn ng lp trnh : C, ASM - Phn mm lp trnh : IAR, CodeVisionAVR - Mch np : STK200/300/500, Burn-E - Mch pht trin : Board trng, phn mm m phng, kit


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2. Gii thiu v vi iu khin AVR AVR l h vi iu khin 8 bit theo cng ngh mi, vi nhng tnh nng rt mnh c tch hp trong chip ca hng Atmel theo cng ngh RISC, n mnh ngang hng vi cc h vi iu khin 8 bit khc nh PIC, PSoC. Do ra i mun hn nn h vi iu khin AVR c nhiu tnh nng mi p ng ti a nhu cu ca ngi s dng, so vi h 8051, 89xx s c n nh, kh nng tch hp, s mm do trong vic lp trnh v rt tin li. Cc tnh nng mi ca h AVR: Giao din SPI ng b. Cc ng dn vo/ra (I/O) lp trnh c. Giao tip I2C. B bin i ADC 10 bit. Cc knh bm xung PWM. Cc ch tit kim nng lng nh sleep, stand by..vv. Mt b nh thi Watchdog. 3 b Timer/Counter 8 bit. 1 b Timer/Counter 16 bit. 1 b so snh analog. B nh EEPROM. Giao tip USART..vv. Atmelga32 c y tnh nng ca h AVR, v gi thnh so vi cc loi khc th gi thnh l va phi khi nghin cu v lm cc cng vic ng dng ti vi iu khin. Tnh nng : B nh 32KB Flash c kh nng c, ghi 10000 ln 1024 byte EEPROM c kh nng c, ghi 100000 ln. 2KB SRAM. 8 knh u vo ADC 10 bit. ng v 40 chn , trong c 32 chn vo ra d liu chia lm 4 PORT A,B,C,D. Cc chn ny u c ch pull_up resistors.


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H tr cc giao tip UART, SPI, I2C. 1 b so snh analog, 4 knh PWM. 2 b timer/counter 8 bit, 1 b timer/counter1 16 bit. 1 b nh thi Watchdog.

S chn Atmega32 M t chc nng cc chn ca atmega32 - Vcc v GND 2 chn cp ngun cho vi iu khin hot ng. - Reset y l chn reset cng khi ng li mi hot ng ca h thng. - 2 chn XTAL1, XTAL2 cc chn to b dao ng ngoi cho vi iu khin, cc chn ny c ni vi thch anh (hay s dng loi 4M), t gm (22p). - Chn Vref thng ni ln 5v(Vcc), nhng khi s dng b ADC th chn ny c s dng lm in th so snh, khi chn ny phi cp cho n in p c nh, c th s dng diode zener:


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- Chn Avcc thng c ni ln Vcc nhng khi s dng b ADC th chn ny c ni qua 1 cun cm ln Vcc vi mc ch n nh in p cho b bin i.


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3. Lp trnh cho AVR Gii thiu lp trnh cho AVR, chng ta c th s dng 2 ngn ng c bn l C v ASM. Nhn chung, 2 ngn ng ny c nhng u v nhc im ring. Ngn ng ASM c u im l gn nh, gip ngi lp trnh nm bt su hn v phn cng. Tuy nhin li c nhc im l phc tp, kh trin khai v mt thut ton, khng thun tin xy dng cc chng trnh ln. Ngc li ngn ng C li d dung, tin li, d debug, thun tin xy dng cc chng trnh ln. Nhng nhc im ca ngn ng C l kh gip ngi lp trnh hiu bit su v phn cng, cc thanh ghi, tp lnh ca vi iu khin, hn na, xt v tc , chng trnh vit bng ngn ng C chy chm hn chng trnh vit bng ngn ng ASM. Ty vo tng bi ton, tng yu cu c th m ta chn la ngn ng lp trnh cho ph hp. C rt nhiu phn mm lp trnh cho AVR, nh Code Vision, IAR, AVRStudio, trong Code Vision l mt trong nhng phn mm kh ni ting v ph bin. Trong khun kh gio trnh ny, chng ta s s dng phn mm Code Vision lp trnh cho AVR.


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Giao din phn mm Code Vision To project trong Code Vision : to Project mi chn trn menu: File -> New c nh sau:


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Chn Project sau click chut vo OK c ca s hi xem c s dng Code Winzard khng:

Chn Yes c ca s CodeWinzardAVR nh sau :


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- S dng chp AVR no v thch anh tn s bao nhiu ta nhp vo tab Chip. khi to cho cc cng IO ta chuyn qua tab Ports. - Cc chn IO ca AVR mc nh trng thi IN, mun chuyn thnh trng thi OUT c th a cc mc logic ra ta click chut vo cc nt IN (mu trng) n chuyn thnh OUT trong cc Tab Port. Sau chn File -> Generate, Save and Exit.


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Sau ta save project li :


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Ta c nh sau :


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Nh vy l chng ta to xong project trong Code Vision.


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BI 2 : GIAO TIP VO RA I/O

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C bn v giao tip vo ra I/O Cc cng trong atmega32 v c bn v chc nng ca cc cng Cch cu hnh vo ra I/O Vit chng trnh nhy led

1. Gii thiu giao tip vo ra I/O Lp trnh I/O l lp trnh n gin v c bn nht, nhng li c s dng nhiu nht, chng ta iu khin on/off bng n, ng c, hay 1 thit b no cng l 1 dng ca iu khin I/O. gim bt s chn ra, mt s chn ca AVR l cc chn a chc nng, n phc v cho cc thit b ngoi vi. y khi nim thit b ngoi vi khng c ngha l 1 chip khc mua ri bn ngoi m l cc m un c tch hp sn trong chip nh cc m un ADC.... Khi cc thit b ngoi vi ny c enable th cc chn ny khng c s dng nh cc chn ca cc cng I/O thng thng na.


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2. Cch cu hnh chc nng IO Atmega32 c 4 cng vo ra l PORTA, PORTB, PORTC, PORTD. Khi xem xt n cc cng I/O ca AVR th ta phi xt ti 3 thanh ghi DDxn,PORTxn,PINxn. - Cc bit DDxn truy cp cho a ch xut nhp DDRx. Bit DDxn trong thanh ghi DDRx dng iu khin hng d liu ca cc chn ca cng ny.Khi ghi gi tr logic 0 vo bt k bit no ca thanh ghi ny th n s tr thnh li vo,cn ghi 1 vo bit th n tr thnh li ra. - Cc bit PORTxn truy cp ti a ch xut nhp PORTx. Khi PORTx c ghi gi tr 1 khi cc chn c cu to nh cng ra th in tr ko l ch ng(c ni vi cng). Ngt in tr ko ra, PORTx c ghi gi tr 0 hoc cc chn c dng nh cng ra.Cc chn ca cng l 3 trng thi khi 1 iu kin reset l tch cc thm ch xung ng h khng hot ng. - Cc bit PINxn truy cp ti a ch xut nhp PINx. PINx l cc cng ch c,cc cng ny c th c trng thi logic ca PORTx.PINx khng phi l thanh ghi,vic c PINx cho php ta c gi tr logic trn cc chn ca PORTx.ch PINx khng phi l thanh ghi,vic c PINx cho php ta c gi tr logic trn cc chn ca PORTx. - Nu PORTxn c ghi gi tr logic 1 khi cc chn ca cng c dng nh chn ra ,cc chn c gi tr 1.Nu PORTxn ghi gi tr 0 khi cc chn ca cng c dng nh chn ra th cc chn c gi tr 0. - Cc cng ca AVR u c th c, ghi. thit lp 1 cng l cng vo, ra th ta tc ng ti cc bit DDxn, PORTxn, PINxn. Ta c th thit lp tng bit lm cng vo, ra c khng ch vi cng, nh vy ta c th x l ti tng bit, y chnh l im mnh ca cc dng Vi iu khin 8 bit.


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3. V d minh ha Chng trnh sau s lm nhp nhy c 8 led, led ni vo port A.

Phn tch Chng trnh trn rt n gin, s thut ton ca chng trnh trn nh sau :


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Sau khi vit xong chng trnh, chng ta nhn Shift+F9 bin dch. Nu chng trnh khng c li v bin dch thnh cng, s c thng bo nh sau :


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np chng trnh cc bn cn cu hnh cho mch np. Vo menu: Settings -> Programmer c ca s nh sau : Mch np ta dng STK 200 do cc bn chn Kanda Systems STK200+/300. Nhp OK. Sau cc bn chn trn menu : Projects -> Configure c ca s nh sau:


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Sau bn chn Too/ Chip Programmer np cho AVR :

Chng ta c ca s nh sau :


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Cc bn cu hnh cc thng s cn thit, nh chn thch anh ni hay ngoi, cu hnh cc fuse bit ri nhn vo Program All np chng trnh.


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BI 3 : GIAO TIP VI LED 7 THANH

- C bn v led 7 thanh - Nguyn l lp trnh led 7 thanh. - V d minh ha

1. C bn v led 7 thanh bi hc ny, chng ta s hc v giao tip gia AVR v led 7 thanh ,cc hin th s trn led 7 thanh , cng nh cc gii thut v qut led. Led 7 thanh l linh kin in t dng hin th s. u im ca led 7 thanh l gi thnh r, khong cch quan st xa v d dng trong lp trnh. Nhc im l led 7 thanh ch hin th c 1 s k t nht nh. Led 7 thanh c 2 loi l anot chung v catot chung. C hnh dng thc t v hnh dng nguyn l nh hnh sau :


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7

6

4

2

1

10 9

5 D13A Anot chung

A 7

B 6

C 4

D 2

E 1

F

G DP 10 9 5

D12A Catot chung

8 3 8 3


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2. Nguyn l lp trnh cho led 7 thanh

S ghp ni vi vi iu khin Led 7 thanh bao gm 7 thanh a,b,c,d,e,f,g v 1 thanh dp, mi thanh l mt led. Ty vo cch ni chung anot hay catot gia cc thanh m ta c 2 loi anot chung hoc catot chung. Nh hnh v trn, led 7 thanh c dng anot chung, mun thanh no sng, chng ta ch vic cp in p dng vo chn tng ng, khi led tng ng vi thanh s c phn cc thun v pht sng. V d nh hnh v trn, sng thnh hnh s 5, ta cn cc thanh a,f,g,c,d sng, khi ta cn cp mc logic 1 (tng ng vi in p 5V) vo cc chn tng ng, v kt qu l ta c 1 chui s nh phn 10110110, hay dng m hex : 0xB6. Bng cch tng t, ta cng to c gi tr (m) xut ra port ca vi iu khin led sng cc s t 0 n 9. Ngi ta thng to ra 1 bng m nh vy nh vy tin s dng.


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3. V d minh ha v d sau, chng ta s hin th ln lt cc s t 0 n 9 ln led 7 thanh. S mch :

Bng m ha cc ch s


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Chng trnh

Trong chng trnh trn, cc cu lnh cu hnh tng t nh phn trc, chng ta ch phn tch v thut ton. Bin font[] l mt mng s kiu char, dng lu tr cc m ca cc s tng ng, v d s 0 s c m l phn t u tin ca mng : font[0] hay 0xC0, tng t, s 1 s c m l font[1] hay 0xF9


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Ln lt chng ta xut tng phn t ca mng font[] ra cng ni vo led (port B), khi chy chng trnh, chng ta s thy led sng t 0 n 9. Cch giao tip vi nhiu led Chng ta c th s dng nhiu port giao tip vi nhiu led 7 thanh, mi led ni vi 1 port khc nhau, tuy nhin, vi iu khin, v d nh dng 16F887 ch c 4 port 8 bit, nu lm nh vy, chng ta ch c th giao tip vi nhiu nht l 4 led 7 thanh. gii quyt vn trn, ngi ta s dng 1 phng php l qut led, ti mt thi im ch c mt led sng, mi led s sng trong mt khong thi gian nht nh, sau led tt v led k tip li sng. Lm nh vy, vi khong thi gian sng/tt rt nhanh, mt chng ta khng th phn bit c s ri rc v kt qu l chng ta s thy led sng lin tc. Vi phng php qut led, ngi ta chia ra lm 2 ng : ng iu khin v ng d liu, ng d liu c ni vo cc thanh a, b,c,d,e,f,g, ng iu khin dng bt/tt cc led.

V d nh hnh v trn, chng ta ch cn dng 2 port iu khin 4 led, port d liu l port 2 v port iu khin l port 1.


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Bi tp - Vit chng trnh hin th s 1234 led 4 led 7 thanh theo nh gi trn. - Vit chng trnh m trong 1 khong bt k nh hn 9999, v d t 1000 n 65535. S m c hin th ln 4 led 7 thanh.


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BI 4 : GIAO TIP VI BN PHM - C bn v phm bm. - Chng trnh v d giao tip vi phm bm

1. C bn v phm bm Bn phm c s dng trong rt nhiu cc thit b, gip ngi s dng la chn cc chc nng ca thit b. C th ni giao tip bn phm l mt ng dng kh quan trng. Phm bm thng dng nht c cu to gm 2 u tip xc, mi khi chng ta bm phm, 2 u ny s chm vo nhau (xem hnh v s nguyn l bn di). Ngoi ra cn nhiu loi phm bm khc, v cu to cng khc, c th l phm bm thng ng, khi ta bm phm th 2 u tip xc khng thng nhau. Hoc cng c loi phm bm cm ng, da trn s thay i in tr ca mng in tr, hoc da trn s thay i in dung hay in cm mi khi c tay ngi chm vo.


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2. Chng trnh v d v d ny ,chng ta s lp trnh dng bn phm iu khin cc con led bt tt theo mun. S nguyn l

C 8 phm bm, c ni vi port D, cc led n c ni vo port. Chng ta s lp trnh xem trng thi ca port D (trng thi ca cc phm bm) bng cch quan st trng thi ca led.


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Chng trnh :

Phn tch chng trnh : Chng trnh trn rt n gin, chng ta set port B l port ra, port D l port vo, sau chng ta lin tc ly gi tr ca port D gn cho gi tr ca port B thng qua cu lnh : PORTB = PIND;


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3. K thut chng rung bn phm V sao phi chng rung : Bn phm ca chng ta l bn phm c hc, b mt tip xc ca c cu bn trong phm khng phi l phng l tng, do vy, mi khi bm phm hay nh phm, xung vo vi iu khin s khng phi l 1 xung thng ng, m l rt nhiu xung kim. V thi gian qut ca vi iu khin rt nhanh, nn tt c cc gi tr ti thi im rung u c ghi li. Chng ta phi tm cch sao cho vi iu khin khng ly gi tr ti thi im rung.

S xung khi bm phm Thi im 2 v 4 (xung mu ) trong hnh trn l thi im m khi ta bt u nhn phm v khi bt u nh phm, thi im 1 v 5 l thi im phm trng thi n nh khi c nh hon ton, thi im 3 l thi im phm trng thi n nh khi ang c nhn. C 2 phng php chng rung l chng rung bng phn cng v chng rung bng phn mm. Chng rung bng phn cng Chng ta mc thm t ni song song vi phm bm, thng l t 104, t ny c tc xng hp th cc xung nhn i vo chn vi iu khin, nh vy s trit tiu hon ton cc xung kim.


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Chng rung bng phn mm Mi khi pht hin c tn hiu bm phm, chng ta cho vi iu khin khng c lin tc gi tr ca phm na bng cch cho delay mt khong thi gian, khong trn 10ms, sau khong thi gian , chng ta li c phm nh bnh thng. V d code nh sau : If(pht hi n b m phm){ Delay_ms(10); Ti p t c lm cc cng vi c khc } Bi tp - Vit chng trnh giao tip vi phm bm v led 7 thanh, mi khi bm phm, s trn led li tng ln 1 n v. Khi s tng n 9 m bm tip th s tr v 0.


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BI 5 : B CHUYN I ADC - Gii thiu v ADC. - Cch cu hnh s dng module ADC trong Code Vision cho Atmega32 - V d

1. Gii thiu v ADC Chng ta bit rng cc tn hiu th gii xung quanh chng ta ton l cc tn hiu tng t : dng in 220VAC, dng in 5V, sc gi, tc ng c, tuy nhin vi iu khin ch x l c cc tn hiu s : 10101, nh vy, cn phi c 1 thit b no chuyn i qua li gia 2 loi tn hiu ny, l l do v sao chng ta c cc b ADC v DAC. ADC l 1 thit b dng chuyn i tn hiu tng t thnh tn hiu s. Cn DAC th ngc li, chuyn tn hiu s thnh tn hiu tng t. Atmega32 c 8 chn ca PORTA s dng lm 8 knh u vo ADC. s dng tnh nng ADC ca Atmega32 chng ta cn phi thit k phn cng ca Vi iu khin nh sau : - Chn AVCC chn ny bnh thng khi thit k mch chng ta a ln Vcc(5V) nhng khi trong mch c s dng cc knh ADC ca phn cng th chng ta phi ni chn ny ln Vcc qua 1 cun cm nhm mc ch cp ngun n nh cho cc knh (u vo) ca b bin i. - Chn AREF chn ny cn cp 1 gi tr in p n nh c s dng lm in p tham chiu, chnh v vy in p cp vo chn ny cn n nh v khi n thay i lm gi tr ADC cc knh thu c b tri (thay i ) khng n nh vi 1 gi tr u vo chng ta c cng thc tnh nh sau: ADCx=(V_INT*1024)/ AREF Chng ta thy gi tr ADCx t l thun vi in p vo V_INT. Gi tr ADC thu c t cc knh c lu vo 2 thanh ghi ADCH v ADCL khi s dng chng ta phi c gi tr t cc thanh ghi ny, khi s dng ch 8 bt th ch lu vo thanh ghi ADCL.GIO TRNH VI IU KHIN AVR

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Cc thanh ghi lin quan ADMUX (ADC Mutiplexer Selection Register) : L thanh ghi iu khin vic chn in p tham chiu, knh v ch hot ng ca ADC.

ADCSRA (ADC Control and Status Register A) : L thanh ghi iu khin hot ng v cha trng thi ca module ADC.

ADCL v ADCH (ADC Data Register) : L 2 thanh ghi cha gi tr ca ADC sau qu trnh chuyn i. C th v ngha ca cc bit trong cc thanh ghi ny, cc bn c th tham kho trong datasheet ca Atmega32.


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2. Cch cu hnh ADC trong Code Vision cho Atmega32. Sau y l cc bc cu hnh module ADC hot ng : - Chn in p tham chiu, knh c ADC (ADMUX) - Cho php module ADC hot ng (ADCSRA) - Cho php qu trnh chuyn i din ra v c gi tr sau khi chuyn i.


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3. V d minh ha Trong v d sau, chng ta s c gi tr ca ADC c ni vo chn A0, gi tr ADC sau khi chuyn i c xut ra port B v D Chng trnh


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Bi tp Bn hy phn tch chng trnh trn v ch ra cc ch hot ng ca module ADC c cu hnh nh trn.


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BI 6 : GIAO TIP LCD

- Gii thiu v LCD - Cch cu hnh cho LCD trong Code Vision cho Atmega32 - V d minh ha

1. Gii thiu v LCD 16x2 Ging nh led 7 thanh, LCD l mt thit b ngoi vi dng giao tip vi ngi dng, so vi led 7 thanh th LCD c u im l hin th c tt c cc k t trong bng m ascci, trong khi led 7 thanh ch hin th c mt s k t, nhng LCD li c nhc im l gi thnh cao v khong cch nhn gn. LCD l t vit tt ca Liquid Crystal Display (mn hnh tinh th lng). C nhiu loi mn hnh LCD vi cc kch c khc nhau, v d nh LCD 16x1 (16 ct v 1 hng), LCD 16x2 (16 ct v 2 hng), LCD 20x2 (20 ct v 2 hng) Trong bi hc ny, ta xt loi LCD 16x2 bn ph bin trn th trng.

S nguyn l ca LCD 16x2 Hnh dng thc ca 1 LCD 16x2 (16 hng, 2 ct).


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Chc nng ca cc chn LCD :

Cc chn Vcc, Vss v Vee Chn Vcc cp dng ngun 5V, chn Vss ni t, chn Vee c dng iu khin tng phn ca mn hnh LCD.


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RS ( Register select) Khi mc thp, ch th c truyn n LCD nh xo mn hnh ,v tr con tr .Khi mc cao, k t c truyn n LCD R/W (Read/Write) Dng xc nh hng ca d liu c truyn gia LCD v vi iu khin. Khi n mc thp d liu c ghi n LCD v khi mc cao, d liu c c t LCD. Nu chng ta ch cn ghi d liu ln LCD th chng ta c th ni chn ny xung GND tit kim chn E (Enable) Cho php ta truy cp/xut n LCD thng qua chn RS v R/W.Khi chn E mc cao (1) LCD s kim tra trng thi ca 2 chn RS v R/W v p ng cho ph hp. Khi d liu c cp n chn d liu th mt xung mc cao xung thp phi c p n chn ny LCD cht d liu trn cc chn d liu. Xung ny phi rng ti thiu l 450ns. Cn khi chn E mc thp (0), LCD s b v hiu ho hoc b qua tn hiu ca 2 chn RS v R/W. Cc chn D0 - D7 y l 8 chn d liu 8 bt, c dng gi thng tin ln LCD hoc c ni dung ca cc thanh ghi trong LCD. Cc k t c truyn theo m tng ng trong bng m ascii. Cng c cc m lnh m c th c gi n LCD xo mn hnh hoc a con tr v u dng hoc nhp nhy con tr. LCD c 2 ch giao tip, ch 4 bit (ch dng 4 chn D4 n D7 truyn d liu) v ch 8 bit (dng c 8 chn d liu t D0 n D7), ch 4 bit, khi truyn 1 byte, chng ta s truyn na cao ca byte trc, sau mi truyn na thp ca byte. Trc khi truyn cc k t ra mn hnh LCD ta cn thit lp cho LCD nh chn ch 4 bit hoc 8 bit, 1 dng hay 2 dng ,bt/tt con tr Di y l bng tp lnh ca LCD :


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c thanh ghi lnh,ta phi t RS=0 v R/W =1 v xung cao xung thp cho bt E. Sau khi c thanh ghi lnh,nu bit D7(c bn ) mc cao th LCD bn, khng c thng tin hay lnh no c xut n n. Khi D7=0 mi c th gi lnh hay d liu n LCD. Chng ta nn kim tra bit c bn trc khi ghi thng tin ln LCD. Bng d liu ca LCD C th di chuyn con tr n v tr bt k trn mn hnh LCD bng cch np vo cc gi tr tng ng nh bng sau v gi yu cu n LCD:


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Nh vy,0x80 n 0x8F cho dng lnh 1. 0xC0 n 0xCF cho dng lnh 2

Phn khe thi gian ca LCD :

S kt ni vi vi iu khin :


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2. Cch cu hnh cho LCD trong Code Vision cho Atmega32 Code Vision h tr chng ta th vin giao tip vi LCD qua ch 4 bit thng qua file lcd.h. Sau y l cc hm thng dng : void lcd_write_byte(unsigned char addr, unsigned char data); Hm ny gi 1 byte ti LCD void lcd_gotoxy(unsigned char x, unsigned char y); Hm ny t gi tr con tr ca LCD ti v tr x,y void lcd_clear(void); Hm ny dng xa mn hnh hin th ca LCD void lcd_putchar(char c); Hm ny dng hin th 1 k t ln LCD void lcd_puts(char *str); Hm ny dng hin th 1 chui k t (cha trong RAM) ln LCD void lcd_putsf(char flash *str); Hm ny dng hin th 1 chui k t (cha trong Flash) ln LCD unsigned char lcd_init(unsigned char lcd_columns); Hm ny dng khi to LCD S kt ni gia LCD vi 1 port ca vi iu khin c mc nh trong th vin nh sau :


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Cc bc cu hnh cho LCD : Bc 1 : nh ngha cc chn cho LCD Bc 2 : Khi to LCD : lcd_init(); Bc 3 : Vit lnh cn thit : lcd_puts(), lcd_gotoxy(x,y),


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3. V d Trong v d sau, chng ta s hin th dng ch LOP HOC VKD AVR ln LCD, LCD ni vo port B, s kt ni ch ra nh trn. Chng trnh :

Bi tp Cc hm c sn trong th vin ch h tr chng ta hin th k t ln LCD, by gi bn hy lp trnh mt hm sao cho c th hin th s thc, s nguyn ln LCD, i s truyn vo l s cn hin th. Gi : Cc k t hin th ln LCD tun theo chun trong bng m ASCII, mun hin th k t no, chng ta c th truyn lun k t vo hm lcd_putc() hoc c th cho i s truyn vo l v tr ca k t trong bng m ASCII. V d s 1 c v tr l 49 trong bng m ASCII, nh vy mun hin th s 1 ln LCD, chng ta dng th c 2 cch sau : lcd_putchar (1); Hoc lcd_putchar (49); Hay :GIO TRNH VI IU KHIN AVR

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lcd_putchar (48 + 1);


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BI 7 : GIAO TIP VI LED MA TRN

- C bn v led ma trn - Cch to font cho led ma trn - V d minh ha

1. C bn v led ma trn Led ma trn l mt lot cc led n c sp xp thnh cc hng v cc ct dng ma trn, cc led c cng hng th s chung 1 chn, chn cn li ni chung vi cc led nm cng ct. Ma trn led c ng dng rt nhiu trong thc t, in hnh l cc bng quang bo.

iu khin led ma trn sng theo mun, chng ta s dng phng php qut led, li dng tnh nng lu nh mt ngi, trong cc bin qung co, chng ta nhn thy led sng lin tc, thc ra khng phi vy, m l led nhp nhy lin tc, nhng do tc cao nn mt ngi khng kp phn bit v kt qu l chng ta nhn thy 1 hnh nh lin tc.GIO TRNH VI IU KHIN AVR

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C 1 cch qut led ma trn l qut theo hng v qut theo ct, v d trong bi s trnh by cc qut theo hng (ma trn led chng ta s dng l ma trn kch c 8x8), y cng l cch qut led ph bin hin nay.


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2. To font cho led ma trn C rt nhiu phn mm h tr chng ta to font cho led ma trn, tuy nhin, sau y tc gi s hng dn cc bn s dng phn mm Excel nm trong b Microsoft Office) to bng font, sau y l font cho ch A :

Phng php qut led nh sau : - u tin, chng ta cho hng th nht active, cc hng th nht c gi tr 0x18 (cc mu vng tng ng c gi tr 1, cc mu xanh nht c gi tr 0), nh vy 2 led hng th nht s sng (tng ng vi 2 mu vng). - Sau chng ta un-active hng th nht, ton b cc led hng th nht tt, v cho active hng th 2, cng tng t nh trn, chng ta a gi tr l 0x24 cho cc hng th 2, kt qu l chng ta cng c 2 sng (tng ng vi 2 mu vng) hng th 2. - Tng t, chng ta cho sng ln lt cc hng vi cc gi tr nh hnh v trn. - Do tc qut nhanh nn mt chng ta khng phn bit c s chuyn ng ri rc ca cc led. V kt qu l chng ta nhn thy led sng thnh hnh ch A nh hnh v. Cc k t khc cng c th to tng t nh trn.


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3. V d minh ha. on chng trnh sau s lm hin th ch A ln led ma trn, cc hng v cc ct c ni tng ng vo cc port B v D :

Bi tp Da vo nguyn l to ch A trn, bn hy to v vit chng trnh hin th cc k t bt k trong bng ch ci


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BI 8: GIAO TIP MY TNH

- C bn v giao tip RS232. - Cch cu hnh giao tip RS232 trong CCS cho PIC16F887 - V d minh ha

1. C bn v giao tip RS232 RS232 l mt dng giao thc, dng truyn d liu gia cc thit b in t c h tr giao thc ny. RS232 l mt trong nhng giao thc ra i sm nht v c th ni l n gin nht. Cho n nay, RS232 vn cn c ng dng rt nhiu do giao thc n gin, tin cy cao, v khong cch truyn kh xa, tuy nhin tc truyn vn mc kh khim tn so vi cc giao thc ra i sau ny nh USB, SPI, I2C s dng c giao tip RS232, chng ta s dng module UART c sn trong Atmega32. UART l vit tt ca Universal Asynchronous Receiver Transmitter, l giao tip truyn nhn d b, d b y c ngha l thit b truyn v thit b nhn khng cng chung xung nhp clock. Trong giao thc RS232, chng ta quan tm n nhng thng s sau : - Tc baud : L s bit truyn trn 1s, in hnh l 9600 bit/s - Parity : c 2 loi parity l parity chn v parity l, dng tng tnh kim sot li trong 1 ln truyn, gi s ta cu hnh parity l chn th mi ln truyn, nu s bit c mc logic 1 l l th module t thm 1 bit 1 vo cui khung truyn, cn nu s bit c mc logic 1 l chn th khng thm bit 1 vo cui khung truyn. Parity l cng tng t nh vy. - S bit trn mi ln truyn : L s bit d liu (data) trn mi khung truyn, thng l 8 bit. Mt khung truyn UART c cu trc nh sau :


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2. Cch cu hnh module UART trong Code Vision cu hnh s dng module UART trong Code Vision, ta s dng 4 thanh ghi UCSRA, UCSRB, UCSRC, UBRRH, UBRRL : UCSRA (USART Control and Status Register A) UCSRB (USART Control and Status Register B) UCSRC (USART Control and Status Register C) UBRRL v UBRRH (USART Baud Rate Registers) C th v cc bit v ngha ca cc bit trong cc thanh ghi ny, cc bn c th tham kho phn help ca Code Vision. Mt s hm thng dng : char getchar(void) Hm ny tr v mt k t nm trong b m nhn ca Atmega32 (nu c). void putchar(char c) Hm ny truyn mt k t thng qua module UART void printf(char flash *fmtstr [ , arg1, arg2, ...]) Hm ny ging nh hm trong C, nhng thay v in cc k t ln mn hnh (trong C) th hm ny s gi d liu thng qua module UART.


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3. V d. Sau y l mt chng trnh minh ha giao tip RS232, chng trnh s lin tc gi chui k t ln Chuong trinh giao tiep RS232 ln PC. Mch nguyn l :

Trong mch nguyn l, chng ta s dng thm 1 IC max 232 chuyn in p tng ng vi 2 mc logic 0 v 1 ca vi iu khin thnh in p mc logic tng ng vi AVR, hai chn 11 v 12 ca max232 c ni vi 2 chn TX v RX ca vi iu khin. Chng trnh :


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Chng trnh giao tip RS232 rt n gin. c th quan st k t c truyn ln PC, chng ta c th s dng 1 phn mm c sn trong window l Hyper Terminal, m phn mm ny, chng ta lm nh sau : - Vo Start/All Program/Accessories/Communications/Hyper Terminal - Tip n, xut hin hp thoi nhc nh nhp tn thng tin khu vc, chng ta chn cancel, sau chn yes v ok


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- Sau chng ta nhp m t kt ni :


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- Nu li xut hin hp thoi nhc nh nhp tn thng tin khu vc, chng ta lm nh trn. - Sau , chng ta chn cc thng s thit lp kt ni :

Chn cng COM kt ni


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Chn tc baud, s bit d liu trn 1 khung truyn v parity - Giao din ca chng trnh nh sau :


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- Kt qu, chng ta c nh sau :

- Ch : Ngoi chng trnh Hyper Terminal c sn trong window, chng ta c th s dng nhiu chng trnh khc nh Terminal, hay nh chng trnh c sn ca CCS nh siow (Serial Input/Output Monitor), giao din cc chng trnh nh sau :


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Bi tp:


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V d trn m t vic gi d liu ln PC, da vo cc hm c sn trong CCS nh gii thiu trc , bn hy vit chng trnh c d liu gi v t PC.


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BI 9 : GIAO TIP I2C

- Gii thiu v giao tip I2C. - Cch cu hnh giao tip I2C trong Code Vision cho Atmega32. - V d minh ha.

1. Gii thiu chung v I2C Ngy nay trong cc h thng in t hin i, rt nhiu IC hay thit b ngoi vi cn phi giao tip vi cc IC hay thit b khc giao tip vi th gii bn ngoi. Vi mc tiu t c hiu qu cho phn cng tt nht vi mch in n gin, Phillips pht trin mt chun giao tip ni tip 2 dy c gi l I2C. I2C l tn vit tt ca cm t Inter Intergrated. I2C c tc truyn kh cao, c Mbit/s, tuy nhin khong cch truyn rt ngn, ch khong trn board mch. I2C mc d c pht trin bi Philips, nhng n c rt nhiu nh sn xut IC trn th gii s dng. I2C tr thnh mt chun cng nghip cho cc giao tip iu khin, c th k ra y mt vi tn tui ngoi Philips nh : Texas Intrument (TI), Maxim Dallas,analog Device, National emiconductor Bus I2C c s dng lm bus giao tip ngoi vi cho rt nhiu loi IC khc nhau nh cc loi vi iu khin PIC, AVR, ARM, chip nh nh RAM tnh (Static Ram), EEPROM, b chuyn i tng t s (ADC), s tng t (DAC)

Bus I2C v cc thit b ngoi vi


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Mt giao tip I2C gm c 2 dy : Serial Data (SDA) v Serial Clock (SCL). SDA l ng truyn d liu 2 hng, cn SCL l ng truyn xung ng h v ch theo mt hng.

Kt ni thit b vo bus I2C Mi dy SDA hay SCL u c ni vi in p dng ca ngun cp thng qua mt in tr ko ln (pull up resistor). S cn thit ca cc in tr ko ny l v chn giao tip I2C ca cc thit b ngoi vi thng l dng cc mng h (open drain or open collector).Gi tr ca cc in tr ny khc nhau ty vo tng thit b v chun giao tip, thng dao ng trong khong 1K n 4.7K . Ta thy c rt nhiu thit b (ICs) cng c kt ni vo mt bus I2C, tuy nhin s khng xy ra chuyn nhm ln gia cc thit b, bi mi thit b s c nhn ra bi mt a ch duy nht vi mt quan h ch/t tn ti trong sut thi gian kt ni. Mi thit b c th hot ng nh l thit b nhn d liu hay c th va truyn va nhn. Hot ng truyn hay nhn cn ty thuc vo vic thit b l ch (master) hay t (slave). Mt thit b hay mt IC khi kt ni vi bus I2C, ngoi mt a ch (duy nht) phn bit, n cn c cu hnh l thit b ch (master) hay t (slave). Ti sao li c s phn bit ny ? V trn mt bus I2C th quyn iu khin thuc v thit b ch (master). Thit b ch nm vai tr to xung ng h cho ton h thng, khi gia hai thit b ch/t giao tip th thit b ch c nhim v to xung ng h v qun l a ch ca thit b t trong sut qu trnh giao tip. Thit b ch gi vai tr ch ng, cn thit b t gi vai tr b ng trong vic giao tip.


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Truyn nhn d liu gia ch/t Nhn hnh trn ta thy xung ng h ch c mt hng t ch n t, cn lung d liu c th i theo hai hng, t ch n t hay ngc li t n ch. V d liu truyn trn bus I2C, mt bus I2C chun truyn 8 bit d liu c hng trn ng truyn vi tc l 100Kbits/s Ch chun (Standard mode). Tc truyn c th ln ti 400Kbits/s Ch nhanh (Fast mode) v cao nht l 3,4Mbits/s Ch cao tc (High speed mode). Mt bus I2C c th hot ng nhiu ch khc nhau: - Mt ch mt t (one master one slave) - Mt ch nhiu t (one master multi slave) - Nhiu ch nhiu t (Multi master multi slave) D ch no, mt giao tip I2C u da vo quan h ch/t. Gi thit mt thit b A mun gi d liu n thit b B, qu trnh c thc hin nh sau : - Thit b A (Ch) xc nh ng a ch ca thit b B (t), cng vi vic xc nh a ch, thit b A s quyt nh vic c hay ghi vo thit b t. - Thit b A gi d liu ti thit b B - Thit b A kt thc qu trnh truyn d liu Khi A mun nhn d liu t B, qu trnh din ra nh trn, ch khc l A s nhn d liu t B. Trong giao tip ny, A l ch cn B vn l t. Chi tit vic thit lp mt giao tip gia hai thit b s c m t chi tit trong cc mc di y. START and STOP conditions START v STOP l nhng iu kin bt buc phi c khi mt thit b ch mun thit lp giao tip vi mt thit b no trong mng I2C. START l iu kin khi u, bo hiu bt u ca giao tip, cn STOP bo hiu kt thc mt giao tip. Hnh di y m t iu kin START v STOP. Ban u khi cha thc hin qu trnh giao tip, c hai ng SDA v SCL u mc cao (SDA = SCL = HIGH). Lc ny bus I2C c coi l di (bus free), sn sng cho mt giao tip. Hai iu kin START v STOP l khng th thiu trong vic giao tip gia cc thit b I2C vi nhau


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iu kin START v STOP ca bus I2C iu kin START : mt s chuyn i trng thi t cao xung thp trn ng SDA trong khi ng SCL ang mc cao (cao = 1; thp = 0) bo hiu mt iu kin START iu kin STOP : Mt s chuyn i trng thi t mc thp ln cao trn ng SDA trong khi ng SCL ang mc cao. C hai iu kin START v STOP u c to ra bi thit b ch. Sau tn hiu START, bus I2C coi nh ang trong trang thi lm vic (busy). Bus I2C s ri, sn sng cho mt giao tip mi sau tn hiu STOP t pha thit b ch. Sau khi c mt iu kin START, trong qua trnh giao tip, khi c mt tn hiu START c lp li thay v mt tn hiu STOP th bus I2C vn tip tc trong trng thi bn. Tn hiu START v lp li START u c chc nng ging nhau l khi to mt giao tip. nh dng d liu truyn D liu c truyn trn bus I2C theo tng bit, bit d liu c truyn i ti mi sn dng ca xung ng h trn dy SCL, qu trnh thay i bit d liu xy ra khi SCL ang mc thp.

Qu trnh truyn 1 bit d liu Mi byte d liu c truyn c di l 8 bits. S lng byte c th truyn trong mt ln l khng hn ch. Mi byte c truyn i theo sau l mt bit ACK bo hiu nhn d liu. Bit c trng s cao nht (MSB) s c truyn i u tin, cc bt s c truyn i ln lt. Sau 8 xung clock trn dy SCL, 8 bit d liu c truyn i. Lc ny thit b nhn, sau khi nhn 8 bt d liu s ko SDA xung mc thp to mt xung ACK ng vi xung clock th 9 trn dy SDA bo hiu nhn 8 bit. Thit b truyn khi nhn c bit ACK s tip tc thc hin qu trnh truyn hoc kt thc.


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D liu truyn trn bus I2C

Bit ACK trn bus I2C

Lu thut ton truyn v nhn d liu trong giao tip I2C


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Mt byte truyn i c km theo bit ACK l iu kin bt buc, nhm m bo cho qu trnh truyn nhn c din ra chnh xc. Khi khng nhn c ng a ch hay khi mun kt thc qu trnh giao tip, thit b nhn s gi mt xung Not ACK (SDA mc cao) bo cho thit b ch bit, thit b ch s to xung STOP kt thc hay lp li mt xung START bt u qu trnh mi. nh dng a ch thit b Mi thit b ngoi vi tham gia vo bus I2C u c mt a ch duy nht, nhm phn bit gia cc thit b vi nhau. di a ch l 7 bit, iu c ngha l trn mt bus I2C ta c th phn bit ti a 128 thit b. Khi thit b ch mun giao tip vi ngoi vi no trn bus I2C, n s gi 7 bit a ch ca thit b ra bus ngay sau xung START. Byte u tin c gi s bao gm 7 bit a ch v mt bt th 8 iu khin hng truyn. Mi mt thit b ngoi vi s c mt a ch ring do nh sn xut ra n quy nh. a ch c th l c nh hay thay i. Ring bit iu khin hng s quy nh chiu truyn d liu. Nu bit ny bng 0 c ngha l byte d liu tip theo sau s c truyn t ch n t, cn ngc li nu bng 1 th cc byte theo sau byte u tin s l d liu t con t gi n con ch. Vic thit lp gi tr cho bit ny do con ch thi hnh, con t s ty theo gi tr m c s phn hi tng ng n con ch. Truyn d liu trn bus I2C, ch Master Slave D liu truyn c th theo 2 hng, t ch n t hay ngc li. Hng truyn c quy nh bi bit th 8 trong byte u tin c truyn i.

Cu trc byte d liu u tin Mi mt thit b ngoi vi s c mt a ch ring do nh sn xut ra n quy nh. a ch c th l c nh hay thay i. Ring bit iu khin hng s quy nh chiu truyn d liu. Nu bit ny bng 0 c ngha l byte d liu tip theo sau s c truyn t ch n t, cn ngc li nu bng 1 th cc byte theo sau byte u tin s l d liu t con t gi n con ch. Vic thit lp gi tr cho bitGIO TRNH VI IU KHIN AVR

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ny do con ch thi hnh, con t s ty theo gi tr m c s phn hi tng ng n con ch.

Qu trnh truyn d liu Truyn d liu t ch n t (ghi d liu)

-

-

-

Qu trnh thc hin : Thit b ch to tn hiu START Thit b ch gi tn hiu iu khin (Control In) ti thit b t, bo hiu qu trnh tip theo s l c hay ghi d liu. Byte ny c qui nh bi nh sn xut. Nu nhn c tn hiu ACK, c ngha l qu trnh gi Control In thnh cng, thit b ch tip tc gi a ch cn ghi d liu thit b t. Khi tip tc nhn c xung ACK bo nhn din ng thit b t, thit b ch bt u gi d liu n thit b t theo tng byte mt. Theo sau mi byte ny u l mt xung ACK. S lng byte truyn l khng hn ch. Kt thc qu trnh truyn, thit b ch sau khi truyn byte cui s to xung STOP bo hiu kt thc.

Truyn d liu t t n ch (c d liu) Thit b ch mun c d liu t thit b t, qu trnh thc hin nh sau :GIO TRNH VI IU KHIN AVR

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- Khi bus ri, thit b ch to xung START, bo hiu bt u giao tip. - Thit b ch gi tn hiu iu khin (Control In) ti thit b t, bo hiu qu trnh tip theo s l c hay ghi d liu. Byte ny c qui nh bi nh sn xut. - Nu nhn c tn hiu ACK, c ngha l qu trnh gi Control In thnh cng, thit b ch tip tc gi a ch cn c d liu thit b t. - Sau xung ACK u tin, thit b t s gi tng byte ra bus, thit b ch s nhn d liu v tr v xung ACK. S lng byte khng hn ch - Khi mun kt thc qu trnh giao tip, thit b ch gi xung NotACK v to xung STOP kt thc. Qu trnh kt hp ghi v c d liu: gia hai xung START v STOP, thit b ch c th thc hin vic c hay ghi nhiu ln, vi mt hay nhiu thit b. thc hin vic , sau mt qu trnh ghi hay c, thit b ch lp li mt xung START v li gi li a ch ca thit b t v bt u mt qu trnh mi. Ch giao tip Master Slave l ch c bn trong mt bus I2C, ton b bus c qun l bi mt master duy nht. Trong ch ny s khng xy ra tnh trng xung t bus hay mt ng b xung clock v ch c mt master duy nht c th to xung clock. Ch Multi-Master Trn bus I2C c th c nhiu hn mt master iu khin bus. Khi bus I2C s hot ng ch Multi-Master.


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2. Module I2C trong Atmega32 Vi nhng tin ch em li, khi giao tip I2C c tch hp cng trong kh nhiu loi vi iu khin khc nhau. Vi nhng loi Vi iu khin khng c h tr phn cng giao tip I2C, s dng ta c th dng phn mm lp trnh, khi ta s vit mt chng trinh diu khin 2 chn bt k ca Vi iu khin n thc hin giao tip I2C (cc hm START, STOP, WRITE, READ). Trong Code Vision c th vin h tr giao tip I2C, l file I2C.H. Cc hm h tr : void i2c_init(void); Hm ny khi to module I2C. unsigned char i2c_start(void); Hm ny to ra tn hiu Start cho module I2C void i2c_stop(void); Hm ny to ra tn hiu Start cho module I2C unsigned char i2c_read(unsigned char ack); Hm ny c mt byte t bus. Ack c th bng 1 hoc 0, tng ng l c tr li tn hiu acknowledgement sau khi nhn c byte hay khng unsigned char i2c_write(unsigned char data); Hm ny ghi mt byte ln bus. Cc bc cu hnh module I2C nh ngha chn giao tip I2C V d :/* the I2C bus is connected to PORTB */ /* the SDA signal is bit 3 */ /* the SCL signal is bit 4 */ #asm .equ __i2c_port=0x18 .equ __sda_bit=3 .equ __scl_bit=4 #endasm


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Thm th vin I2C vo chng trnh include Khi to module I2C thng qua hm i2c_init() Vit cc lnh cn thit : read, write, start, stop


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3. V d V d sau s s dng module I2C c trong Atmega32 giao tip vi IC thi gian thc DS1307, khi khi ng chng ta t giy trong DS1307 l 5s, sau chng ta c li t DS1307 ri hin th s giy ln LCD. S lc v DS1307 DS1307 l IC thi gian thc, s dng giao tip I2C giao tip vi cc thit b khc. D liu trong DS1307 nh gi, pht, giy c t ti cc a ch c nh, c cung cp bi nh sn xut. Vic c hay ghi gi, pht, giy chng ta s c/ghi vo cc a ch tng ng.

S chn DS1307 Chi tit v chc nng v a ch ca cc d liu trong DS1307, cc bn c th tham kho trong datasheet. Mt iu lu l d liu trong DS1307 c lu di dng s BCD, trong khi d liu dng trong vi iu khin li di dng s nh phn, do vy, trc khi c, ghi d liu, chng ta phi chuyn i gia 2 loi s ny cho ph hp.

S ghp ni DS1307 v vi iu khin - c d liu t DS1307 :


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- Ghi d liu vo DS1307 :

Chng trnh :


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Bi tp : - Da vo chng trnh mu trn, hy vit chng trnh s dng DS1307, LCD v cc phm bm cn thit lm mt lch vn nin


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BI 10 : NG C BC

- C bn v ng c bc. - Cc mch iu khin ng c bc - V d minh ha 1. C bn v ng c bc ng c bc l loi ng c n gin, c chnh xc cao, iu khin d dng, kch thc nh gi v c ng dng rt rng ri trong cc lnh vc iu khin chuyn ng, cc ng c dng trong u a CD, trong cng... hu ht l cc ng c bc. ng c bc hin nay t ti chnh xc rt cao, c th quay 1,8o mi bc. Cc c im chnh ca ng c bc : - Khng chi than : Khng xy ra hin tng nh la chi than lm tn hao nng lng, ti mt s mi trng c bit (hm l...) c th gy nguy him. - To c mmen gi : Mt vn kh trong iu khin l iu khin ng c tc thp m vn gi c mmen ti ln. ng c bc l thit b lm vic tt trong vng tc nh. N c th gi c mmen thm ch c v tr nh vo tc dng hm li ca t trng rotor. - iu khin v tr theo vng h : Mt li th rt ln ca ng c bc l ta c th iu chnh v tr quay ca roto theo mun m khng cn n phn hi v tr nh cc ng c khc, khng phi dng n encoder hay my pht tc (khc vi servo). - c lp vi ti : Vi cc loi ng c khc, c tnh ca ti rt nh hng ti cht lng iu khin. Vi ng c bc, tc quay ca rotor khng ph thuc vo ti (khi vn nm trong vng momen c th ko c). KhiGIO TRNH VI IU KHIN AVR

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momen ti qu ln gy ra hin tng trt, do khng th kim sot c gc quay.


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2. Cc mch iu khin ng c bc C 3 cch iu khin ng c : iu khin bc, na bc v vi bc. chnh xc tng dn theo th t trn. Xt v cu to th ng c bc cng c cu to gm cc cun dy, mch iu khin ng c bc gn ging vi mch iu khin ca cc thit b nh relay, ng c 1 chiu

Nu s dng mch c nguyn l nh trn, chng ta c th s dng 1 IC tch hp sn nh ULN2003, IC h ULN200x c u vo ph hp TTL, cc u emitor c ni vi chn 8.

Mi transitor darlington c bo v bi hai diode. Mt mc gia emitor ti collector chn in p ngc ln t ln transitor. Diode th hai ni collector vi 82 www.dks.edu.vn


chn 9. Nu chn 9 ni vi cc dng ca cun dy, to thnh mch bo v cho transitor. Ngoi ra, c nhiu IC tch hp sn dng iu khin ng c bc, ph bin l cp IC L297 v L298, chuyn dng iu khin ng c bc vi nguyn l s dng mch cu H (L298), IC L297 cho php chng ta chn ch iu khin na bc hoc bc. ng c bc trong kit th nghim l ng c 6 dy, trong c 2 dy ngun v 4 dy pha, chiu quay ca ng c ph thuc vo th t in p cp cho cc pha ny, sau y l s nguyn l iu khin 1 pha :

Cc P2 c ni vo chn vi iu khin, chng ta s dng opto cch li gia phn cng sut v phn iu khin, in p cp cho cc pha ca ng c c iu khin thng qua FET. Cc pha khc c s nguyn l tng t hnh trn. Vic nhn bit cc u dy rt n gin, chng ta cng xem qua s sau :

Chng ta ch vic o in tr gia cc u dy vi nhau, u dy no thng vi 2 u dy khc v in tr dy dn gia u dy vi 2 u dy cn li bng nhau th l u s 1 hoc u s 2, hai u ny c vai tr nh nhau nn khng cn phn bit 2 u ny. Gi ta phi xc nh th t cp in p vo cc u dy a,b iu khin ng c quay. Chng ta ni ngun vo 2 u chung 1,2, sau ln lt cp inGIO TRNH VI IU KHIN AVR

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p vo cc u dy cn li, cho ti khi t ti 1 th t cp in p no m ng c ch quay theo 1 chiu th chng ta ghi li th t v coi nh l th t chun iu khin ng c, mun ng c quay theo chiu ngc li, chng ta ch vic cp in p vo 4 u dy theo th t ngc li.


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3. V d Chng trnh sau s iu khin ng c bc 6 u dy quay theo 1 chiu c nh, cc u dy c ni vo Port D (Xem phn define trong chng trnh).

Ch yu chng ta iu khin 2 ch l bc v na bc, ch vi bc ch s dng khi yu cu chnh xc cao. ch bc , chng ta ln lt cp xung vo cc pha ca ng c, cn ch na bc, chng ta cp cng 1 lc xung vo 2 pha k tip nhau ca ng c.GIO TRNH VI IU KHIN AVR

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Tc quay ca ng c bc ph thuc vo thi gian chuyn gia 2 ln cp xung k tip nhau vo cc u dy. Trong chng trnh trn, thi gian cp xung l time_delay.

Bi tp Chng trnh trong v d iu khin ng c bc theo ch bc (cp xung vo 1 cun dy ti 1 thi im), bn hy vit chng trnh iu khin ng c bc theo ch na bc. (cp xung vo 2 cun dy k tip nhau ti mt thi im).


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BI 11 : GIAO TIP VI CNG LPT

- C bn v cng LPT - V d minh ha

1. C bn v cng LPT LPT l vit tt ca ch Line Print Terminal, giao tip LPT l giao tip song song nhm mc ch ni my tnh PC vi my in. V sau, cng song song pht trin thnh mt tiu chun khng chnh thc. Tn gi ca cng song song bt ngun t kiu d liu truyn qua cng ny : cc bit d liu c truyn song song hay ni c th hn l byte ni tip cn bit song song. Cho n nay cng song song c mt hu ht cc my tnh PC c sn xut trong nhng nm gn y. Cng song song cn c gi l cng my in hay cng Centronics. Cu trc ca cng song song rt n gin vi tm ng d liu, mt ng dn mass chung, bn ng dn iu khin chuyn cc d liu iu khin ti my in v nm ng dn trng thi ca my in ngc tr li my tnh. Giao din song song s dng cc mc logic TTL, v vy vic s dng trong mc ch o lng v iu khin c phn n gin.


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S cng LTP Khong cch cc i gia cng song song my tnh PC v thit b ngai vi b hn ch v in dung k sinh v hin tng cm ng gia cc ng dn c th lm bin dn tn hiu. Khong cch gii hn l 8m, thng thng ch c 1,5 2 m. Khi khong cch ghp ni trn 3m nn xon cc ng dy tn hiu vi ng ni t theo kiu cp dy xon hoc dng loi cp dt nhiu si trong mi ng dn d liu iu nm gia hai ng ni mass. Tc truyn d liu qua cng song song ph thuc vo linh kin phn cng c s dng. Trn l thuyt tc truyn t gi tr 1 Mbit/s, nhng vi khong cch truyn b hn ch trong phm vi 1m. Vi nhiu mc ch s dng th khong cch ny hon ton tha ng. Nu cn truyn trn khong cch xa hn, ta nn ngh n kh nng truyn qua cng ni tip hoc USB. Mt im cn lu l : vic tng khong cch truyn d liu qua cng song song khng ch lm tng kh nng gy li i vi ng d liu c truyn m cn lm tng chi ph ca ng dn. Sau y l chc nng ca cc ng dn tn hiu: Strobe (1) Vi mt mc logic thp chn ny, my tnh thng bo cho my in bit c mt byte ang sn sng trn cc ng dn tn hiu c truyn. D0 n D7 Cc ng dn d liu Acknowledge Vi mt mc logic thp chn ny, my in thng bo cho my tnh bit l nhn c k t va gi v c th tip tc nhn. Busy (bn 11) My in gi n chn ny mc logic cao trong khi ang n nhn hoc in ra d liu thng bo cho my tnh bit l cc b m trong my tnh bit l cc b m trong my tnh b y hoc my in trong trn thi Off-line. Paper empty (ht giy 12) Mc cao chn ny c ngha l giy dng ht. Select (13) Mt mc cao chn ny, c ngha l my in ang trong trng thi kch hot (On-line) Auto Linefeed (t np dng)


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C khi cn gi l Auto Feed. Bng mt mc thp chn ny my tnh PC nhc my in t ng np mt dng mi mi khi kt thc mt dng. Error (c li) Bng mt mc thp chn ny, my in thng bo cho my tnh l xut hin mt li, chng hn kt giy hoc my in ang trong trng thi Off-Line. Reset (t li) Bng mt mc thp chn ny, my in c t li trng thi c xc nh lc ban u. Select Input Bng mt mc thp chn ny, my in c la chn bi my tnh. Cp ni gia my in v my tnh bao gm 25 si, nhng khng phi tt c iu c s dng m trn thc t ch c 18 si c ni vi cc chn c th. Nhn xt ny gip chng ta tn dng nhng cp ni m trong li b t mt hai si. Qua cch m t chc nng ca tng tn hiu ring l ta c th nhn thy cc ng dn d liu c th chia thnh 3 nhm: - Cc ng dn tn hiu, xut ra t my tnh PC v iu khin my tnh, c gi l cc ng dn iu khin. - Cc ng dn tn hiu, a cc thng tin thng bo ngc li t my in v my tnh, c gi l cc ng dn trng thi. - ng dn d liu, truyn cc bit rieng l ca cc k t cn in. T cch m t cc tn hiu v mc tn hiu ta c th nhn thy l: cc tn hiu Acknowledge, Auto Linefeed, Error, Reset v Select Input kch hot mc thp. Thng qua chc nng ca cc chn ny ta cng hnh dung c iu khin cng my in.


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2. V d minh ha My tnh s gi d liu (dng 8 bit) thng qua cc ng data, t DATA0 n DATA7. V s nhn d liu phn hi t thit b thng qua cc ng iu khin, sau y l s kt ni :

Do hnh thc giao tip l giao tip song song, nn lp trnh kh n gin, on code sau y dng nhn d liu t cng LPT v xut ra led, led c ni vi PORT B, d liu nhn t cng LPT c ni vo PORT C. 90 www.dks.edu.vn


on m trn c d liu gi xung t cng LPT (cc ng t D0 n D7) thong qua Port B, sau xut d liu ra Port C. Phn mm giao tip vi cng LPT cc bn c th t vit, dng cc ngn ng lp trnh nh Visual Basic, hay C++, C#...


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BI 12 : GIAO TIP VI MA TRN PHM - C bn v ma trn phm - V d minh ha

1. C bn v ma trn phm Ging nh led ma trn, ma trn phm l tp hp cc phm n, c ni vi nhau thnh dng ma trn.

Ma trn phm 4x4 Vic giao tip vi bn phm ma trn cng tng t nh giao tip vi led ma trn, chng ta cng c 2 kiu l qut theo hang v qut theo ct. Sau y chng ta s cng tm hiu cch qut phm theo hng : - Ban u, chng ta cp in p (gi s l 5V mc logic 1) vo hang A, cc hang cn li cp mc logic 0. - Sau , chng ta kim tra mc logic ti cc ct 1,2,3,4, nu ct no c mc logic 1 th phm tng ng ct c nhn. Gi s ct 1 c mc logic 1 th phm 7 c nhn.GIO TRNH VI IU KHIN AVR

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- Tng t, chng ta ln lt cho cc hang B, C, D c mc logic 1, cc hang cn li c mc logic 0, thng qua vic c mc logic ti cc ct, chng ta s bit c phm no c nhn.


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2. V d minh ha Sau y l chng trnh minh ha cch qut phm, bn phm gm 8 phm c ni vo Port B, gi tr ca cc phm sau khi c c a ra port C.


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Bi tp Chng trnh trn ch c gi tr ca phm bm v xut gi tr (nh phn) ra Port C, bn hy vit chng trnh c gi tr ca phm v xut ra led 7 thanh.


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BI 13 : TIMER

- Gii thiu v timer trong Atmega32 - V d minh ha

1. Gii thiu v timer Timer l mt trong nhng module rt quan trng trong vi iu khin, s dng timer, chng ta c th lp trnh cc tc v din ra 1 cch chnh xc theo thi gian nh trc, c th m s xung ni vo u vo timerHu nh tt c cc loi vi iu khin u c timer, s lng timer mi dng vi iu khin c th khc nhau. Timer c ng dng rng ri trong thc t, gi s nh chng ta mun to ra 1 khong thi gian chnh xc l 1ms lm 1 tc v no , hay nh chng ta mun m sn phm i qua bng chuyn, hoc m s xung t encoder Tt c cc cng vic chng ta c th hon ton thc hin bng timer. C 2 ch hot ng i vi timer, ch timer v ch counter. Vi ch timer th xung a vo module timer l xung nhp ca h thng, cn vi ch counter th xung a vo module timer l xung bn ngoi. Trong Atmega32 c 3 timer : Timer 0, timer 1 v timer 2 Timer 0 : L timer 8 bit, c cc tnh nng sau : - S dng lm b nh thi - T xa khi t ti 1 gi tr t trc (T ng np li) - To xung - m s kin (Counter) - H tr prescaler


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S cu to ca Timer 0 Cc ch hot ng c ci t tr thanh thi TCCR0. Thanh ghi TCNT0 dng cha gi tr ca Timer 0, thanh ghi ny c th c c hay ghi. Thanh ghi OCR0 l gi tr t trc dng so snh vi gi tr trong thanh ghi TCNT0, khi gi tr 2 thanh ghi ny bng nhau s to ra 1 tn hiu ra chn OC0.


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Timer 1 : L Timer 16 bit, c nhng tnh nng sau : - C 2 module Output Compare hot ng c lp - Hai thanh ghi m cha gi tr t trc - Mt module Capture - Ch t ng np li - Ch PWM vi chu k c th thay i c - B to tn s - B m s kin (Counter) - C 4 ngun ngt c lp

S cu to ca Timer 1 Timer 2 : L timer 8 bit, c cc tnh nng sau : - T xa khi t ti 1 gi tr t trc (T ng np li) - B to tn s


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- H tr PWM - m s kin (Counter) - H tr prescaler. - H tr clock input t thch anh 32KHz qua chn I/O.

S cu to ca Timer 2 Cc thanh ghi cho Timer 1 v timer 2 cng tng t nh timer 0, cc bn c th tham kho trong datasheet bit r hn.


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2. V d minh ha V d sau s s dng timer o mc logic ti port A, ch hot ng ca timer l ch n gin nht, chng ta s dng timer 1 quan st gi tr logic ti port A, chng ta mc vo 8 led n. Chng trnh

Bi tp - Bn hy tnh ton xem vi cu hnh timer nh trn th sau bao lu PORT A o gi tr mt ln. - Vit chng trnh tr n(ms) s dng timer.


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BI 14 : NGT Gii thiu v ngt Cch cu hnh cho ngt trong Atmega32. V d minh ha vi ngt ngoi V d minh ha vi ngt timer

1. Gii thiu v ngt Ging vi timer, ngt cng l 1 trong nhng module rt quan trng ca vi iu khin, s dng ngt s gip chng ta khng phi mt thi gian kim tra lin tc 1 on chng trnh no , ngoi ra, chng ta c th s dng ngt ng thi cho vi iu khin cng 1 lc lm nhiu nhim v. Chng ta cng hnh dung 1 v d n gin v ngt nh sau : Mi gia nh u c 1 ci chung ca, ci chung ca ng vai tr nh 1 ngt, mi khi c ai bm chung (xy ra ngt), chng ta xung m ca cho ngi vo. Nu nh khng c chung ca, chng ta phi lin tc kim tra xem c ai cng hay khng m ca, lm nh th s mt thi gian hn rt nhiu. Mt chng trnh ngt cng ging nh 1 chng trnh con, khi iu kin xy ra ngt tha mn, vi iu khin s tm dng chng trnh ang thc hin nhy ti chng trnh ngt, sau khi thc hin xong chng trnh ngt, vi iu khin li tip tc thc hin cng vic m trc n ang lm. im khc bit gia chng trnh ngt v chng trnh con l chng trnh ngt khng c i s truyn vo v khng c php gi (call) t 1 chng trnh chnh hay 1 chng trnh con khc. Vi iu khin Atmega32 c rt nhiu loi ngt, c th tng loi, chng ta c th tham kho trong datasheet. Trong bi hc ny, chng ta ch xem xt 2 loi ngt l ngt ngoi v ngt timer. Ngt ngoi Trong Atmega32 c 3 ngt ngoi l INT0, INT1, INT2. Cc ngt ny c cu hnh bi 2 thanh ghi MCUCR v MCUCSR


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Thanh ghi MCUCR ISCx0 0 0 1 1 ISCx1 0 1 0 1 M t Ngt INTx xy ra khi chn INTx mc thp Ngt INTx xy ra khi c thay i mc logic chn INTx Ngt theo sn xung Ngt theo sn ln

Thanh ghi MCUCSR ISC2 0 1 Thanh ghi cho php ngt GICR : M t Ngt theo sn xung Ngt theo sn ln

Cc bit INT0, INT1, INT2 c dng enable cc ngt tng ng, khi cc bit ny c set ln 1, cc ngt tng ng s c enable. Ngt timer Ngt timer xy ra khi trn timer hoc khi gi tr trong timer t ti mt gi tr t trc. Cu hnh timer cc bn c th tham kho bi timer, cu hnh ngt cho timer, chng ta s dng thanh ghi TIMSK :GIO TRNH VI IU KHIN AVR

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TOIE0 : Bit ny t ch ngt cho timer 0, nu c set bng 1 th ngt timer 0 s xy ra khi trn timer. OCIE0 : Bit ny t ch ngt cho timer 0, nu c set bng 1 th ngt timer 0 s xy ra khi gi tr ca timer 0 (TCNT0) t ti gi tr trong thanh ghi t trc (OCR0) TOIE1 : Bit ny t ch ngt cho timer 1, nu c set bng 1 th ngt timer 1 s xy ra khi trn timer. OCIE1B : Khi bit ny c set ln 1, ngt timer 1 xy ra khi OCR1B = TCNT1 OCIE1A : Khi bit ny c set ln 1, ngt timer 1 xy ra khi OCR1A = TCNT1 TOIE2 : Bit ny t ch ngt cho timer 2, nu c set bng 1 th ngt timer 2 s xy ra khi trn timer.


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2. Cc bc cu hnh cho ngt hot ng

- Ngt ngoi : o t ch cho ngt : ngt theo sn ln (xung), hay ngt theo mc. o Cho php ngt ton cc. o Vit chng trnh cho ngt ngoi - Ngt timer : o o o o t ch cho timer (xem phn timer) Cho php ngt timer. Cho php ngt ton cc. Vit chng trnh cho ngt timer.

- Cc loi ngt khc cng cu hnh tng t nh 2 loi ngt trn.


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3. V d V d sau s thao tc vi ngt ngoi INT2, mi khi c ngt ngoi xy ra, chng ta o mc logic ti PORTA. Chng ta c th mc led vo PORTA quan st mc logic ti port A.

Chng trnh


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Bi tp - Da vo v d trn, bn hy cu hnh s dng vi cc ngt INT0, INT1 v cc ngt timer.


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BI 15 : IU KHIN NG C MT CHIU

- Gii thiu v ng c 1 chiu - V d minh ha

1. Gii thiu v ng c mt chiu ng c mt chiu l loi ng c c cu to v cch iu khin n gin nht, tc ng c c iu khin thng qua in p cp vo 2 u ng c. ng c mt chiu c ng dng rt rng ri trong cc h thng t ng. Cho n nay, c rt nhiu phng php dng iu khin ng c mt chiu, bi ging ny s trnh by cch s dng module PWM iu ch in p t ln hai u ng c, do iu khin c tc ng c. Mch cu H Mch cu H l mt trong nhng mch ph bin iu khin ng c mt chiu, s d gi l mch cu H v mch c hnh ch H. S nguyn l ca mch cu H nh sau :


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C 4 kha chuyn 1,2,3,4. Ti mt thi im lun lun c 2 kha m v 2 kha ng. Gi s kha 1 v kha 4 ng, dng in chy qua ng c s chy t tri qua phi, ng c s quay theo 1 chiu. Nu kha 2 v 3 ng, dng in i qua ng c s c chiu t phi qua tri, nh vy ng c s quay theo chiu ngc li Trnh hai kha 1 v 3 hoc 2 kha 2 v 4 cng ng, nh vy s gy ra hin tng on mch. Nh vy vi vic thay i vic ng m cc van, chng ta c th thay i chiu quay ca ng c. By gi chng ta cn iu khin tc ng c, gi s chng ta cho 2 van 1 v 4 cng ng m lin tc (ging nh phn PWM), in p t ln ng c s c dng xung, nu tc ng m thp, ng c s quay git cc v lc c in p, lc khng c in p. Nu tc ng m cao (khong trn 15KHz) th do qun tnh nn chng ta s thy ng c quay trn u. Trong thc t, cc kha chuyn trong hnh trn c th dng cc transistor, hay Mostfet, khng nn dng relay, v relay c tc ng m thp.


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2. V d minh ha Sau y l s nguyn l 1 van ca module iu khin ng c c s dng trong v d :

Mch trn s dng Mosfet iu khin ng c, diode D11 c tc dng bo v cho FET, Opto Op6 c tc dng cch li mch ng c vi mch iu khin, iu ny s m bo an ton cho phn mch iu khin. on chng trnh sau s minh ha vic iu khin ng c 1 chiu quay thun, quay ngc :


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Bi tp c th iu khin c tc ng c 1 chiu, chng ta thay i in p cp vo chn MotorPWM bng cch iu xung thng qua module PWM ca vi iu khin. Bi tp dnh cho bn l hy vn dng bi hc v timer, thit lp ch PWM iu khin tc ng c.


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BI 16 : GIAO TIP VI GLCD - C bn v GLCD - V d minh ha

1. C bn v GLCD Graphic LCD (gi tt l GLCD) loi chm khng mu l cc loi mn hnh tinh th lng nh dng hin th ch, s hoc hnh nh. Khc vi Text LCD, GLCD khng c chia thnh cc hin th cc m ASCII v GLCD khng c b nh CGRAM (Character Generation RAM). GLCD 128x64 c 128 ct v 64 hng tng ng c 128x64=8192 chm (dot). Mi chm tng ng vi 1 bit d liu, v nh th cn 8192 bits hay 1024 bytes RAM cha d liu hin th y mi 128x64 GLCD. Ty theo loi chip iu khin, nguyn l hot ng ca GLCD c th khc nhau, bi ny s gii thiu loi GLCD c iu khin bi chip KS0108 ca Samsung, c th ni GLCD vi KS0108 l ph bin nht trong cc loi GLCD loi ny (chm, khng mu)

Hnh nh GLCD Chip KS0108 ch c 512 bytes RAM (4096 bits = 64x64) v v th ch iu khin hin th c 64 dng x 64 ct. iu khin GLCD 168x64 cn 2 chip KS0108, v thc th trong cc loi GLCD c 2 chip KS0108, GLCD 128x64 do tng t 2 GLCD 64x64 ghp liGIO TRNH VI IU KHIN AVR

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Cc GLCD 128x64 dng KS0108 thng c 20 chn trong ch c 18 chn l thc s iu khin trc tip GLCD, 2 chn (thng l 2 chn cui 19 v 20) l 2 chn Anode v Cathode ca LED nn. Trong 18 chn cn li, c 4 chn cung cp ngun v 14 chn iu khin+d liu. Khc vi cc Text LCD HD44780U, GLCD KS0108 khng h tr ch giao tip 4 bit, do bn cn dnh ra 14 chn iu khin 1 GLCD 128x64.

S chn GLCD Chn VSS c ni trc tip vi GND, chn VDD ni vi ngun +5V, mt bin tr khong 20K c dng chia in p gia Vdd v Vee cho chn Vo, bng cch thay i gi tr bin tr chng ta c th iu chnh tng phn ca GLCD. Cc chn iu khin RS, R/W, EN v cc ng d liu c ni trc tip vi vi iu khin. Ring chn Reset (RST) c th ni trc tip vi ngun 5V. EN (Enable): cho php mt qu trnh bt u, bnh thng chn EN c gi mc thp, khi mt thc hin mt qu trnh no (c hoc ghi GLCD), cc chn iu khin khc s c ci t sn sng, sau kch chn EN ln mc cao. Khi EN c ko ln cao, GLCD bt u lm thc hin qu trnh c yu cu, chng ta cn ch mt khong thi gian ngn cho GLCD c hoc gi d liu. Cui cng l ko EN xung mc thp kt thc qu trnh v cng chun b chn EN cho qu trnh sau ny. RS (Register Select): l chn la chn gia d liu (Data) v lnh (Instruction), v th m trong mt s ti liu bn c th thy chn RS c gi l chn DI (Data/Instruction Select). Chn RS=1 bo rng tn hiu trn cc ng DATA


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(D0:7) l d liu ghi hoc c t RAM ca GLCD. Khi RS=0, tn hiu trn ng DATA l mt m lnh (Instruction). RW (Read/Write Select): chn la gia vic c v ghi. Khi RW=1, chiu truy cp t GLCD ra ngoi (GLCD->AVR). RW=0 cho php ghi vo GLCD. Giao tip vi GLCD ch yu l qu trnh ghi (AVR ->GLCD), ch duy nht trng hp c d liu t GLCD l c bit BUSY v c d liu t RAM. c bit BUSY th chng ta kho st cho Text LCD, bit ny bo GLCD c ang bn hay khng, vic c ny s c dng vit hm wait_GLCD. c d liu t RAM ca GLCD l mt kh nng mi m Text LCD khng c, bng vic c ngc t GLCD vo AVR, chng ta c th thc hin nhiu php logic hnh (hay mt n, mask) lm cho vic hin th GLCD thm th v. CS2 v CS1 (Chip Select): nh ti trnh by trong phn trn, mi chip KS0108 ch c kh nng iu khin mt GLCD c kch thc 64x64, trn cc GLCD 128x64 c 2 chip KS0108 lm vic cng nhau, mi chip m nhim mt na LCD, 2 chn CS2 v CS1 cho php chn mt chip KS0108 lm vic. Thng thng nu CS2=0, CS1=1 th na tri c kch hot, ngc li khi CS2=1, CS1=0 th na phi c chn. Chng ta s hiu r hn cch phi hp lm vic ca 2 na GLCD trong phn kho st b nh ca LCD. T chc b nh. Chip KS0108 c mt loi b nh duy nht l RAM, khng c b nh cha b font hay cha m font t to nh chip HD44780U ca Text LCD. V vy, d liu ghi vo RAM s c hin th trc tip trn GLCD. Mi chip KS0108 c 512 bytes RAM tng ng vi 4096 chm trn mt na (64x64) LCD. RAM ca KS0108 khng cho php truy cp tng bit m theo tng byte, iu ny c ngha l mi ln chng ta vit mt gi tr vo mt byte no trn RAM ca GLCD, s c 8 chm b tc ng, 8 chm ny nm trn cng 1 ct. V l do ny, 64 dng GLCD thng c chia thnh 8 pages, mi page c cao 8 bit v rng 128 ct (c 2 chip gp li). Hnh 3 m t b mt mt GLCD v cng l cch sp xp RAM ca cc chip KS0108. T chc RAM ca 2 chip KS0108 tri v phi hon ton tng t, vic c hay ghi vo RAM ca 2 chip cng c thc hin nh nhau. Chng ta s chn na tri GLCD kho st. Nh bn thy trn hnh 3, 64 dng t trn xung di c chia thnh 8 dy m ta gi l 8 pages. Page trn cng l page 0 v page di cng la page 7. Trong cc GLCD, page cn c gi l a ch X (X


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address), hay ni cch khc X=0 l a ch ca page trn cng, tng t nh th, X=7 l a ch ca page di cng. Mi page cha 64 ct (ch xt 1 chip KS0108), mi ct l mt byte RAM 8 bit, mi bit tng ng vi 1 chm trn LCD, bit c trng s thp (LBS - tc bit D0 nh trong hnh 3) tng ng vi chm trn cao nht. Bit c trng s cao nht (MBS - tc bit D7 nh trong hnh 3) tng ng vi chm thp nht trong 1 page. Th t cc ct trong 1 page gi l a ch Y (Y address), nh th ct u tin c a ch Y = 0 trong khi ct cui cng c a ch Y l 63. Bng cch phi hp a ch X v a ch Y chng ta xc nh c v tr ca byte cn c hoc ghi. Chip KS0108, tt nhin, s h tr cc lnh di chuyn n a ch X v Y ghi hay c RAM Tp lnh cho chip KS0108. So vi HD44780U ca Text LCD, lnh cho KS0108 ca GLCD n gin v t hn v v th vit chng trnh iu khin GLCD cng tng i d hn Text LCD. C tt c 7 lnh (Instruction) c th giao tip vi KS0108. Ti s ln lt gii thch ngha v cch s dng ca tng lnh. Display ON/OFF Hin th GLCD: lnh ny cho php GLCD hin th ni dung trn RAM ra b mt GLCD. vit lnh ny cho GLCD, 2 chn RS v RW cn c ko xung mc thp (RS=0: y l Instrucion, RW=0: AVR->GLCD). M lnh (code) c cha trong 7 bit cao (D7:1) v bit D0 cha thng s. Quan st bng 2, d thy m lnh nh phn cho Display ON/OFF l 0011111x (0x3E+x) trong x=1: cho php GLCD hin th, x=0: tt hin th. Set Address chn a ch: ng hn y l lnh chn ct hay chn a ch Y. Hai bit D7 v D6 cha m lnh (01000000=0x40=64) v 6 bit cn li cha ch s ca ct mun di chuyn n. Ch l mi na GLCD c 64 ct nn cn 6 bit cha ch s ny (26=64). Vy lnh ny c dng 0x40+Y. V d nu chng ta mun di chuyn n ct 36 chng ta ghi vo GLCD m lnh: 0x40+36. Hai chn RS v RW c gi mc thp khi thc hin lnh ny. Set Page chn trang: lnh cho php chn page (hay a ch X) cn di chuyn n, do GLCD ch c 8 pages nn ch cn 3 bit cha a ch page. M lnh cho lnh ny c dng 0xB8+X. Trong bin X l ch s page cn di chuyn n. Hai chn RS v RW c gi mc thp khi thc hin lnh ny.


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Display Start Line chn line u tin: hay cn gi l lnh cun, lnh ny cho php di chuyn ton b hnh nh trn GLCD (hay RAM) ln pha trn mt s dng no , chng ta gi l LOffset. S lng LOffset c th t 0 n 63 nn cn 6 bit cha gi tr ny. M lnh Display Start Line c dng 0xC0+LOffset. Hai chn RS v RW c gi mc thp khi thc hin lnh ny. Khi di chuyn GLCD ln pha trn, phn d liu pha trn b che khut s cun xung pha di. Hnh 5 l mt v d cun GLCD ln 20 dng. Status Read c trng thi GLCD: y l mt trong 2 lnh c t GLCD. Cng ging nh vi Text LCD, lnh c trng thi GLCD ch yu xt bit BUSY (bit th 7) xem GLCD c ang bn hay khng, lnh ny s c dng vit mt hm wait_GLCD ch cho n khi GLCD rnh. V y l lnh c t GLCD nn chn RW phi c set ln mc 1 trc khi thc hin, chn RS vn mc thp (c Instruction). Write Display Data ghi d liu cn hin th vo GLCD hay RAM: v y l 1 lnh ghi d liu hin th nn chn RS cn c set ln 1 trc khi thc hin, chn RW gi mc 0. Lnh ny cho php ghi mt byte d liu vo RAM ca KS0108 v cng l d liu s hin th ln GLCD ti v tr hin hnh ca 2 con tr a ch X v Y. 8 bit d liu ny s tng ng vi 8 chm trn ct Y page X. Ch l sau lnh Write Display Data, a ch ct Y t ng c tng ln 1 v v th nu c mt d liu mi c ghi, d liu mi s khng ln d liu c. Vic tng t ng a ch Y rt c li cho vic ghi d liu lin tip, n gip gim thi gian set li a ch ct Y. Sau khi thc hin ghi ct Y=63 (ct cui cng trong 1 page, i vi 1 chip KS0108), Ys v 0. Read Display Data c d liu hin th t GLCD (cng l d liu t RAM ca KS0108): lnh c ny mi so vi Text LCD, n cho php chng ta c ngc 1 byte d liu t RAM ca KS0108 ti v tr hin hnh v AVR. Sau khi c c gi tr ti v tr hin hnh, chng ta c th thc hin cc php Logic nh o bit, or hay andlm tng kh nng thao tc hnh nh. Trc khi thc hin c chng ta cn di chuyn n v tr mun c bng 2 lnh set a ch X v Y, sau khi c gi tr a ch page X v ct Y khng thay i, do nu c tip m khng di chuyn a ch th vn thu c gi tr c.


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2. V d minh ha Phn ny s trnh by v d minh ha giao tip vi GLCD, cc hm giao tip vi GLCD c vit trong file myglcd.c, s chn ni cng th hin r trong file myglcd.h, sau y l chng trnh :

Bi tp Da vo driver cung cp trn, bn hy lp trnh hin th cc hnh 2D nh hnh ch nht, hnh vung, hnh trn


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