ADV7511 HARDWARE USERS GUIDE
Page 2 of 58 Rev D
REVISION HISTORY 2/10Rev 0 5/10 Rev A
Section Change Description
Throughout document S/PDIF to SPDIF for consistency
Section 4: Table 1 under DIGITAL OUTPUTS, listed SPDIF_OUT referenced to 3.3V MVDD
Section 5: Figure 6 - Changed DVDD_3V to MVDD
Section 5: Table 3 Add description to SPDIF_OUT showing it to be 3.3V logic
Section 6.1.3 Edited to add mention of AES3 support
Section 18.104.22.168 Expanded description of MCLK internal generation
Section 6.2.1 Edited to indicate that SPDIF_OUT is 3.3V logic level.
Section 6.8 Moved Power Supply Domain figure to this section. Edited description to add PVDD, BGVDD and PLVDD.
Section 6.8.2 Edited to explain SPDIF high power and low power
Section 7.4, Section 7.5
Added text to show that both pins require pull up.
Section 7.7 Figure 26 edited to correct CEC pin name. Rev B 8/10 Section Change Description
Front page Add after HDMI; remove reference to HDMI revision
Last page Add statement regarding I2C, Philips, NXT and HDMI
Rev C 3/11 Section Change Description
All document Removed ADI Confidential reference
Table 1 Added footnote to setup and hold times
Rev D 7/11 Section Change Description
Figure 19 Corrected Mux select bit table