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TABLE OF CONTENTS1. INTRODUCTION...................................................................................................................... 5
1.1. General Block Diagram.................................................................................................. 61.2. MB62 Placement of Blocks............................................................................................ 7
1. TUNER(TU3)............................................................................................................................. 81.1. General description of Sony RE216:.............................................................................. 8
2. AUDIO AMPLIFIER STAGE WITH AZAD2102(U163, U164) ........................................... 102.1. General Description...................................................................................................... 102.2. Features ........................................................................................................................ 112.3. Absolute Ratings .......................................................................................................... 122.3.1. Electrical Characteristics.......................................................................................... 122.3.2. Operating Specifications .......................................................................................... 132.4. Pinning ......................................................................................................................... 14
3. AUDIO AMPLIFIER STAGE WITH TPA3113(U168) ......................................................... 143.1. General Description...................................................................................................... 143.2. Features ........................................................................................................................ 153.3. Absolute Ratings .......................................................................................................... 153.3.1. Electrical Characteristics.......................................................................................... 153.3.2. Operating Specifications .......................................................................................... 163.4. Pinning ......................................................................................................................... 16
4. POWER STAGE ...................................................................................................................... 174.1. Power Management...................................................................................................... 20
5. MICROCONTROLLER MSTAR(U5) ................................................................................. 225.1. Description ................................................................................................................... 22
MSD9WB9PT-2 (Main IC) (U5) ................................................................................................. 225.2. MSTAR Block Diagram............................................................................................... 265.3. Reset Circuit ................................................................................................................. 27
6. CI INTERFACE....................................................................................................................... 27CI Interface Power Switch: ...................................................................................................... 27Pinning: .....................................................................................Error! Bookmark not defined.
7. USB INTERFACE ................................................................................................................... 288. DDR2 SDRAM K4T1G164QF (U155) ............................................................................... 29Description: .................................................................................................................................. 29
Features: ................................................................................................................................... 29Pinning: .................................................................................................................................... 30
9. SCALER AND LVDS SOCKETS........................................................................................... 319.1. LVDS sockets Block Diagram ..................................................................................... 319.2. Panel Supply Switch Circuit ........................................................................................ 31
10. SPI FLASH MEMORY - MX25L1005 (U158)................................................................... 3210.1. General Description...................................................................................................... 3210.2. Features ........................................................................................................................ 3210.3. Absolute Maximum Ratings......................................................................................... 3310.4. Pinning ......................................................................................................................... 33
11. NAND FLASH MEMORY NAND512XXA2C (U162) .................................................. 3411.1. General Description...................................................................................................... 3411.2. Features ........................................................................................................................ 3411.3. Pinning ......................................................................................................................... 35
12. LNBH23L (U6) ................................................................................................................ 36Description: .................................................................................................................................. 36
Features: ................................................................................................................................... 36 Complete interface between LNB and IC bus................................................................. 36 Built-in DC-DC converter for single 12 V supply operation and high efficiency (typ. 93% @ 0.5 A)........................................................................................................................... 36 Selectable output current limit by external resistor.......................................................... 36 Compliant with main satellite receivers output voltage specification.............................. 36 Auxiliary modulation input (EXTM pin) facilitates DiSEqC 1.X encoding................ 36 Accurate built-in 22 kHz tone generator suits widely accepted standards....................... 36 Low-drop post regulator and high efficiency step-up PWM with integrated power NMOS allow low power losses ............................................................................................................ 36 Overload and over-temperature internal protections with IC diagnostic bits ................. 36 LNB short circuit dynamic protection.............................................................................. 36 +/- 4 kV ESD tolerant on output power pins.................................................................... 36
13. LM1117(U175, U180, U181)............................................................................................... 4013.1. General Description...................................................................................................... 4013.2. Features ........................................................................................................................ 4013.3. Applications ................................................................................................................. 4013.4. Absolute Maximum Ratings......................................................................................... 4013.5. Pinning ......................................................................................................................... 41
14. MP2012 (U176).................................................................................................................... 4114.1. General Description...................................................................................................... 4114.2. Features ........................................................................................................................ 4114.3. Pinning ......................................................................................................................... 41
15. RTA8283A (U23, U173)...................................................................................................... 4215.1. General Description...................................................................................................... 4215.2. Features ........................................................................................................................ 4215.3. Pinning ......................................................................................................................... 42
16. MP1583 (U174).................................................................................................................... 4316.1. General Description...................................................................................................... 4316.2. Features ........................................................................................................................ 4316.3. Pinning ......................................................................................................................... 44
17. FDC642 ................................................................................................................................ 4417.1. General Description...................................................................................................... 4417.2. Features ........................................................................................................................ 4417.3. Pinning ......................................................................................................................... 45
18. FDC604P.............................................................................................................................. 4518.1. General Description...................................................................................................... 4518.2. Features ........................................................................................................................ 4518.3. Pinning ......................................................................................................................... 45
19. CONNECTORS ................................................................................................................... 4619.1. SCART (SC1) .............................................................................................................. 4619.2. HDMI (CN707,CN708) ............................................................................................... 4619.3. VGA (CN711) .............................................................................................................. 47
20. SERVICE MENU SETTINGS............................................................................................. 4820.1. Video Settings .............................................................................................................. 4920.2. Audio Settings .............................................................................................................. 5020.3. Options ......................................................................................................................... 5120.4. Tuning Settings ............................................................................................................ 5320.5. Source Settings ............................................................................................................. 54
20.6. Diagnostic..................................................................................................................... 5520.7. USB Operations............................................................................................................ 55
21. SOFTWARE UPDATE........................................................................................................ 5622. TROUBLESHOOTING ....................................................................................................... 57
22.1. No Backlight Problem.................................................................................................. 5722.2. CI Module Problem...................................................................................................... 5822.3. Led Blinking Problem .................................................................................................. 6022.4. IR Problem ................................................................................................................... 6022.5. Keypad Touchpad Problems ........................................................................................ 6122.6. USB Problems .............................................................................................................. 6222.7. No Sound Problem ....................................................................................................... 6222.8. No Sound Problem at Headphone ................................................................................ 6322.9. Standby On/Off Problem.............................................................................................. 63DVD Problems ......................................................................................................................... 6422.10. No Signal Problem ................................................................................................... 65
1. INTRODUCTION
17MB62 mainboard is driven by MStar SOC. This IC is capable of handling Video and audio processing, Scaling-Display processing, 3D comb filter, OSD and text processing, LVDS transmitting, channel and MPEG2/4 decoding, integrated DVB-T/C demodulatorand media center functionality.
TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards as B/G, D/K, I/I, and L/L including German and NICAM stereo. Also DVB T, DVB-C are supported internal demoulators of Mstar IC and DVB-S/S2 is supported with externall demodulator.
Sound system output is supplying max. 2x2,5W ( less 10%THD at max output) with 4speakers or 2x6W for stereo 8 speakers.
Supported peripherals are:
1 RF input VHF I, VHF III, UHF @ 75Ohm(Common)1 Side AV (CVBS, R/L_Audio)1 SCART socket(Common)1 YPbPr (Optional)1 PC input(Common)2 HDMI 1.3 input(1 HDMI input is common, 1 input is optional)1 S/PDIF output(Optional)1 Headphone(Optional)1 Common interface(Common)1 USB(Common) 1 DVD(Optional)1 On-board Keypad(Optional)1 External Keypad(Optional)1 External TouchPad(Optional)
1.1.General Block Diagram
1.2.MB62 Placement of Blocks
Main IC (U5)
Tuner(T3)
Nand Flash(U162)
SPIFlash
DDR2RAM(U155)
LVDS Connectors
DVD Connector
ExternalKeyboardTouchboard
Power Connector
Satellite Tuner
KeypadYPbPr SAV HP
USB
HDMI Connectors
VGA
SCARTConnector
SPDIFOut
Adapter DC Input
SpeakerCon.
LedCon
Inv.Con
Sat Demod
CI Connector
1. TUNER(TU3)A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3 Bands(From 48MHz to 862MHz for COFDM, from 45.25MHz to 863.25MHz for CCIR CH). The tuning is available through the digitally controlled I2C bus (PLL). Below you will find info about the tuner.
In active antenna option, the following circuit are used. ANT_CTRL pin is controlled by microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high, ANT_PWR will be high.
OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT is low, ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is done by circuits and microcontroller.
1.1. General description of Sony RE216:The SUT-RE216 is designed for terrestrial TV (digital & analog) and digital cable reception. It includes a full band tuner and a channel filtering for digital signals. It provides a low IF output after channel filtering to drive a channel demodulator. Tuning, band switching and initialization are made via an I2C bus interface. The module is built on a low-loss printed circuit board carrying all the components in a metal housing frame with top and rear covers. The single aerial connector is mounted on one frame side and all other connections are made via pins at the bottom.
Features:
Full frequency range from 47 to 870 Mhz Digital Platform (DVB-T/T2, DVB-C, ISDB-T & ATSC) Analog platforms (PAL B/G/I/D/K, NTSC M & SECAM L/L) Low IF tuner concept
Programmable channel Filter bandwidth Fully I2C bus controlled For Hybrid TV applications
---Pinning Table
and Application Block Diagram of Tuner---
2. AUDIO AMPLIFIER STAGE WITH AZAD2102(U163, U164)
2.1. General Description17MB62 uses two 2,5W Class D Mono Audio Amplifers for from 16 to 24 TVs. AZAD2102B is a 2.9 Watts (max. can offer 3.0 Watts @ Load = 3,THD=10%, AVdd=DVdd=5.5Volt)with high efficiency filter-free class-D audio power amplifier in a 1613 mm x 1613 mm wafer chip scale package (WCSP). AZAD2102B uses Current-switch technology to achieve high performance class-d amplifier that features 0.03% THD, 85% efficiency, 70 dB PSRR, to improve RF-rectification immunity.
AZAD2102B provide a Vibration-Spectrum modulation clock for PWM Output. This vibration frequency is around 10KHZ shift (+/- 5KHZ of Fpwm).
The advantage of the small size package (WCSP) makes AZAD2102B very suitable for mobile phone and PDA device application. And the Class-D amplifier structure let AZAD2102B to have highly efficiency power consumption than Class-AB amplifier. AZAD2102B can shrink the application board, reduce system cost, and external components.
ESD level protection I/O embedded in AZAD2102B. For general applications, doesnt need to add extra ESD protection device (like Varistors) in application system for AZAD2102Bs I/O.
2.2. Features CMOS Technology High Efficiency 85% High PSRR 70dB at 217Hz Differential OP-amp Input AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI Provide Mute function(set Mute_B to GND will go into Mute status) For the input stage AZAD2102B built-in a 10Kohm resistors (Gain setting=29.5dB) Maximum Battery Life and Minimum Heat Efficiency With an 8- Speaker: 3.5 mA Quiescent Current Output Power at 10% THD 2.85Watts at AVdd=DVdd=5.0Volt, Rload=4 1.45Watts at AVdd=DVdd=3.6Volt, Rload=4 0.30Watts at AVdd=DVdd=3.0Volt, Rload=4 1.75Watts at AVdd=DVdd=5.5Volt, Rload=8 0.87Watts at AVdd=DVdd=3.6Volt, Rload=8 0.41Watts at AVdd=DVdd=3.0Volt, Rload=8 Eliminate Power on and Power-off Pop noise A Fewer External Components Optimized PWM Output Stage Eliminates LC Output Filter Internally generate 290 kHz Switching Frequency to eliminate Capacitor and
Resistor Improve PSRR (70 dB) and Wide Supply Voltage (3.0 V to 5.5 V) Fully Differential Design Reduces RF Rectification This chip has been built-in a very strong ESD protection. System level ESD 4KV (IEC 61000-4-2 ESD Contact Level) Wafer Chip Scale Package (WCSP) TSSOP Package with Exposed Pad
2.3. Absolute Ratings
2.3.1. Electrical Characteristics
2.3.2. Operating Specifications
2.4. Pinning
3. AUDIO AMPLIFIER STAGE WITH TPA3113(U168)
3.1. General Description17MB62 uses a 6W Class D Mono Audio Amplifers for from 26 to 32 TVs. The TPA3113D2 is a 6-W (per channel) efficient, Class-D audio power amplifier for driving bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements. SpeakerGuard speaker protection circuitry includes an adjustable power limiter and aDC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage rail lower than the chip supply to limit the amount of current through the speaker. The DC detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs.
The TPA3113D2 can drive stereo speakers as low as 4 . The high efficiency of the TPA3113D2, 87%, eliminates the need for an external heat sink whenplaying music.
The outputs are also fully protected against shorts to GND, VCC, and output-to-output. The short-circuit protection and thermal protection includes an auto-recovery feature.
3.2. Features 6-W/ch into an 8- Loads at 10% THD+N From a 10-V Supply 12-W into a 4- Mono Load at 10% THD+N From a 10-V Supply 87% Efficient Class-D Operation Eliminates Need for Heat Sinks Wide Supply Voltage Range Allows Operation from 8 V to 26 V Filter-Free Operation SpeakerGuard Speaker Protection Includes Adjustable Power Limiter plus DC
Protection Flow Through Pin Out Facilitates Easy Board Layout Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto
Recovery Option Excellent THD+N / Pop-Free Performance Four Selectable, Fixed Gain Settings Differential inputs
3.3. Absolute Ratings
3.3.1. Electrical Characteristics
3.3.2. Operating Specifications
3.4. Pinning
4. POWER STAGE
The DC voltages required at various parts of the chassis and panel are provided by a main power supply unit. MB62 chassis can operate with IPS60, IPS16, IPS17, PW26, PW27 as main power supply and also with 12V adaptor.
CN706 is used for IPS60, IPS16 and IPS17 and CN1 is used for PW26 and PW27.
JK9 is used for the adapter option and also CN705 inverter socket or DB32 chassis with CN706 is used to supply backlight.
The power supplies generate 18V, 12V, 5V, 3,3V and 12V, 5V, stand by mode DC voltages. Power stage which is on-chassis generates 5V, 3V3 stand by voltage and 12V, 8V, 5V, 3V3, 2.5V, 1,8V and 1,2V supplies for other different parts of the chassis. Chassis block diagram is indicated below.
The blocks on power block diagram is using dependent to main supply. For PW26 and PW27 just common blocks are enough for proper operation.
For IPS16, IPS17, IPS60 below blocks must work properly.
For adopter case also below blocks are necessary.
Short CCT Protection Circuit
Short circuit protection is necessary for protecting chassis and main IC against damages when any Vcc supply shorts to ground. Protect pin should be logic high while normal operation. When there is a short circuit protect pin shold be logic low. After any short detection, SW forces LEDs on LED card to blink.
4.1.Power Management
---MB62 Power Management with Adaptor---
---MB62 Power Management with PW25/ PW26---
---MB62 Power Management with IPS16/IPS17/IPS60/PW05---
---MB62 Power Management with PW03/PW04/PW07---
5. MICROCONTROLLER MSTAR(U5)
5.1.Description
MSD9WB9PT-2 (Main IC) (U5)
The MSD9WB9PT-2 is MStars most up-to-date system-on-chip solution for flat panel integrated digital television products. Building on the success of MStars preceding SOC series, the MSD9WB9PT-2 provides most cost-effective solution for DTV application with creative and attractive features exclusively presented by MStar.The MSD9WB9PT-2 integrates DTV/multi-media all-purpose AV decoder, DVB-T demodulator, VIF demodulator, and Sound/Video processor into a single device. This allows the overall BOM to be reduced significantly making the MSD9WB9PT-2 a very competitive multi-media DTV solution. For ATV users, the MSD9WB9PT-2 provides multi-standard analog TV support with adaptive 3D video decoding and VBI data extraction. The build-in audio decoder is capable of decoding FM, AM, NICAM, A2, BTSC and EIA-J sound standards. The MSD9WB9PT-2 supplies all the necessary A/V inputs and outputs to complete a receiver design including a multi-port HDMI receiver and component video ADC. All input selection multiplexed for video and audio are integrated, including full SCART support with CVBS output. The equipped MStar MACE-5 color engine is the latest masterpiece fromMStar famous color engine series providing excellent video and picture quality in Full-HD and large-scale displaying system. To meet the increasingly popular energy legislative requirements without the use of additional hardware, the MSD9WB9PT-2 has an ultra low power standby mode during which an embedded MCU can act upon standby events and wake up the system as required.
The MSD9WB9PT-2 is composed of several modules:
High Performance Micro-processor Ultra high speed/performance 32-bit RISC CPU One full duplex UARTs Supports USB and ISP programming DMA Engine
Transport Stream De-multiplexer Supports parallel and serial TS interface, with or without sync signal Supports TS input and output for external CI module Maximum TS data rate is 104 Mb/sec for serial or 16 MB/sec for parallel 32 general purpose PID filters and section filters for each transport stream de-
multiplexer Supports additional audio/video/PCR filters Supports TS DMA channel for time-shift Supports 3DES/DES and AES encryption/decryption
MPEG-2 Video Decoder ISO/IEC 13818-2 MPEG-2 video MP@HL Automatic frame rate conversion Supports resolution up to HDTV (1080i, 720p) and SDTV
MPEG-4 Video Decoder ISO/IEC 14496-2 MPEG-4 ASP video decoding Supports resolutions up to HDTV (1080p@30fps) Supports DivX1 Home Theater & HD profilesOptional Supports VC-1Optional, FLV video format decoding
Hardware JPEG Supports sequential mode, single scan Supports both color and grayscale pictures Following the file header scan the hardware decoder fully handles the decode
process Supports programmable Region of Interest (ROI) Supports formats: 422/411/420/444/422T Supports scaling down ratios: 1/2, 1/4, 1/8 Supports picture rotation
NTSC/PAL/SECAM Video Decoder Supports NTSC-M, NTSC-J, NTSC-4.43, PAL (B, D, G, H, M, N, I, Nc), and SECAM standards Automatic standard detection Motion adaptive 3D comb filter Five configurable CVBS & Y/C S-video inputs Supports Teletext, Closed Caption (analog CC 608/ analog CC 708/digital CC
608/digital CC708), V-chip and SCTE
Multi-Standard TV Sound Processor SIF audio decoding Supports BTSC/A2/EIA-J demodulation Supports NICAM/FM/AM demodulation Supports MTS Mode Mono/Stereo/SAP in BTSC/ EIA-J mode Supports Mono/Stereo/Dual in A2/NICAM mode Built-in audio sampling rate conversion (SRC) Audio processing for loudspeaker channel, including volume, balance, mute, tone,
EQ,virtual stereo/surround and treble/bass controls Advanced sound processing options available,for example: SRS1, BBE2,
QSound3, Audyssey4 Supports digital audio format decoding:
MPEG-1, MPEG-2 (Layer I/II), MP3, Dolby Digital (AC-3), AAC-LCSupportsOptional Dolby Digital Plus, Dolby mPulse, and MS10 multistream decoder, including Dolby Digital Encoder for transcoding streams to Dolby Digital 5.1 (DDCO)
Supports MPEG Audio, Dolby Digital, Dolby Digital Plus format AD (Audio Description)
Supports PVR and time-shiftingAudio Interface
One SIF audio input interface with minimal external saw filters Four L/R audio line-inputs Two L/R outputs for main speakers and additional line-outputs Supports stereo headphone driver
I2S digital audio input & output S/PDIF digital audio output HDMI audio channel processing Programmable delay for audio/video synchronization
Analog RGB Compliant Input Port Three analog ports support up to 1080P Supports PC RGB input up to SXGA@75Hz Supports HDTV RGB/YPbPr/YCbCr Supports Composite Sync and SOG Sync-on-Green Automatic color calibration AV-link support
Analogue RGB Auto-Configuration & Detection Auto input signal format and mode detection Auto-tuning function including phasing, positioning, offset, gain, and jitter detection Sync Detection for H/V Sync
DVI/HDCP/HDMI Compliant Input Port Two HDMI/DVI Input ports HDMI 1.3 Compliant HDCP 1.1 Compliant 225MHz @ 1080P 60Hz input with 12-bit Deep-color support CEC support Single link DVI 1.0 compliant Robust receiver with excellent long-cable support
MStar Advanced Color Engine (MStarACE-5) 10/12-bit internal data processing Fully programmable multi-function scaling engine
Nonlinear video scaling supports various modes including PanoramaSupports dynamic scaling for VC-1
High-Quality DTV video processor3D motion video deinterlacer with motion object stabilizerEdge-oriented deinterlacer with edge and artifact smootherAutomatic 3:2/2:2/M:N pull-down detection and recovery3D multi-purpose noise reduction for DTV or lousy air/cable inputMPEG artifact removal including de-blocking and mosquito noise reductionArbitrary frame rate conversion
MStar Professional Picture Enhancement:Dynamic brilliant and fresh colorDynamic Blue StretchIntensified contrast and detailsDynamic Vivid SkinDynamic sharpened Luma/Chroma edgesGlobal and local dynamic depth of field perceptionAccurate and independent color controlSupports sRGB and xvYCC color processingSupports HDMI 1.3 deep color format
Programmable 12-bit RGB gamma CLUT
Output Interface Single/dual link 8/10-bit LVDS output Supports panel resolution up to Full-HD (1920x1080) @ 60Hz Supports TH/TI format Supports dithering options to 6/8-bit output Spread spectrum output for EMI suppression
CVBS Video Encoder Supports all NTSC/PAL TV Standard Stand-alone scaling engine Programmable Hue, Contract, Brightness Supports TTX/CC/WSS output
CVBS Video Output Allows CVBS output of all source inputs
2D Graphics Engine Hardware Graphics Engine for responsive Interactive applications Supports point draw, line draw, rectangle draw/fill, text draw and trapezoid draw BitBlt, stretch BitBlt, trapezoid BitBlt, mirror BitBlt and rotate BitBlt Raster Operation (ROP) Support Porter-Duff
VIF Demodulator Compliant with NTSC M/N, PAL B, G/H, I, D/K, SECAM L/L' standards Audio/Video dual-path processor Stepped-gain PGA with 25 dB tuning range and 1 dB tuning resolution Maximum IF gain of 37 dB Programmable TOP to accommodate different tuner gain and SAW filter insertion
loss to optimize noise and linearity performance
Multi-standard processing with single SAW Supports silicon tuner low IF output architecture
DVB-T Demodulator Digital carrier frequency offset correction: 500KHz Optimised for SFN channels with pre/post-cursive echoes inside/outside the guard Acquisition range 857kHz includes up to 3x 1/6 MHz transmitter offset Meets Nordig Unified 1.0.3, D-Book 5.0, EICTA E-Book/C-Book test requirement 400kHz internal carrier offset recovery range 6.8 usecs echo cancellation at 7 Msym/s Supports IF, low-IF, zero-IF inputs Ultra-fast automatic blind UHF/VHF channel scan (constellations and symbol rate)
Connectivity
Two USB 2.0 host ports
USB architecture designed for efficient support of external storage devices in conjunction with
off air broadcastingMiscellaneous
DRAM interface supporting one 16-bit DDR2 @1066MHz Supports PVR Supports Common Interface for conditional access support Bootable SPI interface with serial flash support Parallel interface for external NAND flash support Power control module with ultra low power MCU available in standby mode 380-ball LFBGA package Operating Voltages: 1.26V (core), 1.8V (DDR2), 2.5V and 3.3V (I/O and analog)
5.2. MSTAR Block Diagram
5.3. Reset CircuitReset circuit using for initiliazing main Mstar IC. Reset condition is high and nomal working condition is low for RESET pin.
6. CI INTERFACE
CI Interface Power Switch:
It is used for CI module supply, when Module is inserted (it means CI detect is low) This circuit is opened or closed by CI_POWER_CTRL port of main uController
7. USB INTERFACEMain Concept IC has integrated 2 USB 2.0 interface. One of them is used for ethernet function, the other one is used for USB connectivity for last user. Last user can play video, picture and audio files. Also digital channels can be record to externall storage device by this interface. All SW files can be updated with interface.
USB circuit has 3 main parts Integrated USB 2.0 Host interface of D3K (U5) Protection IC (U145) Over Curent Protection IC (U8)
8. DDR2 SDRAM K4T1G164QF (U155)
Description:
The 1Gb DDR2 SDRAM is organized as a 16Mbit x 8 I/Os x 8 banks, 8Mbit x 16 I/Os x 8 banks device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1066Mb/sec/pin (DDR2-1066) for general applications. The chip is designed to comply with the following key DDR2 SDRAM fea-tures such as posted CAS with additive latency, write latency = read latency - 1, Off-Chip Driver(OCD) impedance adjustment and On Die Termination. All of the control and address inputs are synchronized with a pair of exter-nally supplied differential clocks. Inputs are latched at the crosspoint of dif-ferential clocks (CK rising and CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS) in a source synchronous fash-ion. The address bus is used to convey row, column, and bank address information in a RAS/CAS multiplexing style. For example, 1Gb(x8) device receive 14/10/3 addressing. The 1Gb DDR2 device operates with a single 1.8V 0.1V power supply and 1.8V 0.1V VDDQ. The 1Gb DDR2 device is available in 60ball FBGA(x8) and 84ball FBGA(x16).
Features:
JEDEC standard VDD = 1.8V 0.1V Power Supply VDDQ = 1.8V 0.1V 533MHz fCK for 1066Mb/sec/pin 8 Banks Posted CAS Programmable CAS Latency: 4, 5, 6, 7 Programmable Additive Latency: 3, 4, 5. 6 Write Latency(WL) = Read Latency(RL) -1 Burst Length: 4 , 8(Interleave/nibble sequential) Programmable Sequential / Interleave Burst Mode Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature) Off-Chip Driver(OCD) Impedance Adjustment On Die Termination Special Function Support - PASR(Partial Array Self Refresh) - 50ohm ODT - High Temperature Self-Refresh rate enable Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE < 95 C All of products are Lead-free, Halogen-free, and RoHS compliant
Pinning:
9. SCALER AND LVDS SOCKETS
9.1.LVDS sockets Block Diagram
9.2. Panel Supply Switch CircuitThis switch is used to open and close panel supply of TCON. It is controlled by port of main ucontroller. Also with this circit panel sequency could be adjusted correctly. 3 panel supplys are connected to this circuit. All of them are optional according to panels.
10. SPI FLASH MEMORY - MX25L1005 (U158)
10.1. General Description
MX25L1005 is a CMOS 1,048,576 bit serial Flash memory, which is configured as 131,072 x 8 internally.The MX25L1005 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input. The MX25L1005 provide sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and erase command is executes on chip or sector(4K-bytes) or block(64K-bytes). To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. When the device is not in operation and CS# is high, it is put in standby mode and draws less than 10uA DC current. The MX25L1005 utilize MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.
10.2. Features
Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3 1,048,576 x 1 bit structure 32 Equal Sectors with 4K byte each, Any Sector can be erased individually 2 Equal Blocks with 64K byte each, Any Block can be erased individually Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations Latch-up protected to 100mA from -1V to Vcc +1V Low Vcc write inhibit is from 1.5V to 2.5V
10.3. Absolute Maximum Ratings
RATING VALUEAmbient Operating Temperature
0C to 70C
Storage Temperature -55C to 125CApplied Input Voltage -0.5v to 4.6vApplied Output Voltage -0.5v to 4.6vVCC to Ground Potential -0.5v to 4.6v
10.4. Pinning8-PIN SOP (150mil)
SYMBOL DESCRIPTIONCS# Chip selectSI Serial Data InputSO Serial Data OutputSCLK Clock InputHOLD# Hold, to pause the device without
deselecting the deviceVCC +3.3v Power SupplyGND Ground
11. NAND FLASH MEMORY NAND512XXA2C (U162)
11.1. General Description
The NAND flash 528-byte/ 264-word page is a family of non-volatile flash memories that uses the single level cell (SLC) NAND technology. It is referred to as the small page family.
The NAND512R3A2C, NAND512R4A2C, and NAND512W3A2C have a density of 512 Mbits and operate with either a 1.8 V or 3 V voltage supply. The size of a page is either 528 bytes (512 + 16 spare) or 264 words (256 + 8 spare) depending on whether the device has a x8 or x16 bus width.
The address lines are multiplexed with the Data Input/Output signals on a multiplexed x8 or x16 input/output bus. This interface reduces the pin count and makes it possible to migrate to other densities without changing the footprint.
To extend the lifetime of NAND flash devices it is strongly recommended to implement an error correction code (ECC). The use of ECC correction allows to achieve up to 100,000 program/erase cycles for each block. A write protect pin is available to give a hardware protection against program and erase operations.
11.2. Features High density NAND flash memories
o 512-Mbit memory arrayo Cost effective solutions for mass storage applications
NAND interfaceo x8 or x16 bus widtho Multiplexed address/ data
Supply voltage: 1.8 V, 3 V Page size
o x8 device: (512 + 16 spare) byteso x16 device: (256 + 8 spare) words
Block sizeo x8 device: (16K + 512 spare) byteso x16 device: (8K + 256 spare) words
Page read/programo Random access: 12 s (3 V)/15 s (1.8 V) (max)o Sequential access: 30 ns (3 V)/50 ns (1.8 V) (min)o Page program time: 200 s (typ)
Copy back program mode Fast block erase: 2 ms (typ)
Status register Electronic signature Chip Enable dont care Security features
o OTP area
Serial number (unique ID) option Hardware data protection
o Program/erase locked during power transitions
Data integrityo 100,000 program/erase cycles (with ECC)o 10 years data retention
RoHS compliant packages Development tools
o Error correction code modelso Bad blocks management and wear leveling algorithms
11.3. Pinning
12. LNBH23L (U6)
Description:
Intended for analog and digital satellite receivers,the LNBH23L is a monolithic voltage regulatorand interface IC, assembled in QFN32 5 x 5 specifically designed to provide the 13 / 18 Vpower supply and the 22 kHz tone signalling to the LNB down-converter in the antenna dish or tothe multi-switch box. In this application field, it offers a complete solution with extremely lowcomponent count, low power dissipation together with simple design and IC standard interfacing.
Features:
Complete interface between LNB and IC bus
Built-in DC-DC converter for single 12 V supply operation and high efficiency (typ. 93% @ 0.5 A)
Selectable output current limit by external resistor
Compliant with main satellite receivers output voltage specification
Auxiliary modulation input (EXTM pin) facilitates DiSEqC 1.X encoding
Accurate built-in 22 kHz tone generator suits widely accepted standards
Low-drop post regulator and high efficiency step-up PWM with integrated power NMOS allow low power losses
Overload and over-temperature internal protections with IC diagnostic bits
LNB short circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
Block Diagram:
13. Advanced DVB-S/S2 Demodulator M88DS3002 (U3)
Description:
The M88DS3002 is an advanced single-chip demodulator for digital satellite television broadcasting. It is fully compliant with the DVB-S/S2 standard and can support QPSK, 8PSK, 16APSK and 32APSK demodulation schemes. The chip provides a fast, easy-to-apply and cost-effective front-end solution for digital satellite receiver.The M88DS3002 accepts baseband differential or singleended I and Q signals from a tuner, then digitizes, demodulates and decodes the signals, and finally outputs an MPEG transport stream.The M88DS3002 supports symbol rate from 1 Msps up to 45 Msps, and code rate from 1/4 to 9/10. Its features cover blind scan, fade detection, timing and carrier recovery, performance monitoring, co-channel interference cancellation, command interface, and DiSEqC 2.X interface, etc. The device is controlled via a 2-wire serial bus. The M88DS3002 works properly with 1.25 V and 3.3 V voltage supplies. Typically, the power consumption is around 390 mW. The chip is available in a 64-pin QFNpackage and is RoHS compliant.
Features:
Multi-standard demodulation Compliant with DVB-S/S2 specification QPSK, 8PSK, 16APSK and 32APSK demodulation schemes Maximum channel bit rate is 130 Mbps Maximum symbol rates are: 45 Msps for QPSK and 8PSK; 36 Msps for 16APSK
and 28 Msps for 32APSK
DSP features Symbol rate sweeping I/Q impairment cancellation Automatic spectrum inversion Adaptive equalizer for RF reflection removal Roll-off factor automatic identification Blind scan for programming search High performance on-chip micro-controller Multi-error monitor Accurate SNR estimation Multi-lock indicators Clipping rate reporter DC removal Automatic frequency correction (AFC) Fast timing loop acquisition Robust frame synchronization scheme Phase noise indicator Fast system recovery from fading or other abnormal conditions Co-channel interference cancellation Constellation monitor
Interface DVB-S/S2 common, parallel and serial MPEG output interface compliant 2-wire serial bus to configure the device 2-wire bus repeater for tuner configuration DiSEqC 2.X compliant interface General purpose output (GPO) Dedicated reference clocks (13.5MHz / 27MHz) generation
System On-chip 8-bit ADC On-chip PLL for master clock from a 27 MHz external clock or quartz crystal Sleep mode supported
---Block Diagram of M88DS3002---
Pin Assignment:
14. LM1117(U175, U180, U181)
14.1. General DescriptionThe LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductors industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgapreference to as-sure output voltage accuracy to within 1%. The LM1117 series is available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10F tantalum capacitor is required at the output to improve the transient response and stability.
14.2. Features Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions Space Saving SOT-223 Package Current Limiting and Thermal Protection Output Current 800mA Line Regulation 0.2% (Max) Load Regulation 0.4% (Max) Temperature Range LM1117 0C to 125C LM1117I -40C to 125C
14.3. Applications 2.85V Model for SCSI-2 Active Termination Post Regulator for Switching DC/DC Converter High Efficiency Linear Regulators 15 32 TFT TV Service Manual 10/01/2005 Battery Charger Battery Powered Instrumentation
14.4. Absolute Maximum Ratings
14.5. Pinning
15. MP2012 (U176)
15.1. General DescriptionThe MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM step-down converter. It is ideal for powering portable equipment that runs from a single cell Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can provide up to 1.5A of load current with output voltage as low as 0.8V. It can also operate at 100% duty cycle for low dropout applications. With peak current mode control and internal compensation, the MP2012 is stable with ceramic capacitors and small inductors. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.
15.2. Features 2.7-6V Input Operation Range Output Adjustable from 0.8V to VIN 1A Max Shutdown Current. Up to 95% Efficiency 100% Duty Cycle for Low Dropout Applications 1.2MHz Fixed Switching Frequency Stable with Low ESR Output Ceramic Capacitors Thermal Shutdown Cycle-by-Cycle Over Current Protection Short Circuit Protection Available in 6-pin 3x3mm QFN
15.3. Pinning
Pin #
Name Description
1 FB Feedback input. An external resistor divider from the output to GND, tapped to the FB pin sets the output voltage.
2 GND, Exposed
Pad
Ground pin. Connect exposed pad to ground plane for proper thermal performance.
3 SW Switch node to the inductor.4 PVIN Input supply pin for power FET.5 VIN Input Supply pin for controller. Put small
decoupling ceramic near this pin.6 EN Enable input, High enables MP2012. EN is
pulled to GND with 1Meg internal resistor.
16. RTA8283A (U23, U173)
16.1. General DescriptionThe RT8283A is a high-efficiency, monolithic synchronous step-down DC/DC converter that can deliver up to 3A output current from a 4.5V to 23V input supply. The RT8283A's current mode architecture and external compensation allow the transient response to be optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. The RT8283A also provides output under voltage protection and thermal shutdown protection. The low current (
Pin No. Pin Name
Description
1 BOOT Bootstrap for high-side gate driver. Connect a 0.1F or greater ceramic capacitor from BOOT to SW pins.
2 VIN Input Supply 4.5V to 23V. Must bypass with a suitably large ceramic capacitor.
3 SW Phase Node--Connect to external L-C filter..4, 9 (Exposed
Pad)GND Ground.
5 FB Feedback Input pin is connected to the converter output. It is used to set the output of the converter to regulate to the desired value via an internal res divider. For an adjustable output, an external res divider is connected to this pin.
6 COMP Compensation Node. COMP is used to compensate the regulation Control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required.
7 EN Enable Input Pin. Logic high enables the converter; a logic low forces the RT8253A into shutdown mode. Attach this pin to VIN with a 100k pull up resistor for automatic startup.
8 SS Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start
period. A 0.1F capacitor sets the soft-start period to 13.5ms.
17. MP1583 (U174)
17.1. General DescriptionThe MP1583 is a step-down regulator with a built-in internal Power MOSFET. It achieves 3A of continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. An adjustable soft-start reduces the stress on the input source at start-up. The MP1583 requires a minimum number of external components, providing a compact solution.
17.2. Features 3A Output Current Programmable Soft-Start 100m Internal Power MOSFET Switch Stable with Low ESR Output Ceramic Capacitors Up to 95% Efficiency 20A Shutdown Mode Fixed 385KHz Frequency Thermal Shutdown Cycle-by-Cycle Over Current Protection
Wide 4.75V to 23V Operating Input Range Output Adjustable from 1.22V to 21V Under-Voltage Lockout
17.3. Pinning
Pin No.
Pin Name
Description
1 BOOT High-Side Gate Drive Bootstrap Input. BS supplies the drive for the high-side N-Channel MOSFET switch.
2 IN Power Input. Drive IN with a 4.75V to 23V power source. 3 SW Power Switching Out is the switching node that supplies power to the
output4 GND Ground.5 FB Feedback Input. FB senses the output voltage and regulates it. Drive
FB with a resistive voltage divider from the output voltage. FB threshold is 1.222V.
6 COMP Compensation Node is used to compensate the regulation control loop.
7 EN Enable/UVLO. A voltage greater than 2.71V enables operation. For complete low current shutdown the EN pin voltage needs to be at less than 900mV. When the voltage on EN exceeds 1.2V, the internal regulator will be enabled and the soft-start capacitor will begin to charge. The MP1583 will start switching after the EN pin voltage reaches 2.71V.
8 SS Soft-Start Control Input. SS controls the soft-start period.
18. FDC642
18.1. General DescriptionThis P-Channel 2.5V specified MOSFET is produced using Fairchilds advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance.
These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the larger packages are impractical.
18.2. Features Max rDS(on) = 65 m at VGS = -4.5 V, ID = -4.0 A Max rDS(on) = 100 m at VGS = -2.5 V, ID = -3.2 A Fast switching speed Low gate charge (11nC typical)
High performance trench technology for extremely low rDS(on) SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8);
low profile (1 mm thick) Termination is Lead-free and RoHS Compliant
18.3. Pinning
19. FDC604P
19.1. General DescriptionThis P-Channel 1.8V specified MOSFET uses Fairchilds low voltage PowerTrench process. It has been optimized for battery power management applications.
19.2. Features 5.5 A, 20 V. RDS(ON) = 33 m @ VGS = 4.5 V RDS(ON) = 43 m @ VGS = 2.5 V RDS(ON) = 60 m @ VGS = 1.8 V Fast switching speed. High performance trench technology for extremely low RDS(ON)(S)
19.3. Pinning
20. CONNECTORS
20.1. SCART (SC1)
20.2. HDMI (CN707,CN708)
20.3. VGA (CN711)
21. SERVICE MENU SETTINGSIn order to reach service menu, First Press MENU Then press the remote control codetwo times, which is 4725.
In first screen following items can be seen:
21.1. Video Settings
21.2. Audio Settings
21.3. OptionsOptions-1
Options-2
21.4. Tuning Settings
21.5. Source Settings
21.6. Diagnostic
21.7. USB OperationsUSB operations option can not be used directly. It can be used for updating panel tool, hw congiguration etc.
22. SOFTWARE UPDATE In MB62 project there is only one software. From following steps software update procedure can be seen:
1. MB62_en.bin, mboot.bin and usb_auto_update_T4.txt documents should copy directly inside of a flash memory(not in a folder).
2. Put flash memory to the tv when tv is powered off. 3. Power on the and wait when the tv is opened. 4. If First Time Installition screen comes, it means software update procedure is
succesful.
23. TROUBLESHOOTING
23.1. No Backlight ProblemProblem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin
Backlight pin should be high in open position. If it is low, please check Q181 and panel cables.
Dimming pin should be high or square wave in open position. If it is low, please check S16 for Mstar side and panel or power cables, connectors.
Backlight power supply should be in panel specs. Please check CN705 for MB62, related connectors for power supply cards.
STBY_ON/OFF should be low for standby on condition, please check R1677.
23.2. CI Module ProblemProblem: CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pinsCI supply shoul be 5V when CI module inserted. If it is not 5V please check CI_POWER_CTRL, this pin should be low.
Please check mechanical positions of CI module.
Detect ports should be low. If it is not low please check CI connector pins, CI module pins and 3V3_VCC on MB62.
23.3. Led Blinking ProblemProblem: LED blinking, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multimeter to find the shorted voltage to ground.
23.4. IR ProblemProblem: LED or IR not workingCheck LED card supply on MB62 chasis.
23.5. Keypad Touchpad ProblemsProblem: Keypad or Touchpad is not working
Check keypad supply and KEYBOARD pin on MB62.
23.6. USB ProblemsProblem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V.
23.7. No Sound ProblemProblem: No audio at main TV speaker outputs.
Check supply voltages of VDD_AUDIO, 5V_VCC and 3V3_VCC with a voltage-meter.There may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
23.8. No Sound Problem at HeadphoneProblem: No audio at headphone output.
Check HP detect pin, when headphone is. Check 5V_VCC and 3V3_VCC with a voltage-meter.
23.9. Standby On/Off ProblemProblem:Device cannot boot, TV hangs in standby mode.
There may be a problem about power supply. Check 12V_VCC, 5V_VCC and 3V3_VCC with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW. Additionally it is goood to check SW printouts via hyper-terminal (or Teraterm). These printouts may give a clue about the problem.
DVD ProblemsProblem: DVD is not working.
Check that DVD source is selected in Service menu. Check supply voltage of DVD namely 12V_VCC.
23.10. No Signal ProblemProblem: No signal in TV mode.
Check tuner supply voltage; 3V3_TUN. Check tuner options are correctly set in Service menu. Check AGC voltage at IF_AGC pin of tuner.
4k7
R16
12
5V_VCC
BC848BQ172 ANT_CTRL
FDN336PQ175
10kR1590
3V3_S2_TUN
R15811k
10kR1595
16VC29 10n
S2_AGC
12V_VCC
1kR31
10n 16V
C25
R2210k
R1593
10k
F1
60R
TSMISYNC
TSMICLK
3V3_S2_VDDD
SUT-RE216
TU3
5
4
3
2
1
6
7
8
9IF_AGC
IF_P
IF_N
RESET
ANT-DC
+3V3
SCL
SDA
GND
R321k
C26 16V
10n
3V3_S2_TUN
S2_QP
S2_QN
S2_IN
S2_IP
3V3_S2_TUN
C24
50V
27p
M88DS3002
U3
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
32313029282726252423222120191817
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49505152535455565758596061626364NC5
GPO
VCC_10
NC4
NC3
VDDD_4
NC2
NC1
NC9
NC8
LOCK
VCC_9
LNB_EN
CKXTAL_13
OLF
GNDD
M_CKOUT
M_SYNC
VCC_8
M_VAL
M_ERR
M_DATA7
M_DATA6
VDDD_3
M_DATA5
M_DATA4
VCC_7
M_DATA3
M_DATA2
M_DATA1
M_DATA0
VCC_6
AAGC
SCLT
SDAT
VCC_3
SDA
SCL
VDDD_2
ADDR_SE
L1
ADDR_SE
L0
VCC_4
VSE
L
DISE
QC_I
N
DISE
QC
VCC_5
CKXTAL_27
RESE
T
GNDA_1
XTAL_IN
XTAL_OUT
VDDA_1
GNDA_2
IP
IN
VDDA_2
GNDA_3
QN
QP
NC6
VDDD_1
VCC_1
VCC_2
NC7
LNB_OUT1n
C16
50V 50VC17
1n
50VC18
1n
1V25_S2_VD
DI3V3_S2_TUN
R159410k
27MHz
X1
31 42
50V
C23
27p
OVER_CUR_DETECT
3V3_S2_VDDA
3V3_S2_TUN
3k3R39
C2716V
10n
S5 12
S11 12
C965
16V100n
47RR27
R2847R
S12
12
1V2_VCC
F2
60R
S20
12
3V3_VCC
F3
60R3V3_VCC
10n 16V
C28
100n
10V
C44
10V
C45
100n
SDA_S2_TUN
R3533R
33RR36
SCL_S2_TUN
S2_IP
20k
R1586
C21
50V
27p
27p
50V
C22
3V3_
S2_T
UN
3V3_
S2_T
UN
M88TS2022
U4
28272625242322
21
20
19
18
17
16
15
891011121314
1
2
3
4
5
6
7VDDA2
CK_OUT
IP
IN
VDDA1
QN
QP
VDDA4
TEST
1
TEST
2
TEST
3
VDDA3
XTALN
XTALP
RES
CAP
CKDIV_OPT
RFBYPASS
RESET
LNA_IN
TEST
VDAA5
VDD_DIG
SDA
SCL
VDD_REG
AGC
VDDA6
S138 12
2R1
TH1
CN17
S25
1
2
50V
C62
2p2
C63
2p2 50V
33p
C35 50V
50V
1n
C19
10k
R4
L1
4n7
IF_AGC_TUNER
47R
R15831
2
3
45
6
7
8
R4
R1
R3
R2
TS_MDI3
TS_MDI2
TS_MDI1
TS_MDI4
TS_MDI5
TS_MDI6
TS_MDI7
3V3_S2_VDDA
10p C8
10p C9
S2_INC30
16V
10n
10n C31
16V
C32 10n 16V
S2_QN
10p
C10
C11 10p
S2_QP
3V3_S2_VDDD
10V
C38
100n
1V25_S2_VDDI
1V25_S2_VDDI
3V3_S2_VDDA
10V
C36
100n
100n
C37
10V
SDA_S2_TUN
SCL_S2_TUNR13 4k7
12
4k7
R14
12
3V3_S2_VDDD
C910
10V100n
1
2
TS_MDI0
100n C912
10V1
2
R158447R
1
2
3
45
6
7
8
R4
R1
R3
R2
10kR1597
IF_AGC_MSTC20
50V
1n
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S41
S40
TP471
TP481
TUN_SCL
R2947R
TUN_SDA
TUN_SDA
33p C34
50V
TUN_SCLACTIVE_ANT_SUPPLY
C904100n
10V1
2
TUN_SCL_MST
10V
100n
C52
C53
100n
10V
C54
10V
100n
10V
C55
100n
100n
10V
C56
10V
100n
C57
47RR30
60R
F43V3_VCC
1k
F304
D20
6
C5V
6
TUN_SDA_MST
3V3_S2_TUN
16V22u C60
3V3_S2_VDDD
FK1601
TU1
5
4
3
2
1
6
7
8
9IF_AGC
IF_P
IF_N
CLK_OUT
ANT-DC
VCC
SCL
SDA
GND
ACTIVE_ANT_SUPPLY
C61
6V322u
C5822u 6V3
22u 6V3
C59
3V3_TUNER
DIGITAL_IF_N
DIGITAL_IF_P
IF_AGC_TUNER
27MH
z
X3
31
42
100RR1963
1 2
10n
C33 16V
18p
C72
50V
S2_AGCR442k
R15 4k7
12
3V3_TUNER
IF_AGC_TUNER
3V3_
S2_V
DDD
TSMIVALID
DIGITAL_IF_P
DIGITAL_IF_N
SDA_SYS
SCL_SYS
50V18p
C73
33RR3733RR38
100n
10V
C39
C40
10V
100n
3V3_S2_VDD
D
C46
10V
100n
10V
C47
100n
1V25_S2_VD
DI
DISEQC_OUT
10V
C48
100n
100n
10V
C49
1V25_S2_VD
DI
ACTIVE_ANT_SUPPLY
RESET_S2
C50
100n
10V
1V25_S2_VDDI
1V25_S2_VDDI
1V25_S2_VDDI
3V3_S2_VDDD
47RR26
1V25_S2_VDDI
50V12p
C71
1V25
_S2_
VDDI
3V3_
S2_V
DDD
1V25
_S2_
VDDI
10V
C41
100n
10V
C42
100n
100n
10V
C43
RESET_TUNER
SONY TUNER
NC
NUTUNE/SEMCO/LG
NC
NC
0.5pF
3.3pF
27 MHZ KULLANILACAK
NC
NCNCNCNC
00 SEILDI WRITE:D0H READ:D1H
KONTROL EDILECEK
NC
NC
NUP4004M5
D5
543
2
1CN711
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R1505470R
75R
R1479
12
F179
1k
DVD_IR
DVD_IR_ON/OFF
3V3_VCC4k7R694
12
47k
R498
12
Q157
BC84
8B1
2
3IR_IN
TP2451
CDA4C16GTH
D4
12345 6 7 8
12V_VCC
DVD_CVBS_INR1650180R
75RR1652
S801 2
DVD_WAKEUP
FS1
4A/24VDC1 2
TP2501
R197433R
R197533R
50V
27p C828
12
CN7041 2
3 4
5 6
7 8
9 10R161
64k
71
2
DVD_SPDIF
100RR1624
1 2
10V
100n
C62
8
12
DVD_SENSE
50V
27p
C65
0
12
TP2471
DVD_IR
C972
50V220p R1623
100R
R197633R
TP491
2k7
R1209
TP501
U5
MSD9WB9PT-2
K2
K3
J2
J3
H1
H3
H2
L6
L5
L3
K1
M3
L2
N3
M2
L1
M5
N4
R2
R3
P2
P1
N1
N2
P3
T1
U2
U3
V2
T3
T2
U1VCOM
CVBSOUT0
CVBS4
CVBS3
CVBS2
CVBS1
CVBS0
SOGIN2
BIN2P
BIN2M
GIN2P
GIN2M
RIN2P
RIN2M
VSYNC1
HSYNC1
SOGIN1
BIN1P
BIN1M
GIN1P
GIN1M
RIN1P
RIN1M
VSYNC0
HSYNC0
SOGIN0
BIN0P
BIN0M
GIN0P
GIN0M
RIN0P
RIN0M
5
SCART_AUD_R_IN
RCA_Y
220RR124
C88447n
16V
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50V
C823
27p
12
27p
C829
50V
12
RCA_PR
RCA_PB
JK1
7
6
5
4
3
2
1
TP24
21
TP21
TP31
TP131
R1619
75R
12
S91 2
47n
C88216V
JK3
7
6
5
4
3
2
1
R1621
75R
12
S421 2
JK4
12
34
56
YEL
WHT
RED
VGA_VSNC
VGA_HSNC
5V_VCC
2k7
R1206
D3
CDA4C16GTH
12345 6 7 8 R1265
10k
12
R1310
10k
12
10V
C663100n
1
2
VGA_B
VGA_R
VGA_G
10k
R1311
12
75R
R1620
12
16V
C80747n
16V
47n
C806
C80216V47n
C88116V47n
1n C859
50V
C81016V47n
R104
33k
100RR1243
68k
R103
SC_CVBS_OUT
Q119BC848B
1
2
3
390R
R102
SCART_CVBS_OUT
12V_VCC
BC858BQ146
1
2
3
10V10u
C378
16V
C120
100n
C5V
6
D17
1
3n3
C85650V
F202
600R1 2
CDA4C16GTH
D21234
5 6 7 8
4n7 50V
C858
SC_AUD_R_OUT
D1
CDA4C16GTH
12345 6 7 8
C85350V
3n3
C835
50V
220p
12
C833
50V220p
12
3n3
C85450V
SC_AUD_R_IN600R
F2061 2
C831
220p 50V
12
100RR1245
1 2
F201
600R1 2
SCART_AUD_R_IN
SCART_AUD_L_IN
RX/SCL_SC
TX/SDA_SC
C836220p 50V
12
75RR1482
12
SC_CVBS_OUT
C832
50V220p
12
R11824k71 2
SC_PIN8
220RR1233
R221
100R
SC_CVBS_IN
SC_G
SC_R
SC_B
SC_FB
R148375R 12
10VC664
100n 12
D178
C15V
12
22kR1187
1 2
C857
4n7 50V
SC_AUD_L_OUT
F205
600R1 2
SC_AUD_L_IN
600R
F2001 2
100RR1244
1 2
SC1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21SC
ART
LT1
R14
8675
R2
600R
F2031 2
C83
0
220p
50
V12
SAV_CVBS_IN
SAV_L_IN
SAV_R_IN
3n3
C855
50V
S391 2
47n C80916V
SAV_R
SAV_L
SAV_CVBS_INR142033R
47n 16VC808
C8621n 50V
R140933R
16V C885
47n
SAV_L
VGA_R
VGA_G
VGA_B
VGA_HSNC
VGA_VSNC
1n 50V
C861470RR1423
VGA_G
SC_R
SC_G
SC_B
SC_CVBS_IN
SC_FB
R141533R SC_CVBS_IN
SAV_CVBS_IN
C80016V
47n
16V C80347n
47n 16V C804
100RR1949
47n 16V C805
DVD_CVBS_IN
R1516
75R
12
R142233R
RCA_Y
RCA_Y
RCA_PB
R148175R 12
RCA_PR
470RR1494
16V C88647n
16V47n C883
R140833R
33RR1421
R141933R
16V47n
C798
C796
16V 47n
C79747n 16V
R11
300R
SC_R
SCART_CVBS_OUT
75RR1480
12
75RR1489
12
16V47n
C795
33RR1413
47n C79916V 33R
R1412
R141133R
16V C79447n
75R
R14
851
2
75R
R1515
12
47RR1249
R1517
75R
12
10u C973
16V
SCART_AUD_L_IN
SC_CVBS_IN
JK7
12
3
4YEL
WHT
RED
TP381
TP44 1
TP42 1
TP4 1
R158775R
TP431
TP11
TP51
16V
47n
C95
933
RR15
30
47p
C860
50V
R620100R
SAV_R
SCART
DVD INTERFACE (for 26" to 32")
!
YPbPr Slim INPUT
INDIA OPTION
SCART VIDEO OUTPUT AMPLIFIER
SAV Slim INPUT
SAV RCA INPUT
PC INPUT
1UF
62R
62R
62R
SC SVHS opt
62R
30064869
NC
30062423
30062840
Ulas Dereli
17mb62-18RAM&NAND&CI
87654321
A
B
C
D
E
F
AX M
1 2 3 4 5 6 7 8
A
B
C
D
E
F
OF:
A3PROJECT NAME :VESTELSCH NAME :
DRAWN BY :
SHEET:
14-03-2011_17:06
R195010k
4k7
R8
R9
4k7
3V3_VCC
4k7R1971
R1663
4k7
12
R1618
4k7
12
TUN_SCL_MSTTUN_SDA_MST
1V8_VCC DDR18V
R104k7
16V
100n
C91
3
330R
F812
3V3_TUNER
IF_AGC_MST
R12 4k722R
R1313
22RR1986
R198722R
22RR1984
R198522R
22RR1603
F181
60R
R1613
22R
1234 5
678R1
R2R3R4
OVER_CUR_DETECT
R1610
22R
1234 5
678R1
R2R3R4
50V4p7
C967
3V3_VCCR11724k7
33RR1425
R142733R
100RR5 C905
10V100n
R3333R
C712
10V100n
1
2 C709
10V100n
1
2 C710100n 10V
1
2
R6100R
VCC_PCMCIA
10V220n
C1214
DDR18V
AVDD_DDR
R13
561k
22R
R13671234 5
678R1
R2R3R4
1kR1365
DDR18V
1kR13
55
220n 10V
C683
1kR1364
C715220n 10V
220n 10V
C714
10V220n C716 C711
220n 10V
C713
10V220n
DDR18V
C5V6
D205
22RR1982
R1380
22R
1234 5
678R1
R2R3R4
R1370
22R
1234 5
678R1
R2R3R4
R1366
22R
1234 5
678R1
R2R3R4
R1609
22R
1234 5
678R1
R2R3R4
22R
R13691234 5
678R1
R2R3R4
U155
HY5PS121621C
J1
R1
M9
J9
E1
A1
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
J2
J7
H8
H2
F8
F2
E7
D8
D2
B8
B2
A7
P9
N1
J3
E3
A3
K9
K8
J8
K2
L8
K3
L7
K7
L3
L2
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
R8
R7
R3
L1
E2
A2
B3
A8
B7
B9
B1
D9
D1
D3
D7
C2
C8
F9
F3
E8
F7
F1
H9
H1
H3
H7
G2
G8 DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
LQDS
LQDS_P
LDM
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS_P
UDM
NC1
NC2
NC3
NC4
NC5
NC6
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
RAS_P
CAS_P
WE_P
CS_P
CKE
CK
CK_P
ODT
VSS1
VSS2
VSS3
VSS4
VSS5
VSS
Q1
VSS
Q2
VSS
Q3
VSS
Q4
VSS
Q5
VSS
Q6
VSS
Q7
VSS
Q8
VSS
Q9
VSS
Q10
VSS
DL
VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
3V3_VCC
R151333R
C906
10V100n
U5MSD9WB9PT-2
C10D21A9E20B9E19C9F20B8F19D20C8F21
C13A19A12B19A20B12C19A13B14C18C14A18B18B13B17C15
A16C16A15B15
B16C17
C12B11C20
B20B10A10C21B21D19C11
F18MVREF
A_ODTA_BADR[2]A_BADR[1]A_BADR[0]
A_CASZA_RASZA_WEZ
A_MCLKEA_MCLKZA_MCLK
A_DQM[1]A_DQM[0]
A_DQSB[1]A_DQS[1]A_DQSB[0]A_DQS[0]
A_MDATA[15]A_MDATA[14]A_MDATA[13]A_MDATA[12]A_MDATA[11]A_MDATA[10]A_MDATA[9]A_MDATA[8]A_MDATA[7]A_MDATA[6]A_MDATA[5]A_MDATA[4]A_MDATA[3]A_MDATA[2]A_MDATA[1]A_MDATA[0]
A_MADR[12]A_MADR[11]A_MADR[10]A_MADR[9]A_MADR[8]A_MADR[7]A_MADR[6]A_MADR[5]A_MADR[4]A_MADR[3]A_MADR[2]A_MADR[1]A_MADR[0]1
BSH103
Q209
R138533R
12345
678 R1
R2R3R4
R11714k7
R151433R
33RR1402
R198322R
U5MSD9WB9PT-2
K21L19M19T12U13V14V12V18
R19P19N21N19V20U20T20T19P17N18U17V16R20R17T16V19
W21U16V17T17V21T14M21P16N20
G21G20G19
U10T9V11U11U9T10V9
P18R18T18W19Y21Y19R21T21Y20W20R16
K20L20M20T13U14U12T11U18U19P20K19
W1Y1
AA2Y2
Y3AA3
W5W4
AA4Y4W6Y5GPIO69
GPIO68GPIO67GPIO66
RF_AGCIF_AGC
SIFMSIFP
VIFMVIFP
IMIP
TS0SYNCTS0VALIDTS0CLK
TS0DATA[7]TS0DATA[6]TS0DATA[5]TS0DATA[4]TS0DATA[3]TS0DATA[2]TS0DATA[1]TS0DATA[0]
TS1SYNCTS1VALIDTS1CLK
TS1DATA[7]TS1DATA[6]TS1DATA[5]TS1DATA[4]TS1DATA[3]TS1DATA[2]TS1DATA[1]TS1DATA[0]
F_RBZ/GPIO136PF_WEZ/GPIO134PF_OEZ/GPIO133PF_CE1Z/GPIO132PF_CE0Z/GPIO131PF_AD[15]/GPIO130PF_ALE/GPIO135
GPIO127GPIO128GPIO125
PCMREG/CI_CLKPCMIOW/CI_WRPCMWAIT/CI_WACKCI_CDPCMWENPCMCEN/CI_CSPCMIOR/CI_RDPCMOENPCM_IRQ/CI_INT
CI_RSTPCMADR[14]/CI_A[14]PCMADR[13]/CI_A[13]PCMADR[12]/CI_A[12]PCMADR[11]/CI_A[11]PCMADR[10]/CI_A[10]PCMADR[9]/CI_A[9]PCMADR[8]/CI_A[8]PCMADR[7]/CI_A[7]PCMADR[6]/CI_A[6]PCMADR[5]/CI_A[5]PCMADR[4]/CI_A[4]PCMADR[3]/CI_A[3]PCMADR[2]/CI_A[2]PCMADR[1]/CI_A[1]PCMADR[0]/CI_A[0]
PCMDATA[7]/CI_DATA[7]PCMDATA[6]/CI_DATA[6]PCMDATA[5]/CI_DATA[5]PCMDATA[4]/CI_DATA[4]PCMDATA[3]/CI_DATA[3]PCMDATA[2]/CI_DATA[2]PCMDATA[1]/CI_DATA[1]PCMDATA[0]/CI_DATA[0]
2
DIGITAL_IF_N
180R
R19
77
VCC_PCMCIA
DIGITAL_IF_P
12V_VCC
33RR1395
12345
678 R1
R2R3R4
VCC_PCMCIAR11774k7
R19514k7
CN14112345678910111213141516171819202122232425262728293031323334
35363738394041424344454647484950515253545556575859606162636465666768
BC848BQ208
1
2
3
VCC_PCMCIA
C966
50V12p
33RR1398
1
2
3
45
6
7
8
R4
R1
R3
R2
R164210k3V3_VCC
3V3_VCC 10kR1632
PCM_CD1_N
C96812p 50V
33RR1394
12345
678 R1
R2R3R4
33RR1399
12345
678 R1
R2R3R4
R139633R
12345
678 R1
R2R3R4
R139733R
12345
678 R1
R2R3R4
33RR1392
12345
678 R1
R2R3R4
R140133R
5V_VCC
33RR1424
R139333R
12345
678 R1
R2R3R4
33RR1384
1234 5
678R1
R2R3R4
R139033R
12345
678 R1
R2R3R4
R151233R
10V
C653100n
1
2
10V
C654100n
1
2
R19534k7
3V3_VCC
CI_POWER_CTRL
50V
C96912p
C687
10V220n
R1496
4k7
3V3_VCC
R16
604k
71
2
33RR1942
6V322u C970
BACKLIGHT_ON/OFFR3441k2
33k
R16
05
R16
0433
k
R160718k18k
R1606HDMI1_5VHDMI0_5V
BC848BQ181
1
2
3
R16614k71 2
R1662
1k2
3V3_
VCC
S81
U162
NAND512-A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48NC29
NC28
NC27
NC26
I/O7
I/O6
I/O5
I/O4
NC25
NC24
NC23
VDD2
VSS2
NC22
NC21
NC20
I/O3
I/O2
I/O1
I/O0
NC19
NC18
NC17
NC16NC15
NC14
NC13
NC12
NC11
WP
W
AL
CL
NC10
NC9
VSS1
VDD1
NC8
NC7
E
R
RB
NC6
NC5
NC4
NC3
NC2
NC1
PANEL_VCC_ON/OFF
100n
C12
2010V
1 2
FLH_3.3V
F_RBZ
FLH_3.3V
R14953k9
3V3_VCC60R
F187
100n 10V
C6561
2
100n 10V
C6571
2
6V3
C86822u
FLH_3.3V
FLH_3.3V
FLH_3.3V
R138833R
12345
678 R1
R2R3R4
R138233R
12345
678 R1
R2R3R4
33RR1383
12345
678 R1
R2R3R4
R138933R
1
2
3
45
6
7
8
R4
R1
R3
R2
R3433R
4k7R47
4k7R48
R494k7
22u C782
6V3
22RR1332
220n C718
10V
R1368
22R
1234 5
678R1
R2R3R4
R504k7
FLH_3.3V
AA_DDR2_DQSB0
AA_DDR2_DQSB0
AA_BADR_BA2
AA_BADR_BA2
AA_MCLK
AA_MCLK
AA_MCLKZ
AA_MCLKZ
AA_DDR2_DQSB1
AA_DDR2_DQSB1
AA_DDR2_DQS1
AA_DDR2_DQS1
AA_DDR2_DQS0
AA_DDR2_DQS0
AA_DDR2_DQM0
AA_DDR2_DQM0
AA_DDR2_DQM1
AA_DDR2_DQM1
AA_BADR_BA0
AA_BADR_BA0
AA_BADR_BA1
AA_BADR_BA1
AA_ODT
AA_ODT
AA_WEZ
AA_WEZ
AA_RASZ
AA_RASZ
AA_CASZ
AA_CASZ
AA_MDATA15
AA_MDATA15
AA_MDATA14
AA_MDATA14
AA_MDATA13
AA_MDATA13
AA_MDATA12
AA_MDATA12
AA_MDATA11
AA_MDATA11
AA_MDATA10
AA_MDATA10
AA_MDATA9
AA_MDATA9
AA_MDATA8
AA_MDATA8
AA_MDATA5
AA_MDATA5
AA_MDATA2
AA_MDATA2
AA_MDATA0
AA_MDATA0
AA_MADR12
AA_MADR12
AA_MADR11
AA_MADR11
AA_MADR10
AA_MADR10
AA_MADR9
AA_MADR9
AA_MADR8
AA_MADR8
AA_MADR7
AA_MADR7
AA_MADR6
AA_MADR6
AA_MADR5
AA_MADR5
AA_MADR4
AA_MADR4
AA_MADR3
AA_MADR3
AA_MADR2
AA_MADR2
AA_MADR1
AA_MADR1
AA_MADR0
AA_MADR0
A_MADR12
A_MADR12
A_MADR11
A_MADR11
A_MADR10
A_MADR10
A_MADR9
A_MADR9
A_MADR8
A_MADR8
A_MADR7
A_MADR7
A_MADR6
A_MADR6
A_MADR5
A_MADR5
A_MADR4
A_MADR4
A_MADR3
A_MADR3
A_MADR2
A_MADR2
A_MADR1
A_MADR1
A_MADR0
A_MADR0
A_MDATA0
A_MDATA0
MVREF
MVREF
A_BADR_BA2
A_BADR_BA2
A_DDR2_DQSB1
A_DDR2_DQSB1
A_DDR2_DQS1
A_DDR2_DQS1
A_DDR2_DQSB0
A_DDR2_DQSB0
A_DDR2_DQS0
A_DDR2_DQS0
A_DDR2_DQM0
A_DDR2_DQM0
A_DDR2_DQM1
A_DDR2_DQM1
A_BADR_BA0
A_BADR_BA0
A_BADR_BA1
A_BADR_BA1
A_ODT
A_ODT
A_MCLKE
A_MCLKE
A_WEZ
A_WEZ
A_RASZ
A_RASZ
A_CASZ
A_CASZ
TS_MDI1
TS_MDI1
TS_MDI2
TS_MDI2
TS_MDI3
TS_MDI3
TS_MDI4
TS_MDI4
TS_MDI5
TS_MDI5
TSMICLK
TSMICLK
TSMIVALID
TSMIVALID
TS_MDI0
TS_MDI0
A_MDATA9
A_MDATA9
A_MDATA2
A_MDATA2
A_MDATA5
A_MDATA5
A_MDATA7
A_MDATA7
A_MDATA8
A_MDATA8
A_MDATA10
A_MDATA10
A_MDATA11
A_MDATA11
A_MDATA12
A_MDATA12
A_MDATA13
A_MDATA13
A_MDATA14
A_MDATA14
A_MDATA15
A_MDATA15
A_MCLKZ
A_MCLKZ
A_MCLK
A_MCLK
PCM_CD2_N
PCM_CD2_N
TSMOSTART
TSMOSTART
TSMOCLK
TSMOCLK
TSMOVALID
TSMOVALID
TS_MDO7
TS_MDO7
TS_MDO6
TS_MDO6
TS_MDO5
TS_MDO5
TS_MDO4
TS_MDO4
TS_MDO3
TS_MDO3
TS_MDO0
TS_MDO0
PCM_WE_N
PCM_WE_N
PCM_IORD_N
PCM_IORD_N
PCM_IOWR_N
PCM_IOWR_N
PCM_IRQA_N
PCM_IRQA_N
PCM_OE_N
PCM_OE_N
PCM_CE_N
PCM_CE_N
PCM_WAIT_N
PCM_WAIT_N
PCM_RST
PCM_RST
PCM_D0
PCM_D0
PCM_D1
PCM_D1
PCM_D2
PCM_D2
PCM_D3
PCM_D3
PCM_D6
PCM_D6
PCM_D7
PCM_D7
PCM_D5
PCM_D5
PCM_A8
PCM_A8
PCM_A9
PCM_A9
PCM_A11
PCM_A11
PCM_A12
PCM_A12
PCM_A10
PCM_A10
PCM_A14
PCM_A14
PCM_A13
PCM_A13
PCM_A7
PCM_A7
PCM_A7
PCM_A6
PCM_A6
PCM_A6
PCM_A5
PCM_A5
PCM_A5
PCM_A4
PCM_A4
PCM_A4
PCM_A3
PCM_A3
PCM_A3
PCM_A2
PCM_A2
PCM_A2
PCM_A1
PCM_A1
PCM_A1
PCM_A0
PCM_A0
PCM_A0
TS0_CLK
TS0_CLK
TS0_SYNC
TS0_SYNC
TS0_VALID
TS0_VALID
TS0_D7
TS0_D7
TS0_D6
TS0_D6
TS0_D5
TS0_D5
TS0_D4
TS0_D4
TS0_D3
TS0_D3
TS0_D2
TS0_D2
P_D0
P_D0
P_D1
P_D1
P_D2
P_D2
P_D3
P_D3
P_D5
P_D5
P_D6
P_D6
P_D7
P_D7
P_A0
P_A0
P_A3
P_A3
P_A4
P_A4
P_A5
P_A5
P_A6
P_A6
P_A7
P_A7
P_A8
P_A8
P_A9
P_A9
P_A10
P_A10
P_A11
P_A11
P_A12
P_A12
P_A13
P_A13
P_A14
P_A14
P_WAIT_N
P_WAIT_N
P_IOWR_N
P_IOWR_N
P_RESET
P_RESET
P_IRQA_N
P_IRQA_N
P_OE_N
P_OE_N
P_IORD_N
P_IORD_N
P_CE_N
P_CE_N
P_WE_N
P_WE_N
F_RBZ
PF_AD15
PF_AD15
PF_CE1Z
PF_CE1Z
PF_CE0Z
PF_CE0Z
PF_ALE
PF_ALE
PF_OEZ
PF_OEZ
PF_WEZ
PF_WEZ
TS1_D0TS1_D0TS1_D1TS1_D1TS1_D2TS1_D2TS1_D3TS1_D3TS1_D4
TS1_D4
TS1_D5
TS1_D5
TS1_D6
TS1_D6
TS1_D7
TS1_D7
TS1_CLK
TS1_CLK
TS1_VALID
TS1_VALID
TS1_SYNC
TS1_SYNC TSMISYNC
TSMISYNC
TS_MDI6
TS_MDI6
TS_MDI7
TS_MDI7
AA_MCLKE
AA_MCLKE
A_MDATA6
A_MDATA6
AA_MDATA6
AA_MDATA6A_MDATA1
A_MDATA1
AA_MDATA1
AA_MDATA1A_MDATA3
A_MDATA3
AA_MDATA3
AA_MDATA3A_MDATA4
A_MDATA4
AA_MDATA4
AA_MDATA4
AA_MDATA7
AA_MDATA7
P_REG_N
P_REG_N PCM_REG_N
PCM_REG_N
P_A1
P_A1
P_A2
P_A2
TS_MDO2
TS_MDO2
TS0_D0
TS0_D0TS_MDO1
TS_MDO1
TS0_D1
TS0_D1
PCM_D4
PCM_D4
P_D4
P_D4
NAND_ALE
NAND_ALE
NAND_CEz
NAND_CEz
NAND_CLE
NAND_CLE
NAND_WPz
NAND_WPz
NAND_WPz
9k1NC
NC
30022165 KULLANILDI
CI INTERFACE
NC
1k
0R
NAND FLASH
128
MEGA
BYTE
TS IN& OUT
3V3_
STBY
4k7
12
R1614
PROTECT
R19
1522
0k
C1177
100n 16V
L120
4u7
SPDIF_OUT
AMP_MUTE
DVD_IR_ON/OFF
4u7
L119
3V3_
STBY
10u 10VC119610V
C119510u
C11
85
100p
50
V
SAV_AUDIO_IN_LSAV_AUDIO_IN_R
C119810V10u
SCART_AUDIO_IN_L
R1838
10k
Ulas DereliAUDIO_IO&HDMI_INPUTs 8
17mb62-1
87654321
A
B
C
D
E
F
AX M
1 2 3 4 5 6 7 8
A
B
C
D
E
F
OF:
A3PROJECT NAME :VESTELSCH NAME :
DRAWN BY :
SHEET:
14-03-2011_17:06
R1601
4k7
12
C15 16V
100n
600R
F512
220R
R1858
100u
C1169
16V
12
16V100u
C116812
CN707
12345678910111213141516171819
2021
HDMI_1_CLKP
HDMI_1_CLKN
HDMI_1_RX0P
HDMI_1_RX0N
HDMI_1_RX1P
HDMI_1_RX1N
HDMI_1_RX2P
HDMI_1_RX2N
HDMI_0_SCLHDMI_0_SDA
CEC
HDMI_1_SCLHDMI_1_SDA
HDMI1_5VHDMI1_HPD 10R
R188112
R188310R 12
R187110R 12
10RR1870
12
R187210R 2
10RR1884
1
R188210R 12
10RR1876
1
CECR187310R 12
R187510R 12
47k
R18
621
2
47k
R18
631
2
R187410R 1
R187710R 12
47k
R1864
12
R1865
47k
12
10RR1885
12
R188810R 12
10RR1879
12
R188610R 12
R186810R 12
10RR1867
12
10RR1869
12
R188710R 12
10RR1880
12
R187810R 12HDMI0_HPD
HDMI0_5V
HDMI_0_RX2P
HDMI_0_CLKP
HDMI_0_CLKN
HDMI_0_RX0N
HDMI_0_RX0PHDMI_0_RX1N
HDMI_0_RX1PHDMI_0_RX2N
MSD9WB9PT-2U5
E2F3F2G3G2G1E3E1H5H6J6
B2B1C2C1D2D1A2C3J5K4K5
H4
N5L4R5T6P6P5T4T5
N6R6W9AA9Y7AA7
U5U6U4
D4D6F4F5
E4C4D3
P4 SPDIFO
I2S_IN_WSI2S_IN_SDI2S_IN_BCK
I2S_OUT_BCKI2S_OUT_WSI2S_OUT_SDI2S_OUT_MCK
AUVRMAUVAGAUVRP
EAR_OUTREAR_OUTLAUOUTR1AUOUTL1AUOUTR0AUOUTL0
AUR3AUL3AUR2AUL2AUR1AUL1AUR0AUL0
CEC
HOTPLUGBDDCDB_DADDCDB_CKRXBCKPRXBCKNRXB2PRXB2NRXB1PRXB1NRXB0PRXB0N
HOTPLUGADDCDA_DADDCDA_CKRXACKPRXACKNRXA2PRXA2NRXA1PRXA1NRXA0PRXA0N
3
CN708
12345678910111213141516171819
2021
50V
C1183
4n7
R1897100R
R1899
220k
R1900100R
C1184
50V
4n7
220k
R1898
DSP_MAIN_R
DSP_MAIN_LMAIN_L
MAIN_R
R190410k
R1919
12k
470p
C1190
50V
10kR1903
R19
1812
k
SC_AUD_L_IN 10kR1901
12k
R19
20
470p
C11
88
50V
SAV_L_IN
C11
89
50V
470p
SC_AUD_R_IN
470p
50
V
C11
87
SAV_R_IN
R19
2112
k
10kR1902
SCART_AUDIO_IN_R
SCART_AUDIO_IN_L
SAV_AUDIO_IN_L
SAV_AUDIO_IN_R
22k
R19
251
2
R19
2422
k1
2
SC_R_OUT
SC_L_OUT
50V
100p
C11
86
DSP_SCART_L
DSP_SCART_RR222100R 12
100RR223
12
3V3_
STBY
SCART_AUDIO_IN_R10V10u
C1197
DSP_MAIN_R
HDMI1_HPD
HDMI0_5V
R1895
4k7
12
4k7
R1896
12
R19091k 12
Q204BC848B
1
2
3
1kR1910
12
BC848BQ203
1
2
3
R19121k 12
10V4u7
C1200
HDMI1_5V
1kR1911
12
HDMI0_HPD
CEC
4k7
R1892
12
10RR1917
12STBY_INFO
10u C1182
10V
10V10u C1170
600R
F30112
12V_VCC
TL062
U1781
2
3
4 5
6
7
8VDD
OUT2
IN2-
IN2+VSS
IN1+
IN1-
OUT182kR1927
1 2
4k7
R17
12
3V3_
VCC
DSP_MAIN_L
4k7
R1656
12
DSP_SCART_L
PL4
PL3
PL2
PL1R191433k 12
47p 50V
C1206
R192682k1 2
47p
C1205
50V
R191333k1 2
V+
V+
C1181