tea Faculteit der ElektrotechniekVakgroep Elektromechanica en Vermogenselektronica

StageversJag

Modeling an Insulated Gate BipolarTransistor (IGBT) with PSPICE.

Carniel VerboeveEMV 91-08

Hooglera(a)r(en):

Mentor(en)

Eindhoven.

Ir. S.W.H. de Haanjuli, 1991.

De Faculteit der Elektrotechniek van de Technische Universiteit Eindhoven aanvaardt geen verantwoordelijkheid voorde inhoud van stage- en afstudeerverslagen.

SUMMARY

In this report we made a model of the Insulated Gate Bipolar Transistor (IGBT) withPSPICE. This model was made by deriving the device parameters from the devicestructure. Most of the device parameters are calculated from estimated values,because we didn't have detailed information about the IGBT. These parameters areused in a PSPICE input file. A measurement circuit was built to compare thesimulation results, calculated by PSPICE, with the measurements.

The comparison of the transient characteristics shows that the model is in fairagreement with the reality. However the model still needs some adaption, especiallythe gate structure needs to be reconsidered and the model parameters have to berecalculated with the exact values of the used device. Then we have a qualitativegood model, which we can use for simulation purposes.

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CONTENTS:

Page

Summary 1

Chapter 1 Introduction 3

Chapter 2 . The IGBT 42.1 General action 42.2 Transient characteristics 6

Chapter 3 Modeling the IGBT 73.1 Equivalent circuit 73.2 Model parameters 9

Chapter 4 Comparison measurements with simulations 174.1 The measuring circuit 174.2 Experimental results 19

Chapter 5 Conclusions 31

Literature 32

Appendices

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CHAPTER 1Introduction.

Power electronics are getting more and more significant in electrical engineering. Forinstance to control machines, for power supplies and so on. Most of these controlequipment contain semiconductors devices, because they are compact and easy tocontrol.

A rather new semiconductor device, suitable for high-power applications, is theInsulated Gate Bipolar Transistor (IGBT). The IGBT is a MOST-like device, whichcan turn a current on and off. The main advantage of this device is that the IGBTcan handle large currents and voltages (like a thyristor or GTO) and it needs arelative small control power (like a MOSFET).

To make the design of power converters more easy, we want to have a computer mo­del, so that we can predict the the behaviour before building it. In this report I madea simple IGBT-model for PSPICE, because in our group the simulation programPSPICE is used and the program hasn't a model for it. I used the equivalent circuitand parameters that could be derived from the device structure and estimated dopingprofiles to make a subcircuit. This subcircuit can be used in any PSPICE inputfile andcan be specified to the used type of IGBT.

I firs! made a 'rough' model for a qualitative comparison with the measured results,after this we can make it more detailed.

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CHAPTER 2The insulated Gate Bipolar Transistor (IGBT).

2.1, General action.

As said the IGBT is a new power electronic device, which combines the high conduc­ting capacitance of the bipolar transistor with the easy gate control of a MOSFET.The symbol and the general structure of the IGBT are as follows:

EMITTER GATE EMITTER

COLLECTORN+

p+Jl

GATE N

J2

EMITTER p

COLLECTOR

Figure 2.1. Symbol and general structure of an IGBT.

Next we shall give an explanation of the action of the IGBT. First we apply a voltageto the collector and emitter. This voltage is positive. The middle junction J1 now isreverse biased. In a thyristor or a transistor this junction is made conducting byinjection of electrons (minority carriers) from the cathode (thyristor) or emitter(transistor). In case of an IGBT it is done by creating a n-type channel in the p-Iayer.In this way there is created a current path from the collector to the emitter.

To prevent the (parasitic) thyristor structure from conducting (latching), the gate andthe cathode are short-circuited. The gate-emitter voltage controls the channel andtherefore the current in the IGBT. Contrary to the thyristor the IGBT can be turnedoff. The static characteristics are given in figure 2.2.

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20

18

1615

Vi 14c..~ 12

~ 10

8

6

4

2

IXGH20N60 ~~

Tc '" 25'C ~~~1/ II _/

~c:v, ,,"J 0"

I/~~ I VOS '" BV

I) /I

I r/ I VOS =7V

"'/.....-

" I If/ /1

r/ V VOS = 6V

~h'/

'rK I VOS = SV

o 2 3 4 5 6 7 B 9 10

Vos (VOLTS)

Figure 2.2. Static behaviour of the IGBT.

(In this figure the MOSFET nomenclature is used.)

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2.2. Transient characteristics.

Typical transient characteristics of the IGBT are given in figure 2.3.

20V

It

II II I III I

ID IdIOn).,

I

IIIIIII

90~. t-----++tt------+-~--+--NOTE. I, ~ I" - 1'2

I

II

t,~

II

10",.t-----++------+--+~r--

10V

Figure 2.3. Transient characteristics of the IGBT.

The waveform of the gate-emitter voltage is mainly determined by two phenomena.First the gate capacitance; this capacitance has to be charged to create a channel. Thegate capacitance can be decreased by making the channel length smaller, but thelength can't be made too small because then one decreases the forward blockingvoltage. On the other hand this turn-off characteristic is determined by the storedcharge. The big p- and n-Iayers will accumulate an amount of charge, that has to beremoved when the IGBT is turned off. This is the cause of the tail-current of theIGBT. One can reduce this tail-current by implementing impurities in this region.Then one creates recombination centres where the charge can be collected. Adisadvantage of this technique is that the 'on'-voltage of the IGBT is increasing.

In the next chapter we try to determine the main parameters of the IGBT. Moredetailed information about the IGBT used is given in appendix A This is thedatasheet of the IGBT we used.

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CHAPTER 3The modeling of the IGBT.

3.1: EQuivalent circuit

The IGBT that we want to simulate is a IXYS-IGBT (Power-MOSIGT), typeIXGH25NlOOA This is a high-speed version, which can handle currents of 50A(max.) and voltages of 1000V (max.). For more information we refer to appendix A

To make an equivalent circuit of the IGBT, we have to look at the device structure ofthe component. See figure 3.1.

Rl

Q 1

o

CJEl

02

COLLECTOR

C 1~GATE

M'l 1c2

·

Figure 3.1. The equivalent circuit for the IGBT.

This is a general model for an IGBT. This model consists mainly of aMOS-transistorand a parasitical thyristor. The gate and the cathode of the thyristor are shortcircuitedto prevent the thyristor from conducting (latching). The bulk of the MOST is alsoconnected with the emitter of the IGBT.

At the same time we have to deal with parasitic capacitances. In this way we have acapacitor between the gate and the emitter and a capacitor between the thick n-Iayerand the gate of the IGBT, because they are (partly) overlapping. Capacitor Clrespectively C2 in our model. Because PSPICE has no breakdown mechanisms in itstransistor model, we have to put two diodes in the model, D1 and D2. Diode D1 has

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the purpose to represent the forward collector-emitter voltage and D2 has torepresent the reverse collector-emitter voltage.

Initially further parasites, like inductance of the connecting wires, are not consideredhere, because the inaccuracy of this model is still so big that these influences are ofnegigible.

The components of figure 3.1 will be discussed in section 3.2.

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3.2. Model parameters

It will be clear that the components of the equivalent circuit are not normal, becausethe structure of them is essentially different from normal ones. Therefore we cannotuse the default parameters given by PSPICE. The model will only act as a real IGBTif we adjust the parameters of the components used.

The estimated values that we used to calculate the model parameters are given in thenext tabel. (See table 3.1.)

Table 3.1. Estimated values of the IGBT.

Width and length of the gate and oxide layer:Size of the collectorThickness of the oxideChannel lengthThickness of the different layers:

upper n-Iayer (emitter)upper p-Iayer (emitter)lower n-Iayerlower p-Iayer (collector)

Doping of the different layers:upper n-Iayer (emitter)upper p-Iayer (emitter)lower n-Iayerlower p-Iayer (collector)

Spacecharge in the oxidelayer

10-2 m x 2.104 m10-2 m x 10-3 m10-7 m10.7 m

1018 cm·3

1017 cm·31014 cm-3

1018 cm-3

For ease of description, we assume that the IGBT is a block with a rectangular gatewith the sizes mentioned above (see table 3.1). The oxide thickness and the channellength are default PSPICE parameters. Thickness and doping of the different layersare taken from papers. These values are assumed to be typical IGBT values. Thespace charge in the oxide is also a default PSPICE value. The data in table 3.1 isused to calculate the passive components in figure 3.1 and to adapt the parameters ofthe active components in figure 3.1. The default PSPICE values are used for the caseswhere reliable data is missing.

To see what components in figure 3.1 have to be adjusted, we have to look at thecurrent path of the IGBT. See figure 3.2.

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EMITTER

------lJl

-------iJ2

GATE

p

N

EMITTER

COLLECTOR

Figure 3.2. The current path in the IGBT.

We start with the pnp-transistor 01 (see figure 3.1) in our model. For an IGBT mostof the current of this transistor goes from the emitter through the base to the MOS­transistor Ml. If we look at the transistor model used by PSPICE (see figure 3.3), wesee that a low collector current can be achieved by making the common emittercurrent-gain Pr equal to one. (The common emitter current-gain Pr is: Ie / lb.)

Figure 3.3. PSPICE transistor model (Gummel-Poon)

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The equations for the bipolar transistor are:

Ibd l belIb=area·(- +/bc2+-+lbc2)

13, 13 r

I =lb+le c

The default values of area, Kqb and f3 r are equal to 1. Area is the relative device area,Kqb is the base charge faktor and f3 r is the reverse current-gain. These parametershave no meaning in our first model. Currents Ibc2 and Ibc2 are non-ideal currents andare equal to zero in our model. Currents Ibc1 and Ibc1 are the forward and the reversediffussion currents:

lbel

=IS{e Y,J(NF·Y~ -1)

lbel

=IS{e Y.,/(HR·YJ -1)

NF=lNR=1

l·TV=­r q

Where IS is the transport saturation current and is default 1.10-16• This current also

has to be adjusted. The fomula for IS is:

IS=J :A=A{qDI' PMJ + qD,. n,o)_A{qDI' PMJ)$ Lp L,. Lp

A=1O-1 em 2

2D -10 em

p s

With a PnO = 106 em-3 and a diffusion length ~ ~ 1.1-10-1 ern, we get a saturationcurrent IS of 1.4-10-9 A.

Another point of attention in the transistor model, are the depletion' capacitances.

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Because they determine the rise- and falltime of the IGBT. It is possible to imple­ment these capacitances in the PSPICE transistor model, however to keep the modelsimple and well organized, I choose to make these capacitances outside the transitor,to make an first order approach. We calculate the capacitance between the emitterand the base of the pnp-transistor first.The general formula for the depletion capacitance, when no voltage is applied, is:

€AC =-JO W

r--------w= 2e~(N..+N~Vb4

qN..ND

If we calculate the capacitance between the emitter and the base (CJEl) we get acapacitor of 35 nF. The capacitance between the base and the collector (CJCl) of thepnp-transistor (which is the same as the capacitance between the base and thecollector of the npn-transistor) is in our calculations equal to 3.5 nF. (We assume thatthe area of the upper junction (emitter) is lOx smaller than the lower p-n junction.)And the capacitance between the base and the emitter (CJE2) of the npn-transistor isequal to 10 nF. At this moment it is not required to consider the pnp-transistor inmore detail.

The npn-transistor is not considered here, because it has no particular meaning in ourfirst approximation model. The transistor gets a function when the latching of theparasitical th)Tistor is under discussion.

An other important feature of the IGBT is the diffusion charge in the lower p- and n­layer (junction J2). This charge is the main cause of the tail current of the IGBT.This charge is accumulated in the emitter and the base of the pnp-transistor. Weassume that most of this charge is in the base of this very inefficient transistor. Thebase charge is generally given as follows:

, ,I.Q.*'\/ J.=r:ri=t/lb

Jl,m,t=--I qA

cm 2Jl =450-

p Vsm

p=O.Smo=0.45 'lO-30kg

q=1.6·1O-19C

With an A of 10-5 m2, this results in a 'f r of 100 IJ,S. However the simulations showed

that this value of 'f f was too big, because the program didn't converge. So we haveadjusted this to 1 IJ,S, which showed acceptable results.

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The first part of the current path is modeled now. Next we have to look at the MOS­transistor. Therefore we consider the current formulas of the MOST.

If Vgs - VtO < 0:

Id=O

If Vds < Vgs - VtO:

W KI d=-.::f(1 +1 Vetr)'Vetr -(2 '(V'"-V.o>- Vetr>L 2 0-

If 0 S Vgs - VtO $ Vds:

Id

= W Kp (l +A·Vetr)-(V.s

_ V~2L 2 0

A normal MaS-transistor can only take small currents, so we have to adjust some ofthe parameters of the PSPICE MOST for our purpose. At first we have to adjust thesizes of the channel. The default value for the width W and the length L are 104 m.We have adjusted the width to 10-2 m. We leave the length L to 104 m. These valuesare for a rectangular gate structure, as assumed in the beginning of this section.

After this we have to look at the transconductance coefficient ~. The coefficient ~is calculated as follows:

Where JJ is the mobility of the minority carriers in the substrate of the MOST, in thiscase they are electrons. So JJn = 1450 (cm2/Vs).

£,=3.9

£0=8.85'10-12 .AsVm

We assume a oxidethickness of 10-7 m. That makes ~ = 0.5.

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For the ihre5ho1d vultage VtOt the formula is given as follows:

with the following values:

e =LOS 010-12£6 em

q=1.6·1O-19C

2WB-0.7V

eor -4 FCox=--3.4S 0 10 --

tox em-2

If we calculate Vto' with an impurity concentration NA of 1017 cm-3, we get approxi­

mately 5 Volt.

We have now created a current path in the IGBT by calculating new values for themain components. But we still have some components in our equivalent circuit whichneed some attention, like the 'overlapping' capacitances C1 and C2. These are verytrivial:

eAC=-d

If we calculate these C's with our estimated values, we get a capacitance C1 about100 pF and a capacitance C2 about 30 pF.

Next we consider the diodes D1 and D2. The diodes may not affect the transistors sowe have made the saturation current of these diodes very small. (IS = 1.0-10-30

.) Thebreakdown voltage of D1 (Le. the maximum forward voltage of the IGBT) is set at2500 V. This may be considered very high, but this is because than no forward break­down occurs during our simulations. The breakdown voltage of D2 (Le. the maximumreverse voltage of the IGBT) is set at 20 V.

At last we consider the resistors R1 and R2. In practice they are the same, so theyhave the same value. A value of 1 10'0 will be sufficient to prevent the thyristor fromlatching.

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Now we have completed our model and the PSPICE subcircuit for the IGBT is givenas follows:

.SUBCKT MODELIGBT 1 2 3*#1: COLLECTOR #2:GATE #3: EMITTER*TESTMODEL ONTWIKKELD DOOR CAMIEL VERHOEVER1341UOHMR2 631UOHMD145 DMOD1D2 15 DMOD2Q145 1 QMODIQ25 4 3 QMOD2Ml 523 6 MMODI W= 10MMCI 23 150PFC2 2 5 30PFCJEI I 5 3.5NFCJCl 4 5 0.3NFCJE23 4 O.INF.MODEL DMODI D(BV =2500).MODEL DMOD2 D(BV =20,IS = 1.0E-30).MODEL QMODI PNP(BF= 1,IS= 1.4E-9,TF= IUS).MODEL QMOD2 NPN.MODEL MMODI NMOS(VTO=5V,KP=0.5).ENDS MODELIGBT

If we make a first static analysis with this model, see the static analysis inputfile in theappendix, we get the following result:

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25~ -; -1- - ....;.. _ - - _.. - -.. -- ---- --: Vge - lOV ., ,

,

~--------------------, Vge - S.sv,

+~--------------------,: Vge - 5.4V

r--------------------~~Vge - S. 3V

Figure 3.4. Simulated static analysis of the IGBT.

8V

Vge - 5. 2V

Vge ~ OVlOV

This figure shows that this model has the static behaviour of an IGBTt only the gatevoltage is less lineair with the current as in practice. Figure 2.2 shows the staticbehaviour of the used IGBT. In our model the collector current rises very quicklywhen the gate-emitter voltage is more than 5 Volt.

At the end of this chapter I want to emphasist that the model parameters are estima­ted ones and therefore very inaccurate. This is because I didntt have detailedinformation about the structure, dopingprofiles and so on. Some of the modelparame­ters have been adjusted during the simulation runs to match simulation to experimen­tal data.

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CHAPfER4Comparison measurements with simulations.

Section 4.1 gives the test conditions and in section 4.2 we will first consider themeasured results and than compare them with the simulated results.

With the subcircuit derived in chapter 3, we made two PSPICE inputfiles (seeappendix). One for the turning-on of the IGBT and the other for the turning-offcharacteristics. We calculated the collector-emitter voltage, the gate-emitter voltage,the collector current and the gate current.

4.1. The measuring circuit.

To measure the transient characteristics of the IGBT while conducting currents ofsome Amperes, we built the circuit from figure 4.1.

VMG

RL#IV

LL

VMA

+VA

Figure 4.1. The measuring circuit.

The IGBT was connected to a voltage source in series with an adjustable resistor,which was set at 25 n. We applied a voltage of 100 V. The impedance of the voltagesource is negligible. Because the resistor is a winded one, we have to deal with aparasitic inductance. The measured value is 1.4 mHo A clamping diode is not used.

We also wanted to have a gatedriver at our disposal, which could adjust the value ofthe gate resistance from In to lkn. Therefore we built a gatedriver as shown in figure4.2.

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1 k Oh III

5V

Figure 4.2. The gatedriver.

HPCL220eC

Tl:2N390~ T2:2N3906

16V :::

15V n (CATE)

This gatedriver also uncouples the function generator from the main circuit. The gateresistance was set to 100 n. We applied a square waveform at the driver input of 15V with a frequency of 50 Hz and a rise- and fall time of 15 ns.

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4.2, Experimental results.

The following signals are measured: Vce' Vge and Ie. The gate current I~ is notmeasured, because the distortion and the noise was in the same order as the SIgnal.

First we will show the gate driver input signal (see figure 4.3). (This signal is measu­red with a lOx probe.)

I.S

1.8

EI.S

8.8

- I I I I I -I- -

-

- -r- -'- -- -

- -

I- -

'- -'- -

- -r-- -

I- -

- -

- -

I- -

I I I I8.8s iEl.8ms ZEI.8ms 3E1.Elms

TIME

Figure 4.3. The measured gate driver input signal (10 VIV).

"EI.Elms

If we decrease the measurement time, we get more detailed pictures of the slopes ofthe signals. In the following we will only show the detailed figures of the slopes.

The turn-on behaviour of the IGBT is given in figure 4.4 to 4.10 and the turn-offbehaviour is given in figure 4.11 to 4.17. Figure 4.4 gives the measured collectorcurrent of the transistor. This was measured with a current probe, so the current isgiven in Volt.

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4B.Bus3B.Blls2B.BllSTIME

B.Bs

8.2

8.3

8.1

8. Br-'*--..,----------;------;--------;-------..,-----

Figure 4.4. Measured collector current Ie (10 A/V); (turn-on).

As one can see, the current is mainly determined by the inductance of the loadcircuit. The formula for the current in this case is:

,u -­

I =-(l-e t )C R

L't:-

R

The measured timeconstant f m is 17 ~s. With L = 1.4mH and R = 250 the theoreti­cal value is 52~s. In our simulations we use a 450 ~H inductor because this givesbetter results (see figure 4.5). Not only for the collector current, but also for thesimulated voltages and currents. I have had no time to figure out why the measuredvalue of L was not correct.

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4 OAT------------+------------+------------+------------+------------+------t

3 OAt t,,,,,,,,,

OAt,

2 +,,

,,1 OAf +

o OA ------------+------------+------------+------------+------------+------+Ous lOus 20us 30us 40us SOus

D 1 (vm~)

Figure 4.5. Simulated collector current Ic;(turn on).

If we compare this with the measurements (figure 4.4), we see that this correspondsvery good. The timeconstant f here is about 19 I-LS, which is the almost the same asf m =17 #loS. This is not strange because we adjusted the value of the conduntance.

Next we look at the collector-emitter voltage VCC' given in figure 4.6. (This signal ismeasured with a 100x probe.)

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1.B

B.75

C/)f- B. 5~

o:>

B.25

-2BB.Bns -lBB.Bns 8.Bs 18B.Bns lBB.Bns 3BB.Bns 4e~.B"s

TIME

Figure 4.6. Measured collector-emitter voltage Vee (100 VIV); (turn on).

As expected the voltage decreases rapidly, because the IGBT is conducting. The oscil­lations are caused by parasitical inductances and capacitances. This is also to be seenin the figures of the gate-emitter voltage.

The Vee calculated by PSPICE at turn-on is given in figure 4.7. We see that thisvoltage decreases lineair. The fall-time of the simulated and the measured voltage(see figure 4.6) are in the same order: te (measured) =:: 50 ns, tf (simulated) =:: 30 ns.

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120V~------····---+-----· __ ·----~··-·--·------+-------------~-------------~, ,, ,

lOOV +------, +

80V+,,,,,,,60V+,,,,

I,,40V+

,,,,

,,,,I,

.;.,

,,,+,,,,,

20V;- +

,

500"s'lOOns300ns200nsOV +-------------4---------~-~~~""""""~~~~_

Ons lOOnsc v(3)

Figure 4.7. Simulated C()llector-emitter voltage Vee; (tum on).

Figure 4.8 gives the measured gate-emitter voltage. This voltage is determined bycharging the gate capacitances as shown in figure 2.3.

--~

I.e

Vol

!:io:> e.s

e. el-----..L.------------------------

-1. Sus

The simulated Vge. shown in figure 4.9, shows a little difference. The waveform is thesame, but the timebase is different, about lOx. Probably the gate capacitance is bigger

- 23 -

then we assumed. We can't tell whether the overlapping capacitances are bigger orthe Cox is bigger, because we have no detailed infonnation about the lay-out of theIGBT. So we leave this difference out of consideration for the moment.

16V~-------------+--------------+-------------+-------------~-------------~, ,, ,

12v t t,

,,

8V+ +,,,,,,

,,,

4V+ +

-ov ------+--------------+-------------+-------------~-------------~Ons lOOns 200ns 300ns 400ns SOOns

o v(4)

Figure 4.9. Simulated gate-emitter voltage Vge; (turn on).

We also give the gate current Ig (see figure 4.10). It is in accordance with expectati­ons. Because Ig is not measured, we can't comment on this picture any further.

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l20mAT-------------+---------·---~-------------+-------------~-------------T

,,,,,+

OmA+---'

,,,,,,,40mA+

,,,.I,,,,,,

: ',,,,80mA t t, ,, ,, ,,

-40mA+-------------+_------------~-------------+_------------~-------------~Ons lOOns 200ns 300ns 'lOOns SOOns

• I (vmgl

Figure 4.10. Simulated gate current Ig; (turn on).

Next we consider the turning-off behaviour of the IGBT, which gives the moreinterresting figures. The collector current is measured as follows (see figure 4.11):(The current is measured by a current probe.)

1.8~~~----

8.75

8.5

8.25

8.8s-8.25

'--_-'--_...I...-_...I...-_...L-_...L-_...L-_-L-_-L-_.....J...._......J-_--.J.._---l._----.l_-.l__ --.J

-5.8usTIME

Figure 4.11. Measured collector current Ie (4 A/V); (turn off).

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In this case the current is forced to zero by the transistor. The inductance of the loadand the parasitical capacitances are causing an oscillation in the main circuit. Thiscauses a negative voltage over the transistor. Because the IGBT can't take negativevoltages, a break-down mechanism of junction J2 (diode D2) will cause a negativecurrent peak. That this oscillation occurs is clearly to see in figure 4.13. But first wewill look at the simulated collector current.

4 OQ + - - - - -- - - +- - - - - - --+- -- - - - - - -+ - - - - - -- - +- - - - - - - - -+ - - - - - - - - +- - - - -- - - - ... - - --

o

,t

,,,,+

,,,+

1 OAt

o OAt ,o,,,,o,

-lOA + - - - - - - - - + - - - - - - - -+- - - - - - - - -+ - - - - - - - - +- - - - - - - - -+ - - - - - - - - + - - - - - - - -+- - - ....;.Ous 2us 4us flus Bus lOus 12us 14us

c 1 (vm~;

Figure 4.12. Simulated collector current Ie; (turn off).

If we compare this with the measured results, we see that this simulation shows goodagreement, except for the decreasing oscillation. We also see that the negative currentpeak and the timescale of both phenomena are approximitly the same. I couldn'ttrace the origin of the oscillation. The measured results show a bigger decrease of theoscillation, this is also good to see in the next figures of the Vcc.(The collector-emittervoltage is measured with a 100x probe.)

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18.8

8. 8 fd.do-~~:!...---+:,.......L---------------------------1

Figure 4.13. Measured collector-emitter voltage Vce (100 VIV); (turn off).

2 OK Yl' - - - - - - - - -+ - - - - - - - - - +- - - - - - - - - -+- - - - - - - - - -+ - - - - - - - - -+ - - - - - - - - -+- - - - - - - - - -t, ,

1 6KY +,,

1 2KY.L

,,,o 8KY +

,,

o 4KY+

o OKY

,,,+

,,,-+.,,,,··,,

.+,,·,t,

,

-0 4KY~-------------------+---------+--------~---------+---------~--------~Ous Sus 10us 15us 20us 25us . 30us 35us

o v(3)TIme

Figure 4.14. Simulated collector-emitter voltage Vee; (turn off).

In this figures we see the voltage peak due to the inductance of the load circuit. Wealso see that the negative voltage is limited by the reverse break-down mechanism(D2). The faster decay of the oscillation in the measured results may indicate a largeresistance in the IGBT.

- 27 -

As one can see, the overvoltage can reach very high values and can therefore be verydangerous for the IGBT.

The last measurement is the gate-emitter voltage when the IGBT is turned off. (Thissignal is measured with a lOx probe.)

1.B

8.5

8. BI------t+--------------------------j

8.Bs 25.8us 58. Bus 75.8usTIME

Figure 4.15. Measured gate-emitter voltage Vge (10 VIV); (tum off).

This figure showes, besides the high frequency oscillations, the discharging current ofthe gate capacitances.

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l6V;- - -+------ -- -----+- ------- -----+ ---- -- ----- -+- ---- ---- ----+- --- ---------t-, I :

12V+ +

,,,

.;.

. ,+8V+,,,,,

,~v+,,,,,,,OV+,,,,,

- 4V t +,, :

-8v ~ --~ .. --- .. ------+- .... ----------+------- + ~--- ........ ~

Ous 20us 40uS 60us . 80us lOOus• v(4)

Figure 4.16. Simulated gate-emitter voltage VIc; (turn off).

The comparison of the V e's shows again good correspondance between the experi­mental and simulated resu'ts, they have the same waveform and timescale. The Vie isforced to zero by the function generator. Again we see the oscillation in the simulatedresults. (See figure 4.16.)

At last we give the simulated gate current II (see figure 4.17). Because we have nomeasurements of Ig' we can't make any conclusions about this signal.

- 29 -

80mQ + - • +- - ••• - - • - - • - -+. - - .... - ... - -+ ••••• - • - ••• - +- .... - .. - . - - ...... - - - .. - ... -+, ,

'!OmA+

OmQ+

-40mQt

-80mQ t

,,,

+

t,o,,,,

t,,

-120ml=l+--+-······-·-------·-···-·----+···-·--····-+--·-···---- ..+----.-.--- ..~Ous 20us '!Cus 60us 80us' lOOus

• 1 (vmg)

Figure 4.17. Simulated gate current Ig~ (tum off).

At the end of the chapter, I want to' make a few remarks about the test and simulati­on conditions:

The measurement results are recorded with an Nicolet 4094 oscilloscope andprocessed \\oith VUPOINT, a digital data processing program.The model by which the simulations were made, was adjusted during varioustestruns.The runtime for PSPICE was for the IGBT tum-off file was about 30 to 45minutes and for the IGBT turn-on file about 15 to 20 minutes.I used PSPICE version 4.02 and the program was ran on an AT with coproces­sor emulator.

- 30 -

CHAPfER5Conclusions.

In chapter 4 we have seen that the model gives results, which are in fair qualitativeagreement with the measured data. Because I had no detailed information about theIGBT, it was difficult to make a more precise model.

Based on the comparison of simulation and measured results, we can conclude thefollowing:

The gate structure has to be reconsidered. We assumed that: 1) the spacecharge in the oxide was equal to zero; 2) that the gate was rectangular; 3) thatthe gate has no leak-resistance. This reconsideration is needed, because of thedifference between the simulated and measured figures.Probably the thick n- and p-Iayer (collector side) have some resistance. Thismay affect the oscillation in the simulations.The depletion capacitances are voltage dependent in reality, so they have to bechanged in our model. The voltage dependency goes also for other capacitan­ces and resistors, which are connected with semi-conductor material.The model parameters have to be recalculated with the exact values of thedevice structure and the dopingprofiles.The thick p-Iayer probably contains recombination centres. This must beimplemented in the model.The faster decay of the oscillation at the measured results, may indicate alarger resistor in the IGBT. This resistance is probably due to the thick p- andn-Iayer at the collector side of the IGBT.

- 31 -

LITERATURE

PSPICE 4.02 Manual; Microsim Corperation, Irvine, California, January 1989.

P. Antognetti and G. Massobrio; Semiconductor Device Modeling with SPICE;New York, McGraw-Hill Book Company, 1988.

S.M. Sze; Semiconductor Devices, Physics and Technology; New York, Wiley& Sons, 1985.

S.W.H. de Haan; Vermogenselektronica B; Dept. Electrical Engineering,Eindhoven Univ. of Technology, febr. 1991.

R. Bayerer et al.; Insulated Gate Bipolar Transistor; 12 Elektrotechniek/Elek­tronica, no. 10, oct. 1988.

BJ. Baliga; The Insulated Gate Transistor - A New Switching Power Device;IEEE Ind. Appl. Soc. Meet., 1983, p. 794 - 803.

AR. Hefner and D.L Blackburn; An Analytical Model for the Steady-Stateand the Transient Characteristics of the Power Insulated Gate Bipolar Transis­tor; Solid State Electronics, Vol. 31, No.10 (1988), p. 1513 - 1532.

AR. Hefner, jr; Analytical Modeling of the Device-Circuit Interactions for theInsulated Gate Bipolar Transistor (IGBT); Conf. Rec. IEEE Ind. Appl. Soc.Meet., 1988, p. 606 - 614.

AR. Hefner; An Improved Understanding for the Transient Operation of thePower Insulated Gate Bipolar Transistor; IEEE Power Electr. Spec. Conf.,1989, part 1, p. 303 - 313.

B.W. Williams; Determination of Power Semiconductor Model ParameterValues from Structure Data; Solid-state Electronics, Vol. 25, No.5 (1982), p.395 - 410.

C.H. Xu and D. Schroder; Modeling and Simulation of Power MOSFETs andPower Diodes; IEEE Power Electr. Spec. Conf. 1988, part 1, p. 76 - 83.

- 32-

APPENDIX A

IGBT data sheet.

.=0_IPower MOSIGTs

IXGP, IXGH, IXGM N-ChannelConductivity Modulated Insulated Gate Transistors

PRELIMINARY INFORMATION

FEATURES

• High current capabihty-10 to 30 Amps (continuous)• Low on-state conduction losses• MOS gate turn onloff drive simplicity• Extended 1500 C safe operating area

• Improved high temperature stability• Low input capacitance• Optimized for 60 Hz to 20 kHz switching• Very f~t tum-on, 200 ns typical

DESCRIPTION

MOSIGTs are a new class of power semiconductors that com­bine the advantages of MOS gated drive simplicity with the cur­rent handling capability of bipolar devices.

The basic cell design and gate characteristics of the MOSIGT arevery Similar to Power MOSFETs The dnve circuitry required tocontrol up to 30 Amps and 500 to 1000 Volts is basically the sameas a Power MOSFET with 3500 pf of input capacitance.

During tum-on of the MOSIGT, minority carrier injection into theN- base region modulates the body on-resistance to a leve/1 0 to20 times lower than an equivalent sized MOSFET resulting in aproportIOnate 5 to 10 times Increase In current handling capabil­ity. MinOrity carrier recombination during turn-off results in a (tf )

fall time of 0.5-1.0 IJ.S which is similar to bipolar devices.Therelore, the MOSIGT is more suitable in low to medium fre-

quency high current power switching applications ranging from60 Hz to 20 kHz and where low conduction losses are essential.

The IXGP, IXGH and IXGM family of high voltage MOSIGTs aremembers of an advanced series of N-Channel Power MOS prod­ucts which use HOMOS ,. , 8 proprietary vertical OMOS technol­ogy developed by IXYS.

HOMOS ,. is a very planar, high density process which in­corporates new techniques to improve operating characteristicsand stability at high voltages. This technology, combined with aunique polysilicon gate cell structure significantly improves theMOSIGT peak current at 150° C to 2.5-3.0 times the continuousrating. This advantage makes the MOSIGT ideal for many indus­trial and commercial applications in power conversion and motorcontrol.

PRODUCT FAMILY

10 10 (1)A STO(CONT) (CONT)

Part Number(1)Vos at 25°C at 90·C VDS (ON) It VDS fON) It Page

i 50A 25A. 3.5V 1.5",s 2.7V 4.0fLS IXGH25N100,IXGM25N100 7

1000V 40A 20A 3.5V 1.011S 2.7V 3.01£s IXGH20N100, IXGM20N100 8

i 20A 10A 35V 10",s 27V 3.0fLS IXGP10N100,IXGM10N100 9

50A 25A 3.5V 1.5",s 27V 4.0",s IXGH25N90. IXGM25N90 7

900V 40A 20A 3.5V 1.0fLS 2.7V 3.0",s IXGH20N90. IXGM20N90 8

20A 10A 3.5V 1.0",s 2.7V 3.0",s IXGP10N90, IXGM10N90 9

50A 25A 35V 1.5J.l.s 2.7V 4.0",s IXGH25NBO. IXGM25NBD 7

800V 40A 20A 3.5V 1.0",s 2.7V 3.0fLS IXGH20N80. IXGM20N80 8

20A 10A 35V 1.0",s 2.5V 3.0"'5 IXGP10N80. IXGM10NBO 9

50A 30A 30V O.B",s 2.5V 3.0fLS IXGH30N60, IXGM30N60 10

600V 40A 20A 30V 0.6",5 2.5V 2.0",s IXGH20N60, IXGM20N60 11

20A 10A 3.0V 0.6"'5 2.5V 2.0",s IXGP10N60. IXGM10N60 12

50A 30A 30V 0.8",5 2.5V· 3.0",5 IXGH30N50. IXGM30N50 10

500V 40A 20A 30V 0.6",5 2.5V 2.0fLS IXGH20N50. IXGM20N50 11

20A 10A 3.0V 0.6",s 25V 2.0fLS IXGP10N50,IXGM10N50 12

(1) Note To specify the high speed 'K verSIon add an "A" suffiX to part number (see page 2 part numberdescription) .

IXGH SERIEST0-247(T0-3P)

IXGM SERIEST0-204(T0-3)

TQ.220 AS

PACKAGE OUTUNES AND PINOUTS

TQ.247 TO·204 AE

IllN ,. GATE2. DRAIN3. SOURCE

l'IN ,. GATE2. llIlAlN3. 80UIlCf

~f~"'" 11. -- 54·G RH \.'" 1 L I i

PlNl.GAT~ V /2. SOURCE UCASE-DRAIN

DIm. Millim_ Inct>esMin. Ma•. Min. 101••.

A 1423 1651 560 650

B 966 1056 380 420

C 356 482 140 190

0 064 089 025 035F 354 408 139 161

G 229 279 090 110

H - 635 - 250

J 051 76 020 030I( 1270 1473 500 ~O

L 1 15 1 77 045 070N 41'.3 533 190 210

Q 254 342 1~0 135Fl 204 249 080 115

S 064 139 025 055T 585 685 230 270

V 1 15 - 045 -

Dim.

A

B

coF

GH

JJ,K

l

NQ

R

MIllimeterMin. Ma•.4.8 5.21.7 2.73.1 3.9

208 21.2

5.8 6.215.7 159

- 4.51.97 2.012.97 3011 1.4

5.25 5.65198 20.2

2.2 24.4 .8

3.1 3.3

Inc,,"Min. Ma..187 .203.067 106.121 .152.811 .827.226 242

.612620

.on078

.116 .119039 .055.207 .222.n2 .n8.086 .094

.016 .031

.121 .129

DIm.

B

coEF

G

H

K

aR

u

Millo_Min. Me•.

- 3937- 1971

658 681

'40 165

30 15 BSC

1074 11 05

546 esc1668 17 12

112011983.86 411

2484 2527

419 556

Inctl.Min. Ma•.

- 155

- 776

259 268

.58 .062

055 065

1187 BSC

423 435

.215 esc657 674441 472

152 162

978 995

165 203

II\

PART NUMBER DESCRIPTION

L.- Tum-Off Switching SpeedBlank = Standard Fall Time (t,)

A = High Speed (reducedlalll.me. t,)

L..- Vos Breakdown

60 = 600 Volts80= 800 Volts

100= 1000 Volts

GH 30 N 60-r- -- -- -,- -- T

L Qptlonal Hi-rei Screening(see pg. 14 lor test flow)

Blank = Standard/J.JAN

IJTX.JANTXIJTXV • JANTXV

10 Current Rating -------------'10= 10 Amps @ 9O'C20 = 20 Amps @ 90'C30 = 30 Amps @ 90'C

IX

IXYS TPower MOS

MOSIGT PecQge Type ------'GM = Metal Can TO·204 (TO-3)GP=TO-220GH = TO-247 (TO·3P)

L.--------Channel PolarityN=N ChannelP=P Channel

Note: Valid combinations are only those referenced in the IXYS price book or product selector guide. Consult your locallXYS sales office toconfirm availability of specific combinations or new types.

2

MOSIGT CHARACTERISTICS

INTRODUCTION

The MOSIGT combines the best characteristics of powerMOSFET and bipolar devices in a single monolithic chip.The simplified equivalent circuit for an N-channel MOSIGTis a Darlington connection of an N-channeJ MOSFET and aPNP bipolar transistor as illustrated in Figure 1a. The verti­cal structure of the MOSIGT as shown in a cross-sectionview in Figure 1b further describes the operation of thedevice. The MOSIGT is turned on by applying a positivevoltage to the gate of the MOSFET which in tum suppliesbase current to the PNP transistor formed in the verticalstructure between the P+ substrate. n-epitaxial base regionand P-well.

The bipolar output characteristics offer ten times improve­ment in on-state voltage drop (VOS(ON)), which significantlyreduces conduction losses when compared to an equiva­lent size MOSFET. The MOS gated input characteristicsallow the MOSIGT to be ,lfoltage driven similar to MOSFETswhich reduces the complexity and cost of drive circuitdesign. Since the MOSIGT utilizes minority carrier injectionto improve current density, its turn-off behavior is a combi­nation of MOSFET and bipolar characteristics. The turn-offtime tends to be intermediate between MOSFET and bi-polar devices of similar size. .

FORWARD AND REVERSEOFF-STATE BLOCKING

The MOSIGT will block applied forward voltage up to theonset of avalanche at its breakdown voltage. IXYS specifiesa guaranteed maximum voltage (BVoss). which is some­what less than the actual breakdown and specified at aleakage current of 2501J.A.Unlike the MOSFET, the MOSIGT does not conduct in thereverse direction, and actually has a small reverse blockingcapability in the range of 5 to 10 volts. Because the reversejunction in the MOSIGT is not passivated, IXYS does notguarantee this reverse blocking capability and recommendsthat it not be depended upon to block reverse voltages.

Since the MOSIGT does not have an internal anti-paralleldiode, a free-wheeling rectifier must be added externally Inthose applications which require reverse currents imposedby the load. With the absence of the internal parasitic diode,MOSIGTs do not suffer from simultaneous reverse conduc­tion problems in the free-wheeling mode which can occur inMOSFETs.

GATE

02

NIDulter)

SOURCE

N-(ep')

p.

DRAIN

GATE

MINORITY CARRIERINJECTION

DRAIN

SOURCE

(a) POWER MOSIGTEOUIVALENTCIRCUIT

(b) CROSS SECTION OFA MOSIGT

Figure 1. Basic MOSIGT Operation and Device Symbol

3

(e) MOSIGTSYMBOL

Figure 2. Typical MOSIGT Output Characteristics

o 2 3 4 5 6 7 8 9 10

Vos (VOLTS)

Figure 3. Typical VDS(ON) Yersus Temperature

IXGH20N60

I'0 = 2OA-- I

~~ 10 = lOA

-r--i'-. .......

.........~

'"~ 10 = 1.0A

...........r---......

"

,\..

15050 75 100 125JUNCTION TEMPERATURE (OC)

25

IXG1H20N60 I~ ~

Tc = 25'C ~~~II II II

" " "~0~0~0

,/1/ VGS =8V

'I /I

rj /Vas - 7V_ to--

'I I I

'/r/v Vas = 6V

fit'"

~V VGS = 5V

~~ 1.0

>oWN~ 0.9::Ea:oz

0.8

1.1

20

18

16_ 15

~ 14

! 12

.9 10

8

6

4

2

DRIVING MOSIGTs

The MOSIGT has input characteristics similar to a powerMOSFET; a voltage drive with a capacitive input impedanceand a threshold voltage (VGS(lhl)' which is between 2.5 to50 volts. Typical output charactenstics. shown in Figure 2,illustrate the behavior of the devices. Turning the MOSIGTon and off is virtually identical to driving a power MOSFET.An advantage of the MOSIGT over MOSFETs for similarlycurrent rated devices is its input capacitance, which is sig­nificantly less than the MOSFET. Also, the ratio of gate­drain capacitance to gate-source capacitance is lower by atleast a factor of 3, which further eases the gate driverequirements.

When a MOS-gated power device switches, the rapid fall(at tum-on) and rise (at turn-off) of the drain-source voltageinjects current into the gate circuit through the gate-to-draincapacitance Crss ' The gate drive circuit must present a lowenough impedance. especially during turn-on where dVlls/dtcan be very large, to keep the induced gate Voltage tran­sient within reasonable bounds. The potentially large dlct"dtpresent during turn-on can induce a transient voltage in thesource connection. The gate-drive circuit must be locatedvery close to the actual source lead of the power device,and the impedance of the source return path to groundmust be kept low. Source connection lengths on the order ofseveral inches may cause unacceptable gate-source volt­age transients.

Turn-off of a MOSIGT is less sensitive to stray circuit induc­tance due to the lower levels of dV/dt and dlidt. However, avery high gate voltage slew rate (dVgs/dt) during turn-off cancreate internal displacement currents that reduce the turn­off Safe Operating Area.

,IXYS recommends that a gate drive voltage of 12 to 15 voltspe used to drive the MOSIGT for optimum operating perfor­mance. IXYS' MOSIGT on-state and switching characteris­ics are specified with a VGS of 15 volts and are guaranteedt 25°C and at elevated temperatures.

N·STATE CHARACTERISTICS

uring conduction. the MOSIGT exhibits two distinctegions of operation similar to the behavior of a bipolarransistor; the saturation region and the linear region. It ismportant to note that for the MOSIGT, these regions areefined in the same manner as a bipolar transistor andpposite the definitions for a MOSFET. These regions are

lIustrated in Figure 2.

'n the saturation region. the on-state voltage (VOS(ON»), is aunction of drain current, gate dnve voltage (VGs), and tem­,erature. IXYS guarantees a maximum VOSiON ) in the>aturation region at the device's rated continuous current'D). with a VGS gate dnve of 15 \/Otis and TJ at 25°C.

II. distinct advantage of the MOSIGT is its significantlyligher current handling capability and reduced temperature:oefficient over the entire temperature range. As shown in=igure 3, VOS(ON) increases only 8% from 25°C to 150°Cunction temperature. At small drain currents. the tempera­ure coeffiCient of VOS(ON) is slightly negative, similar to alipolar device.

n the linear region, the MOSIGT characteristics are stablelnd linear over a very broad range of voltages and currents."he MOSIGT is well suited for a wide variety of high powernear amplifiers and regulators.

4

PEAK CURRENT RATING AND DESATURATION

The peak current rating of the MOSIGT (10M), is the maxi­mum current at which the device is guaranteed to operatewithout failing or losing tum-off control of the device so longas the junction temperature is maintained below 150°C.

IXYS' MOSIGTs also exhibit a desaturation feature abo~e

the peak current rating when VGS is 15 volts or less. Whenan external circuit fault tries to force the MOSIGT current toexceed the peak current or what can be supported by theapplied VGS (see Figure 2. output characteristics), thedevice comes out of saturation. Once desaturation occurs,the device must be turned off as quickly as possible in ordernot to exceed the maximum power dissipation of the device.

SWITCHING CHARACTERISTICS

During turn-on, the MOSIGT sWItching periormance isdominated by the MOS gate structure. When the gate drivevoltage is brought above the threshold voltage, the MOS­FET structure is enhanced and very quickly starts to con­duct (see Figures 1a & 1b). The MOSFET drain currentbecomes the base current of the bipolar PNP structure,Which turns on in the order of 50 nsec. As a result, theMOSIGT turn-on switching speed is very fast, similar topower MOSFETs of equal input capacitance (C1SS)'

There are three distinct time intervals that comprise thetotal turn-off time of MOSIGTs, as shown in Figure 4.·

First is the turn-off delay time (~(Olf»). which is dominatedby the time required for the gate drive circuit to pull VGSfrom 15 volts down to just above the level at which the dramcurrent begins to decrease.

The second interval is the initial fall time (t,,), which is thetime required for the gate drive circuit to remove the chargeinjected into the gate by the gate-to-drain capacitance asVOS increases during turn-off. The tt, period is defined asthe time it takes for 10 to drop from 90% of full current downto approximately the 20% level. In IXYS MOSIGTs, tt1ranges between 100 to 200 nsec and is influenced by gatedrive design and RGS drive impedance.

The third interval. designated t'2, is controlled by minoritycarrier recombination in the bipolar PNP structure. The rateat which minority carriers in the base region recombine cansignificantly influence t'2 from 0.51-'-s to 2.0J.Ls depending onthe IXYS MOSIGT device type. (standard or "A" version).

Unlike bipolar devices, tt2 cannot be influenced by the gatedrive circuit because the base region of the PNP bipolarstructure is not available eX1ernally to pull minority carriersout through a reverse bias base drive scheme The onlyapproach to reducing tt2 is through minority carrier life timecontrol which is a function of device design and processtechnology.

20V

STANDARD AND "A" (HIGH SPEED) VERSIONS

IXYS has developed a proprietary process which has signif­icantly reduced tt2 and allows the MOSIGT to be optimizedfor either low frequency « 5kHz) or high frequency (10 to20kHz) switching applications. The IXYS standard MOSIGToffers switching speeds in the range of 2 to 4lJ.s andfeatures a maximum VOS(ON) of 2.5 to 2.7 volts at ratedcurrent for minimizing conduction losses in switching appli­cations below 5kHz.

For higher speed switching applications. up to 20kHz. IXYSoffers a high performance version specified by adding anMA" suffix to the part number (i.e., IXGH20NSOA) with maxi­mum inductive load fall times in the 0.51-'-s to 1.0J.LS range at125°C junction temperature. The tradeoff to achieve thefaster switching turn-off in the "A" version is VOS(ON1. whichis approximately 25% higher than IXYS' standard MOSIGT.

Ir

-------+-IIIII

I II II II II I

10·", -++-------+----+-~~

I I II I III I

'0 Id(On)~ ~I II J-----'!--4

10V

Figure 4. MOSIGT SWitching Waveforms

5

.r-.I

Figure 5. Clamped Inductive Test Circuit

Vary E,OUT -=- E, to Obtain

ReqUired 10

HANDLING PRECAUTIONS

Because MOSIGTs utilize Metal-Oxide-Semiconductorprocess technology, care must be taken to ensure that VGSnever exceeds BVGSS or permanent damage to the devicemay result. Many circuits can cause transients that maycompromise the MOSIGT in this manner. In applicationsprone to potential transient conditions, an external zener ortransient suppressor is recommended.

Due to its extremely high input impedance, the MOSIGTlike the power MOSFET, is sensitive to electrostatic dis­charge. While the input capacitance of these devices isrelatively large, it is still possible for the human body tostore enough charge to destroy a MOSIGT on contact.Reasonable precautions in handling, packaging and storingthese devices should be observed. This includes, but is notlimited to, use of .anti-static workstations at any point requir­ing the handling of these devices.

Figure 1a) which under very high re-applied dVidt condi­tions during turn-off, will induce a lateral displacement cur­rent which can force the bipolar structure to conduct,resulting in loss of control and potential device failure.

IXYS recommends that care should be taken to limit there-applied dVos/dt to typically less than 2000 VIIJ.S in mostinductive load applications. This can be accomplished intwo ways; external snubbers can be used to limit re-applieddVos/dt which is a common approach used in most highspeed power switching applications, or the series gateresistance (RG) of the drive circuit (see Figure 6, switchingtime test circuit) can be increased to a value which reducesthe turn-off switching speed of the device thereby limitingdVos/dt. The latter approach controlling RG is often moreeconomical when switching speed requirements are lower

L

0.050

DUT ~Ec

Ec = 0.8 BVossE, = 0.5 BVoss

VGs=~Vary tp toObtain Required Peak 10

20

Figure 7. 'TYPicaIIXGH20N60 Tum-off ~fe Operating Area

IXGH20N60 I I I- Clamped InduClive Load

L = 100~H I I I...... TJ = 150'C dVosdl =-~

~, ..... 1000V:~S

' .. 1500V~S

2000V~S

700600300 400 500

Vos (VOLTS)

200

10

40

50

Figure 6. Resistive Load Switching Time Test Circuit

_ 0.05!l

SAFE OPERATING AREA

The Forward Biased Safe Operating Area (FBSOA) for theMOSIGT during tum-on and steady-state conductIon peri­ods is thermally limited. Like the power MOSFET, theMOSIGT does not exhibit the second breakdown phenome­non common to bipolar devices. Care should be taken,however, not to exceed the maximum power dissipationand 150°C junction temperature of the device under all con­ditions for guaranteed reliable operation.

The MOSIGT is also subject to a different safe operatingarea during turn-off, especially under inductive load condi­tions. A typical turn-off SOA curve is shown in Figure 7 forIXYS' 20 amp MOSIGT. Similar to MOSFETs, the MOSIGThas a parasitic bipolar structure (shown in the dotted area of

6

/

IXGH25N80, 90, 100IXGM25N80, 90, 10025 AMPS, 800-1000 VOLTS

MAXIMUM RATINGS

IXGH25N80 IXGH25N90 IXGH25N100Parameter 8ym. IXGM25N80 IXGM25N90 IXGM25N100 Unit

Drain-Source Voltage (1) Voss BOO 900 1000 Vdc

Drain-Gate Voltage (RGS = 1.0Mfl) (1) VOGR 800 900 1000 Vdc

Gate-Source Voltage VGS :: 30 :: 30 :: 30 VdC

Drain Current Continuous Tc = 25°C 10 50 50 50 ActcTc c 90·C 25 25 25

Drain Current Peak (3) 10M 100 100 100 Actc

Total Power Dissipation @ 25°C Po 200 W

Power Dissipation Deraling > 25°C 1.67 W"'C

Operating and Storage Junction Temperature TJ & T5t9 -65 to +150 ·C

Thermal ReSistance RthJC 0.6 ·crw

ELECTRICAL CHARACTERISTICS TC = 25°C unless otherwise specified

Parameter Type Min. Typ. Max. Units Test Conditions

BVoss Drain-Source Breakdown Voltage 25NBO. BOA 800 - - V VGS = OV

25N90.90A 900 - - V 10 = 250,.,A

25N1oo. 100A 1000 - - V

VGS(thl Gate Threshold Voltage ALL 2.5 - 5.0 V VOS = VGS. 10 = 250,.,A

IGSS Gate-Source Leakage ALL - - 100 nA VGS K ::30V-

loss Zero Gate Voltage Drain Current - - 200 ,.,A VOS = Max. Raling x 0.8. VGS = OVALL - - 1000 ,.,A VOS = Max. Rating x 0.8. VGs= OV. Tc = 125cC

VOS (ON) Drain-Source On Voltage 25N80. 90. 100 - - 2.7 V VGS = 15V. 10 = 25A

25N80A. 90A100A - - 3.5 V

G,s Forward Transconductance (2) ALL 8.0 - - S Vos= 10V. 10 = 12.5A

I C,ss Input Capacitance ALL - - 3500 pF VGS = OV. Vos = 25V. f = 1.0 MHz

Coss Output Capacitance ALL - - 250 pF

Crss Reverse Transfer Capacitance ALL - - 50 pF

SWITCHING CHARACTERISTICS

RESISTIVE LOAD

!dCon) Turn-On Delay Time ALL - - 100 ns Resistive Load, TJ = 125cc:tr Current Rise Time ALL - - 200 ns 10 = 25A. VOS= Rated \loss x 0.8

!dCOff) Tum-Qtl Delay Time ALL - - 1.0 IJS VGS= 15V

tf Current Fall Time 25NBO. 90. 100 - - 3.0 IJS RGS = 100fl

25NBOA, 9OA,100A - - 1.0 IJS

INDUCTIVE LOAD

!dCOff) Tum-Qtl Delay Time ALL - - 1.0 IJS Inductive Load, TJ = 125cC

tf Current Fall Time 25N80, 90, 100 - - 4.0 IJS L = 100 IlH, 10 "'. 25A

25N80A, 9OA, - - 1.5 IJS VOS (Clamp) = Rated Voss x 0.8100A VGS = 15V, RGS = 100fl

(ll TJ C 2S'C to lS0'C(2) Pulse Test: Pulse width .. 300ms. duly cycle'" 2%(3) Repetitive Rating: Pulse Width limned by max Junction temperature

7

APPENDIX B

PSPICE inputfile static analysis IGBT.

IGBT ANALYSISVA 10 0VMA 103VG500VMG 50 5RG 4 5 1000HMXl 3 4 0 MODELIGBT.SUBCKT MODELIGBT 1 2 3*#1: COLLECTOR #2:GATE #3: EMITTER*TESTMODEL ONTWIKKELD DOOR CAMIEL VERHOEVER1341UOHMR2 6 3 1UOHMD145 DMOD1D215 DMOD2Q145 1 QMODIQ25 4 3 QMOD2Ml 523 6 MMODI W= lOMMC1 23 150PFC2 25 30PFCJE1 1 5 3.5NFCJC1 4 5 O.3NFCJE234 O.lNF.MODEL DMOD1 D(BV =2500).MODEL DMOD2 D(BV=20,IS=1.0E-30).MODEL QMODI PNP(BF = 1,IS = 1.4E·9,TF= 1US).MODEL QMOD2 NPN.MODEL MMOD1 NMOS(VTO=5V,KP=0.5).ENDS MODELIGBT.DC VA 0 10 0.1.STEP VG UST 0 5.2 53 5.4 5.5 5.6 10 15.PROBE I(VMA).TEMP 27.END

PSPICE inputfile IGBT (turn on).

IGBT ANALYSISVA 10 0 l00VOLTVMA 10 1VG 50 0 PWL(O 0 50N 0 65N 15 IODU 15)VMG SO 5lL 12 450UHRL 2 3 26.80HMRG 4 5 l000HMXl 3 4 0 MODELIGBT.SUBCKT MODEUGBT 1 2 3*#1: COLLECTOR #2:GATE #3: EMITTER*TESTMODEL ONTWIKKELD DOOR CAMIEL VERHOEVER1341UOHMR2 6 3 lUOHMD145 DMODID215 DMOD2Ql 45 1 QMODIQ25 4 3 QMOD2Ml 523 6 MMODI W= 10MMC1 23 150PFC2 25 30PFCJEl 1 5 3.5NFCJCl 4 5 0.3NFCJE2340.1NF.MODEL DMODl D(BV =2500).MODEL DMOD2 D(BV=20,IS=1.0E-30).MODEL QMODI PNP(BF= 1,IS= 1.4E-9,TF= IUS).MODEL QMOD2 NPN.MODEL MMODI NMOS(VTO=5V,KP=0.5).ENDS MODEUGBT.TRAN 1U tOOD.PROBE I(VMA) I(VMG) V(3) V(4).TEMP 27.END

PSPICE inputfile IGBT (turn off).

IGBT ANALYSISVA 100 100VOLTVMA 10 1VG 50 0 PWL(O 15 50N 15 65N 0 lODU 0)VMG 505LL 1245000RL 2 3 26.80HMRG 4 5 1000HMXl 3 4 0 MODELIGBT.SUBCKT MODEUGBT 1 2 3*#1: COLLECfOR #2:GATE #3: EMITfER*TESTMODEL ONTWIKKELD DOOR CAMIEL VERHOEVER1341UOHMR2 63 1UOHMD145 DMODID2 15 DMOD20145 10MODI025430MOD2M1 5236 MMODI W=lOMMCl 23 150PFC2 25 30PFCJE1 1 5 3.5NFCJC1 4 5 0.3NFCJE234 O.INF.MODEL DMODI D(BV =2500).MODEL DMOD2 D(BV=20,IS=1.0E-30).MODEL OMOD1 PNP(BF= l,IS= 1.4E-9,TF= IUS).MODEL OMOD2 NPN.MODEL MMODI NMOS(VTO=5V,KP=0.5).ENDS MODELIGBT.TRAN IU 100U.NODESET V(3) =0.PROBE I(VMA) I(VMG) V(3) V(4).TEMP 27.END