Department of Control System and Instrumentation Engineering

Faculty of Engineering

King Mongkut’s University of Technology Thonburi

INC 253 Digital and electronics laboratory I

Laboratory 9

Sequential Circuit

Author: …………………………… ID …………………

Co-Authors:

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2. …………………………… ID …………………

3. …………………………… ID …………………

Experiment Date: ………………… Report received Date: …………………

Comments

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For Instructor

Full Marks

Pre lab 10

Results 15

Discussion 25

Questions 10

Conclusion 5

Total 65

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INC, KMUTT Lab. 9: Sequential Circuit

Objectives

1. To study the functions of asynchronous and synchronous counter circuit.

2. To understand how to make the “count-up” and “count-down” asynchronous and synchronous

counter circuit.

3. To study the functions of shift register circuit.

4. To understand how to make shift register circuit.

Equipments Required

1. Training Board

Devices Required

1. IC no. 7408, 7474, 7476

Basic Information

1. Asynchronous Counter

“Asynchronous counter” is a counter circuit, which created from the series of J-K flip-flops.

The clock signal will be given to the clock input of the first J-K flip-flop then the output of the

first J-K flip-flop will connect to the input of the adjacent flip-flop. The output signal, which

represents the current binary counting value, is the output signal ( Q ) of all J-K flip-flop. While

the output (Q ) of the first J-K flip-flop is the least significant bit (LSB) of the binary value.

The maximum number of counting value depends on the number of J-K flip-flops in the circuit.

For example, the 4 bits counter is composed of 4 J-K flip-flops. This maximum number, which

this counter can count, is 24 = 16. Hence, this counter can count from 0 to 15.

If the output ( Q ) of the first J-K flip-flop is connected to the clock input of the adjacent J-K

flip-flop, this counter will be the count-up counter. For example, the connecting of flip-flops in

Fig. 1 is “4-bits count-up asynchronous counter”.

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

A B C D

CLK

„1‟

„1‟

All J and K connect to „1‟

Fig. 1: 4-bits count-up asynchronous counter

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INC, KMUTT Lab. 9: Sequential Circuit

However, if the output ( Q ) of the first J-K flip-flop is connected to the clock input of the

adjacent J-K flip-flop, this counter will be the count-down counter, as shown in Fig. 2.

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

A B C D

CLK

„1‟

„1‟

All J and K connect to „1‟

Fig. 2: 4-bits count-down asynchronous counter

2. Synchronous Counter

“Synchronous counter” was created for figure out the problem of counter circuit, which

contains a lot of bits for counting. In this case, if we use asynchronous counter, it will consume

a lot of time to complete one counting. Since the adjacent counter need to wait the previous

counter to complete the counting first, before receiving the output signal for counting and

sending the output signal to the next flip-flop.

The synchronous counter, as shown in Fig. 3, was designed by parallel connecting the input

signal to the clock input of each flip-flops. The maximum number of counting value depends

on the number of flip-flops in the circuit, which equals to 2n (where n is the number of flip-

flops in the circuit).

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

A B C D

CLK input

„1‟

„1‟

„1‟

„1‟

Fig. 3: 4-bits count-up synchronous counter

3. Shift Register Circuit

“Shift register” circuit is widely used in the internal circuit of computers, calculators and

printers. The shift register will be used as buffer for transfer data in and out, and can be used

for both serial and parallel data transfer.

The shift register circuit can be created from the connection of D flop-flops or J-K flip-flops.

One flip-flop is used for represent 1 bit of data.

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INC, KMUTT Lab. 9: Sequential Circuit

Pre-Lab Preparation

1. Design the “3-bits count-up asynchronous counter” circuit by using IC7476 and plot

its timing diagram when outputs start at “0000”.

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INC, KMUTT Lab. 9: Sequential Circuit

2. Design the “3-bits count-up asynchronous counter” circuit by using IC7476 and plot

its counter output signals when outputs start at “0000”.

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INC, KMUTT Lab. 9: Sequential Circuit

3. Plot the counter output signals of the “3-bits count-up synchronous counter” circuit in

Fig. 4 when outputs start at “0000”.

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INC, KMUTT Lab. 9: Sequential Circuit

4. Plot the counter output signals of the “Mod-5 synchronous counter” circuit in Fig. 5

when outputs start at “0000”.

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INC, KMUTT Lab. 9: Sequential Circuit

5. Plot the D flip-flop output signals of the “Shift Register” circuit in Fig. 6 when outputs

start at “0000”.

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INC, KMUTT Lab. 9: Sequential Circuit

Procedure

1. Asynchronous Counter

1.1. Make the “3-bits count-up asynchronous counter” circuit by using IC 7476.

1.2. Put each pulse of input signal to the counter circuit and notice the changing of

output signal from these 3 flip-flops.

1.3. Record the result in Table 1.

Table 1: The result the 3-bits count-up asynchronous counter.

Input signal Output signal

Clock No. C B A Decade code

1

2

3

4

5

6

7

8

9

10

1.4. Make the “3-bits count-down asynchronous counter” circuit by using IC 7476.

1.5. Put each pulse of input signal to the counter circuit and notice the changing of output

signal from these 3 flip-flops.

1.6. Record the result in Table 2.

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INC, KMUTT Lab. 9: Sequential Circuit

Table 2: The result the 3-bits count-down asynchronous counter.

Input signal Output signal

Clock No. C B A Decade code

1

2

3

4

5

6

7

8

9

10

2. Synchronous Counter

2.1. Make the “3-bits count-up synchronous counter” circuit by using IC 7476, as

shown in Fig. 4 (connect logic “1” to the “J” and “K” input of the first flip-flop).

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

A B C

CLK input

„1‟

„1‟

„1‟

„1‟

Fig. 4: 3-bits count-up synchronous counter

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INC, KMUTT Lab. 9: Sequential Circuit

2.2. Put each pulse of input signal to the counter circuit and notice the changing of

output signal from these 3 flip-flops.

2.3. Record the result in Table 3.

Table 3: The result the 3-bits count-up synchronous counter.

Input signal Output signal

Clock No. C B A Decade code

1

2

3

4

5

6

7

8

9

10

2.4. Make the “Mod-5 synchronous counter” circuit by using IC 7476, as shown in Fig. 5.

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

J

Q

Q

K

SET

CLR

A B C

CLK input

„1‟

„1‟

„1‟„1‟

Fig. 5: Mod-5 synchronous counter

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INC, KMUTT Lab. 9: Sequential Circuit

2.5. Put each pulse of input signal to the counter circuit and notice the changing of output

signal from these 3 flip-flops.

2.6. Record the result in Table 4.

Table 4: The result the Mod-5 synchronous counter.

Input signal Output signal

Clock No. C B A Decade code

1

2

3

4

5

6

7

8

9

10

3. Shift Register

3.1. Make the “Shift Register” circuit, as shown in Fig. 6. (while connecting logic “1”

to all “PR” and “CLR” legs). Then, record the result in Table 5.

Q

QSET

CLR

D

Q

QSET

CLR

D

Q

QSET

CLR

D

Q

QSET

CLR

D

C DBA

„1‟

„1‟

Input data

CLK

Fig. 6: Shift register circuit

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INC, KMUTT Lab. 9: Sequential Circuit

Table 5: The result the shift register circuit.

Input signal Output signal

Clock

No. Data D C B A

1 0

2 1

3 0

4 1

5 1

6 1

7 0

8 0

9 0

10 1

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INC, KMUTT Lab. 9: Sequential Circuit

Questions

1. Design the Mod-10 synchronous counter and plot its output signals when output signals start

at “0000”.

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INC, KMUTT Lab. 9: Sequential Circuit

2. Design the shift register for transmitting 2 bits data in parallel.