8
S .1 Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada ( JNTU-Kakinada ) B.Tech. IV-Year II-Sem. Code No: L0421/R07 IV B.Tech. II Semester Regular/Supplementary Examinations  April - 2012 EMBEDDED AND REAL TIME SYSTEMS (Common to Electronics and Communication Engineering & Electronics and Instrumentation Engineering) Time: 3 Hours Max. Marks: 80  Answer any  FIVE Questions  All Questions carry equal marks - - - 1. (a) Ex pl ain th e compo nents of emb ed de d s ys tem hard wa re . (Unit-I, Topic No. 1.1) (b) Expla in with an exa mple h ow to op timize custo m sing le purp ose pr ocessors. [8+8] (Unit-I, Topic No. 1.2) 2 . (a ) Explai n the dev elo pme nt env ironme nt of genera l purpose processor s u sed in an embedd ed sys tem des ign wit h an example. (Unit-II, Topi c No. 2.2) (b) Explai n the import ance of the following pr ocess ors in embed ded sy stems , ( i ) Di gi tal si gnal pro ce ssor (i i ) ASSP . [8+8] (Unit-II, Topic N o. 2.3) 3 . (a) De sc ri be program state ma ch in e mod el wi th re le vant exampl e. (Unit-III, Topic No. 3.1) (b) Dis cus s a bout c onc urre nt proces ses. [8+8] (Unit-III, Topic No. 3.4) 4 . (a ) What i s meant by communicat ion in terf ac e? Explain t he need f or communi cati on i nt er face s. (Unit-IV, Topic No. 4.1) (b) Illus trate with suit able e xample how to uti lize et herne t as a communic ation in terface. [8+8] (Unit-IV, Topic No. 4.3) 5 . (a) Expl ai n t he us e of s emapho re s f or the critica l s ec tions of a Tas k.  (Unit-V, Topic No. 5.2) (b ) Wr ite notes on tas k a nd tas k s tates. [8+8] (Unit-V, Topic No. 5.1) 6. (a) Wh at is mea nt b y pr iori ty i nver si on p roblem? Ex pl ain it wit h an exampl e. (Unit-VII, Topic No. 7.1) (b) What i s mean t by pipe ? How do es a pi pe diff er from a queue ? Expla in with a n examp le. [8+8] (Unit-VI, Topic No. 6.4) 7 . (a) Ex pl ain i n b rief t he di ffe ren t Timer Func ti ons . Unit-VII, Topic No. 7.1) (b) Wri tes not es o n Windows C E. [8+8] (Unit-III, Topic No. 3.4) 8 . Explai n t he fol lowing rel ate d t o e mbe dde d s ystem des ign tec hnology , (a) Be ha vi or al Synthesis. (Unit-VIII, Topic No. 8.1) (b ) Har dwa re/ Sof tware co- ver ifi cat ion. [8+8] (Unit-VIII, Topic No. 8.2) Set-1 Solutions

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S.1Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

( JNTU-Kakinada ) B.Tech. IV-Year II-Sem.

Code No: L0421/R07

IV B.Tech. II Semester Regular/Supplementary Examinations

 April - 2012EMBEDDED AND REAL TIME SYSTEMS

(Common to Electronics and Communication Engineering & Electronics and InstrumentationEngineering)

Time: 3 Hours Max. Marks: 80

 Answer any  FIVE Questions

 All  Questions carry equal marks

- - -

1. (a) Explain the components of embedded system hardware. (Unit-I, Topic No. 1.1)

(b) Explain with an example how to optimize custom single purpose processors. [8+8] (Unit-I, Topic No. 1.2)

2. (a) Explain the development environment of general purpose processors used in an embedded system design with

an example. (Unit-II, Topic No. 2.2)

(b) Explain the importance of the following processors in embedded systems,

(i) Digital signal processor

(ii) ASSP. [8+8] (Unit-II, Topic No. 2.3)

3. (a) Describe program state machine model with relevant example. (Unit-III, Topic No. 3.1)

(b) Discuss about concurrent processes. [8+8] (Unit-III, Topic No. 3.4)

4. (a) What is meant by communication interface? Explain the need for communication interfaces.

(Unit-IV, Topic No. 4.1)

(b) Illustrate with suitable example how to utilize ethernet as a communication interface. [8+8]

(Unit-IV, Topic No. 4.3)

5. (a) Explain the use of semaphores for the critical sections of a Task. (Unit-V, Topic No. 5.2)

(b) Write notes on task and task states. [8+8] (Unit-V, Topic No. 5.1)

6. (a) What is meant by priority inversion problem? Explain it with an example. (Unit-VII, Topic No. 7.1)

(b) What is meant by pipe? How does a pipe differ from a queue? Explain with an example. [8+8]

(Unit-VI, Topic No. 6.4)

7. (a) Explain in brief the different Timer Functions. Unit-VII, Topic No. 7.1)

(b) Writes notes on Windows CE. [8+8] (Unit-III, Topic No. 3.4)

8. Explain the following related to embedded system design technology,

(a) Behavioral Synthesis. (Unit-VIII, Topic No. 8.1)

(b) Hardware/Software co-verification. [8+8] (Unit-VIII, Topic No. 8.2)

S e t - 1S o l u t i o n s

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S.2 Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

B.Tech. IV-Year II-Sem. ( JNTU-Kakinada )

Q1. (a) Explain the components of embeddedsystem hardware.

Answer : April-12, Set-1, Q1(a) M[8]

The components of an embedded system hardware

are,

1. Power supply

2. Reset circuit

3. Oscillator circuits

4. Input devices, interfacing/driver circuits

5. Processor

6. Timers

7. Interrupt controller

8. Program memory and Data memory

9. Serial communication ports

10. Parallel ports

11. Outputs interfacing/driver circuits

12. System application specific circuits.

1. Power SupplyMost of the embedded systems are associated with

their own power supplies. The power supplied to each of the

units in an embedded system is within some defined range of 

voltages called operation range. That is, each unit operates in

any one of the following operation ranges.

(i) 5.0 V ± 0.25 V

(ii) 3.3 V ± 0.3 V

(iii) 2.0 V ± 0.2 V

(iv) 1.5 V ± 0.2 V

The embedded systems that don’t have powersupply of their own are connected to an external power

supply or can use charge pumps to get powered up.

2. Reset Circuit

It is an important circuit associated with an embedded

system. It is activated for a fixed period of time and then gets

deactivated. When the reset circuit is activated, the control

points to the default start-up address. After a few clock 

cycles, the reset circuit will be deactivated. This results in

the activation of the processor circuit, which will start

executing the program from the start-up address.

SOLUTIONS TO APRIL-2012, SET-1, QP3. Oscillator Circuits

It is the basic requirement of a processor to control

different clocking needs of the C.P.U, system timers and

C.P.U machine cycles. An oscillator circuit basically controls

the execution time of an instruction. It uses a crystal or a

ceramic resonator or an external IC oscillator to serve the

purpose of a clock circuit.

4. Input Devices, Interfacing/Driver Circuits

A keypad or a keyboard can be used as an input

device to provide user inputs to the embedded system. An

embedded system must be associated with the required

interfacing, key de-bouncing circuits and software drivers

to receive inputs from an input device.

5. Processor

Processor is the most essential part of an embedded

system. It comprises of two basic units, program flow Control

Unit (CU) and Execution Unit (EU). The Control Unit (CU)

contains a fetch unit that is responsible for fetching of 

instructions from the memory. The Execution Unit (EU)

contains an Arithmetic and Logic Unit (ALU) in addition to

the circuits that perform data transfer and data conversion

operations and that can execute instructions such as halt,

interrupt or jump to perform a program control task.

6. Timers

Timers are used to measure elapsed time or to countsome external events. A timer circuit is also called a Real-

Time Clock (RTC). A RTC also helps in determining software

controlled delays and time-outs.

7. Interrupt Controller

An embedded system handles interrupts from

different processes using an interrupt handling mechanism

called ‘interrupt controller’. When two or more devices are

connected to a system, the system processor must fulfill all

the requirements of these devices by running the appropriate

Interrupt Service Routines (ISRs). If at all an interrupt occurs,

the interrupt controller of the system handles it.

8. Program Memory and Data MemoryThe embedded systems use various types of 

memories to store program and data. They are,

(i) Read Only Memory (ROM) or PROM or

EPROM

For storing application programs.

(ii) Random Access Memory (RAM)

For storing variables and stacks during program

execution.

(iii) Flash, caches or EEPROM

For storing non-volatile results and copies of 

instructions and data.

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S.3Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

( JNTU-Kakinada ) B.Tech. IV-Year II-Sem.

9. Serial Communication Ports

An embedded system can perform serial

communication using a serial I/O port. A system can send or

receive a serial stream of bits along a serial port throughmodem. A serial port is preferred when a long distance

communication and interconnections are to be performed.

The different types of serial ports available are,

(i) Serial UART port [UART – Universal

Asynchronous Receiver and Transmitter]

(ii) Serial synchronous port

(iii) Serial interfacing port.

10. Parallel Ports

An embedded system can perform parallel

communication using parallel I/O ports. A system can send

or receive parallel streams of bits along a parallel port.

11. Outputs Interfacing/Driver Circuits

The embedded system displays the output on output

devices such as Light Emitting Diode (LED), Liquid Crystal

Display (LCD), Touch Screen Display (TSD) panel etc.,

performing write operation on the output ports.

12. System Application Specific Circuits

The applications such as signal processing, voice

processing, automatic control, instrumentation and data

acquisition can be run on a system only if the system has

the required application specific circuits and software for

both Digital Analog Conversion (DAC) unit and Analog -to-

Digital Conversion (ADC) unit.

(b) Explain with an example how to optimizecustom single purpose processors.

Answer : April-12, Set-1, Q1(b) M[8]

The process of making design metric values as best

as possible is called as ‘optimization’. The optimization of a

custom single purpose processor is a four step process.

They are,

(i) Optimizing original program

(ii) Optimizing FSMD

(iii) Optimizing datapath and

(iv) Optimizing FSM.

(i) Optimizing Original ProgramIn this step, essential factors which contribute in the

operation of a program like size of variables, time/space

complexity, operations used and number of computations

are analyzed to check if any improvement can be made to

further simplify the design.

(ii) Optimizing FSMD

After the algorithm is simplified in the best possible

way, the program that describes the algorithm is to FSMD.

In this step, improvements are done by merging and

separating the states and through a special task called

‘scheduling’.

The states which contains constant even after

transition are merged by eliminating the constants and

thereby simplifying the design. There are certain situations

in which a single state is broken down into two or morestates depending upon the complexity of an operation it

carries out. Suppose a state performs a complex operation of 

   

   ×+× e

d cba

2, then such a state is broken down into

smaller states to reduce the hardware size.

Scheduling is a process of assigning various tasks

to the different states of FSMD. It is the responsibility of 

scheduling to ensure that all the tasks of the original program

are properly distributed among the various states of FSMD.

(iii) Optimizing Data Path

In this step, design optimization is above through

‘allocation’ and ‘binding’.

Allocation is a process of carefully choosing single

RT component which can be used in multiple operations of 

different states. Similarly, binding is a process of reducing

unnecessary one-to-one mapping of operation and states.

If a same operation is present in two different states, then

instead of mapping two operation to two states, only one

operation is simultaneously mapped to two states. Thus,

helping in simplifying the design.

(iv) Optimizing the FSM

Optimization while designing a sequential circuit to

FSM is done by ‘state encoding’ or ‘state minimization’.

The process of making every state of FSM work properly by

assigning a unique bit pattern to each state is called as state

encoding. Similarly, state minimization is the process of 

reducing number of states in FSM by merging or combining

all the equivalent states.

Q2. (a) Explain the development environmentof general purpose processors used inan embedded system design with an

example.

Answer : April-11, Set-1, Q2(a) M[8]

Memory Architecture

Memory is used for the medium and long term storage

of information. The memory is basically divided into two parts

in a general purpose processor, namely, program memory and

data memory. The instructions that are to be executed for a

specific purpose are stored in program memory. The data in-

cluding the inputs and outputs given in a program or the data

to be transformed by a program is stored in data memory.

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S.4 Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

B.Tech. IV-Year II-Sem. ( JNTU-Kakinada )

Memory Classification

Memory is classified based on readable memory,

known as ROM (Read-only Memory) and both readable and

writeable memory, known as RAM (Random Access

Memory). Embedded system prefer ROM for program

memory. Constant data can be stored in ROM but it is

necessary to use RAM as data memory for other data.

Memory is further classified based on being on-chip

memory and off-chip memory. Off-chip memory is that, which is

placed on another IC, whereas on-chip memory refers to one

that is present on the same IC.

Figure shows the memory architecture of general

purpose processor.

Program

memory

Data

memory

Processor

Program

memory

Data

memory

Processor

Figure

Instruction Execution Operation

A general purpose processor follows a pipelined way

of execution. The stages in which the processor carries outthe execution is given as follows.

Step 1: Fetches the Instruction

It is the process of reading the next instruction into

the instruction register from the memory.

Step 2: Decodes the Instruction

This process determines the function of the

instruction that is present in the instruction register.

Step 3: Fetches the Operands

In this process the operands of the instructions are

moved into respective registers.

Step 4: Executes the instructions

The process of executing instructions through the

ALU and feeding the information back into its respective

registers.

Step 5: Stores Results

The process of storing the resulting information in

the memory.

Let us consider an example of washing clothes. Figure

(1) shows a non pipelined way of washing clothes.

1 2 3 4

1 2 3 4

1 2 3 4

time

Pour

water 1 2 3 41 2 3 4

1 2 3 41 2 3 4

1 2 3 41 2 3 4

time

Pour

water

Figure (1): Non-pipelined Method of Washing Clothes

1 2 3 4

1 2 3 4

1 2 3 4

time

Pour

water

Rinse

Dry

1 2 3 41 2 3 4

1 2 3 41 2 3 4

1 2 3 41 2 3 4

time

Pour

water

Rinse

Dry

Figure (2): Pipelined Method of Washing Clothes

Figure (2) shows a pipelined method of washing

clothes, where pouring water, rinsing and drying are done

parallely. Thus, pipelining methods save more time when

compared with non-pipelining methods.

(b) Explain the importance of the followingprocessors in embedded systems.

(i) Digital signal processor

(ii) ASSP.

Answer : April-12, Set-1, Q2(b) M[8]

(i) Digital Signal Processor (DSP)

A digital signal processor is a single chip VLSI unit

similar to that of a general purpose processor. It contains

Multiply and Accumulate (MAC) units of size 16 × 32 and

also has computational complexities of a microprocessor.

The DSP is a fundamental unit of an embedded system that

require efficient processing of its signals.

The characteristic features of a digital signal

processor are,

1. It generates fast, discrete-time and signal-processing instructions.

2. I t performs fas t processing of a Single

Instruction Multiple Data (SIMD), Discrete

Cosine Transformations (DCTs) and Inverse

DCT functions (IDCTs).

3. It possesses Very Large Instruction Word

(VLIW) processing capabilities.

These features speed up the execution of algorithms

to perform signal analyzing, filtering, echo-elimination,

coding, compression, decompression, noise cancellation etc.

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S.5Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

( JNTU-Kakinada ) B.Tech. IV-Year II-Sem.

The streams of families that include important DSPs

are,

Stream 1

TMS320CXX from Texas.

Stream 2

SHARC from Analog device.

Stream 3

5600X from Motorola.

The example of applications where DSPs are being

implemented are,

1. Image processing

2. Telecommunication processing systems

3. DSP modem

4. Audio

5. Video

6. HDTV

7. Multimedia.

DSPs are also used in systems where fast recognition

of image patterns and DNA sequences are required.

(ii) Application Specific System Processor (ASSP)

An application specific system processor is an

additional processing unit that executes application specific

tasks rather than doing processing using an embedded

software.

The ASSP can achieve real-time processing in

embedded systems such as setup boxes, digital television,

digital video disc or (DVD players), high-definition TV

decoders, video conferencing, web phones etc. For a real-

time video processing, a video compression and

decompression system is required. The MPEG-2 or MPEG-4

standards are used for a compression and decompression

purposes. These systems compress the video signals before

storage and transmission and decompress them prior to

retrieval. A single ASSP can be configured and interfaced to

the embedded system to achieve real-time processing.

Consider an embedded system which uses a specific

protocol to interconnect two different systems through a

specific bus architecture. It also requires encryption and

decryption of messages passed between them. The software

solution for performing these tasks is to embedded the

software and few RTOS features within the systems. The

hardwired solution for such application-specific processing

is to use ASSP chip. The software solution takes longer time

to carry out these tasks when compared to hardwired solution

(i.e., ASSP chip). The ASSP chip contains hardwired logic of 

TCP, UDP, IP, ARP and Ethernet 10/100 MAC (Media Access

Control).

Examples

W3100A from i2Chip

This ASSP chip provides a unique hardwired internet

connectivity solution and fulfills the need for TCP/IP

stack processing software. This solution is an RTOS-

less solution. It also provides five times faster outputs

when compared to a software solution using the

General Purpose Processors (GPPs) of the system.

The microcontroller in the embedded system that

interfaces with ASSP chip can also be used to provide

Ethernet connectivity in addition to providing

Internet connectivity.

IIM7100

This ASSP chip is a ‘Serial-to-Ethernet Converter’

that uses a hardware protocol stack to perform real-

time data processing. It does not require any changes

to be made in the application software or firmware.

The solution obtained from this ASSP chip is the

smallest RTOS-solution and also it is very economical.

Q3. (a) Describe program state machine modelwith relevant example.

Answer : April-12, Set-1, Q3(a) M[8]

For answer refer Unit-III, Q1, Topic: State Machine

Model.

(b) Discuss about concurrent processes.

Answer : April-12, Set-1, Q3(b) M[8]For answer refer Unit-III, Q14, Topic: Concurrent

Processes.

Q4. (a) What is meant by communicat ioninterface? Explain the need for commu-nication interfaces.

Answer : April-12, Set-1, Q4(a) M[8]

Communication Interface

The communication interface is an electrical or

electronic circuit that inter-links different devices in a network 

to enable communication between them. In embedded

systems, there are two types of communication interface.They are,

(i) Device/board level communication interface

(Onboard Communication Interface) and

(ii) Product level communication interface (External

Communication Interface).

The printed circuit board which internally connects

the different chips and devices of an embedded product is

an example of onboard communication interface. Where as,

ethernet which externally interlinks multiple embedded

systems and connects them on a LAN is an example of 

external communication interface.

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S.6 Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

B.Tech. IV-Year II-Sem. ( JNTU-Kakinada )

Need for Communication Interface

The need for communication interface are given as,

1. In order to share the data in a network, a communication interface is required.

2. In order to establish communication between two embedded systems a standard communication interface is necessary.

3. The station receiving the data will study and present it through a GUI (Graphical User Interface) with the help of a

communication interface.

4. For weather forecast, the system can be enabled by internet by using TCP/IP protocol and HTTP server.

5. If two mobiles want to share information bluetooth can be used, which is a popular communication interface. Even

for mobile to laptop communication blue tooth can be used.

6. Communication interfaces even support software upgradation.

(b) Illustrate with suitable example how to utilize ethernet as a communication interface.

Answer : April-12, Set-1, Q4(b) M[8]

Ethernet is a standard communication interface used to connect devices on a LAN. It is also known as IEEE 802.3

standard. A wired ethernet LAN connecting multiple embedded systems on one end and a computer on other end can be a

suitable example to show how an ethernet could be used as communication interface.

Computer

Ethernet

EM4EM3EM2EM1

Embedded systems

Computer

Ethernet

EM4EM3EM2EM1

Embedded systems

Figure (i) : Ethernet as a Communication Interface

The above figure contains multiple embedded systems which are monitored using a computer. Ethernet is a standard

protocol to connect a computer network on a LAN, printers, faxes and etc.

For remaining answer refer Unit-IV, Q10 (From 2nd para till end of the answer).

Q5. (a) Explain the use of semaphores for the critical sections of a Task.

Answer : April-12, Set-1, Q5(a) M[8]

The condition or a situation in RTOS when a single or multiple tasks try to access a system resource which is alreadyheld by a task, is called critical section. In such scenarios, binary semaphores- a type of semaphore, is used to share system

resources among multiple tasks. The binary semaphores acts like locks over critical sections. When a binary semaphore is

locked, it indicates that a task is in critical section and is currently running the resource. Similarly, when a binary semaphore

is unlocked it indicates that a resource is currently idle and can be accessed by a task.

When a binary semaphore is locked, no task can enter the system resource untill the task exits the corresponding

critical section and unlocks the binary semaphore. Thus, execution and synchronization of multiple tasks in critical section

is achieved by semaphores.

(b) Write notes on Task and Task States.

Answer : April-12, Set-1, Q5(b) M[8]

For answer refer Unit-V, Q7.

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S.7Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

( JNTU-Kakinada ) B.Tech. IV-Year II-Sem.

Q6. (a) What is meant by priority Inversion problem? Explain it with an example.

Answer : April-12, Set-1, Q6(a) M[8]

Priority Inversion Problem

The priority inversion problem arises when a resource is shared by two or more tasks. In this case, a situation arises

where a higher priority task has to wait till a lower priority task is executed. The low and high priority tasks are inversed.

The priority inversion problem can be better explained with the help of the following example.

Consider three tasks in a system with task 1 having the highest priority, task 2 with medium and task 3 with least

priority. Initially, assume task 3 is in running state and task 2 and 1 are waiting. Consider the figure below,

TASK 1 = 1

TASK 2 = 2

TASK 3 = 3

1

Ready

to run

1 and 2

Waiting

1

Running

3

Running

2

Running

3

Running

1

Running

3

Operates

semaphore

3

Running

1 Wants

semaphore

3 gets

semaphore

1

Ready

to run

1 and 2

Waiting

1

Running

3

Running

2

Running

3

Running

1

Running

3

Operates

semaphore

3

Running

1 Wants

semaphore

3 gets

semaphore

1 waiting

Previousstage

Nextstage

Figure

When task 3 is being executed, it gets a semaphore, but its operation is not completed. Next task-1 is ready to run and

its execution is started. Task 1 needs the semaphore, so it goes to waiting state and task-3 executes. After task-3, task-2 gets

executed which was ready-to-run. Next, task-3 starts running and when it releases the semaphore, task 1 gets executed. So,

in this way task-1 has to wait for a long time, although it has the highest priority. Here, the priorities of task-1 and 3 are

inversed. It is thus, called as the priority inversion problem.

(b) What is meant by pipe? How does a pipe differ from a queue? Explain with an example.

Answer : April-12, Set-1, Q6(b) M[8]

Pipes

For answer refer Unit-VII, Q10 , Topic: Pipes.

The pipes are also data structures like queue but differ in the following manner.

Message Queue Pipes

(i) Message queues have internal structure. (i) Pipes don’t have any internal structure i.e., a programmer

can just go on adding data bits to it.

(ii) It contains fixed-length data. (ii) It can hold variable length data.

(iii) The message queues are priority driven. (iii) Priorities cannot be assigned to data.

(iv) The state and status of a queue can be easily (iv) The state and status of pipe cannot be identified.

determined using a process.

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S.8 Embedded and Real Time Systems (April-2012, Set-1) JNTU-Kakinada 

B.Tech. IV-Year II-Sem. ( JNTU-Kakinada )

Q7. (a) Explain in brief the different Timer Functions.

Answer : April-12, Set-1, Q7(a) M[8]

For answer refer Unit-VII, Q2.

(b) Writes notes on Windows CE.

Answer : April-12, Set-1, Q7(b) M[8]

For answer refer Unit-III, Q12.

Q8. Explain the following related to embedded system design technology.

(a) Behavioral Synthesis.

Answer : April-12, Set-1, Q8(a) M[8]

Behavioral Synthesis

Behavioral synthesis is a high-level synthesis technique which optimizes a sequential program and converts it into

a single-purpose processor. Behavioral synthesis, apart from performing allocation and binding for a certain sequential

program it also needs to operate in scheduling the program. Scheduling is a process of designing states for every function

in a sequential program.

As far as allocation and binding are concerned, every variable has a storage unit, for every operation there is a

functional unit and for every data transfer there is a connection unit. To carry out these techniques advanced methods are

used in order to optimize a circuit.

(b) Hardware/Software co-verification.

Answer : April-12, Set-1, Q8(b) M[8]

Design verification is a process of ensuring whether a formulated design is correct/complete or not. A design is said

to be correct when all the design specifications are implemented accurately. While, a design is said to be complete when it

describes all the outputs in advance for all the relevant inputs.

There are two methods of hardware/software verification. They are ‘formal verification’ and ‘simulation’. In formal

verification, a design is verified on the basis that it approves or disapproves certain properties correctly or not. It is a very

complex process and is used only in verifying small designs or some specific design properties. On the other hand,

simulation is a very simple, easy and widely used verification process. In this method a software model is created and is runon the computer against the potential test cases. If the outputs of the test cases match the expected outputs, then the

corresponding design model is said to be verified else it is not. Simulation has a disadvantage, that it cannot verify design

model against all the possible inputs. Thus, designers using simulation method test the design model against a small set of 

inputs, which typically include all kinds of real-time input along with known boundary conditions.

Physically implementing a design and then testing it is not feasible due to the grave consequences that may arise.

Hence, simulation of a design is done before implementing it in real-time. Simulation provides several advantages which

makes it worth, like facilitating a designer to debug and test a design through providing controllability and observeability.

A designer can start and stop simulation of a design at any desired time and further more design can be tested over any

values or even though small intervals.

IC

FPGA

HE

Throughput model

ISS

CAS

RT-level HDC simulation

GT-level HDC simulation× 10,000,000

× 10,00,000

× 1,00,000

× 10,000

× 1,000

× 100

× 10

1 1 hour

1 day

4 days

1.4 months

1.2 years

12 years

> 1 life time

1 millenium

IC

FPGA

HE

Throughput model

ISS

CAS

RT-level HDC simulation

GT-level HDC simulation× 10,000,000

× 10,00,000

× 1,00,000

× 10,000

× 1,000

× 100

× 10

1 1 hour

1 day

4 days

1.4 months

1.2 years

12 years

> 1 life time

1 millenium

Figure (1): Comparison of Relative Speeds of Different Types of Simulation/Emulation and Real-time Execution