Lecture17 Ee474 Folded Cascode Ota

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  • 7/27/2019 Lecture17 Ee474 Folded Cascode Ota

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    Sam Palermo

    Analog & Mixed-Signal Center

    Texas A&M University

    ECEN474: (Analog) VLSI Circuit DesignFall 2010

    Lecture 17: Folded Cascode OTA

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    Announcements

    HW4 Due Friday 10/22 Exam 2 Wednesday Nov 3 9:10-10:10AM

    2

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    Agenda

    Single-Stage Cascode OTA Folded Cascode OTA

    3

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    Simple OTA

    4

    M1 M2Vi+ Vi-

    VDD

    VSS

    Rbias

    Itail

    M5 M6

    M3 M4

    CL

    Vo

    ( )621 || oomoutmv rrgRGA ==GainDC

    Gain is limited by single-transistor outputresistance

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    Single-Stage Cascode OTA

    Gain is larger by a gmro factor

    Output swing range is limiteddue to large compliancevoltage of cascode currentsource load

    5

    ( )6864241 || oomoommoutmv rrgrrggRGA =GainDC

    [Razavi]

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    Single-Stage Cascode OTAUnity Gain Feedback Voltage Range

    6

    ( )!!!athanLess

    RangeInput)(&Output

    conditionsatM2intopluggingandAs

    saturationM4bysetVMinimum

    saturationM2bysetVMaximum

    out

    out

    TH

    THGSTH

    xGSxb

    THbout

    THxout

    VVVV

    VVVV

    VVV

    VVV

    244

    4

    4

    2

    =

    +=

    +

    Cascode configuration constrains output & unity-gain swing

    [Razavi]

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    Folded Cascode Circuits

    7

    Folding about the cascode node will increase input and

    output swing range

    PMOS Input & NMOS Cascode

    NMOS Input & PMOS Cascode

    [Razavi]

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    Folded Cascode OTA

    8

    [Razavi]

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    Folded Cascode OTAUnity Gain Feedback Voltage Range

    9

    With proper (high-value) choice of Vb2, a decent output andinput swing range can be achieved

    1

    2 ||

    GSDSATIoutDSATNDSATNCout

    THPbout

    VVVVVV

    VVV

    MP

    Tail++

    +

    OR

    saturationsourcecurrenttailorcascodeNMOSoutputbysetVMinimum

    saturationbysetVMaximum

    out

    out

    MP

    MNC

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    TAMU-ELEN-474 2009 Jose Silva-Martinez

    - 1 0 -

    Folded-Cascode OTA: gm, rout and poles?

    VB1 and VB2 must keep M1

    - M5 in saturation region

    VB2 > Vsat,4 + VGS3

    VB1 < VDD - Vsat,5 VSG2

    Notice that ID5 biases both M2 and M1

    ( )( ) ( )43351221 ; dsmdsdsdsmdsoutmm rgrrrgrrgG =

    (for M4 sat)

    (for M5 sat)

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    TAMU-ELEN-474 2009 Jose Silva-Martinez

    - 11 -

    Example: Folded-Cascode OPAMP

    Find the gain and the phase from input to output and from input to node 2.

    The low frequency gain is 77 dB and the unity gain frequency is around 80 MHz.

    The behavior of the gain from the input to node 2 is interesting: above the dominant pole.

    51

    1

    oo

    m

    gg

    g

    +

    2

    1

    m

    m

    g

    g

    + Loutoo

    m

    z Crgg

    g 1

    51

    2

    2

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    TAMU-Elen-474 Jose Silva-Martinez-08

    - 1 2 -

    There is a limitation due the

    non- dominant pole

    IBIAS ADC

    Wcasc VDSAT

    +

    +

    =

    o

    L

    mc

    po

    md

    in

    o

    g

    Cs1g

    Cs1

    1

    g

    g

    v

    v

    TYPICAL FOLDED CASCODE (One of the most popular circuit in ADCs)

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    TAMU-Elen-474 Jose Silva-Martinez-08

    - 1 3 -

    FOLDED-CASCODE OTA

    Frequency response:

    Righ hand side

    Righ hand side: 2 poles (at VW and Vout)

    Left hand side: 4 poles !!! (at VX, VY, VZ and

    Vout)

    The poles at Vy and Vz are associated to

    N-type transistors higher frequencies

    ( )

    mp

    PC

    out

    outout1mV

    g

    sC1

    1

    g

    sC1

    1RgsA+

    +

    vin-

    2ID1

    M1

    MP

    vout

    VB2

    VB1vin+

    2ID1

    VB2 iOUT1

    2ID1

    VDD

    -VSSMN

    VB3

    MN

    VB1

    VW

    VX

    VY

    VZ

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    TAMU-Elen-474 Jose Silva-Martinez-08

    - 1 4 -

    Output referred noise

    M1 produces an output current given by

    Each transistor M2 generates a differential output

    current

    Similarly, for each transistor M5

    At low and medium frequencies, noise contribution

    of the cascode transistors can be neglected (M3 and

    M4)

    Vn4

    ro5

    i04

    M4054n4n

    054m4m04

    r

    vvrg1

    gi +=

    For cascode transistors

    1n1m01 vgi =

    2n2m02 vgi =

    5n5m05 vgi =

    vin-

    2ID1

    M1

    M2

    vout

    VB2

    VB1vin+

    2ID1

    VB2iOUT1

    2ID1

    VDD

    -VSSMN

    VB3

    MN

    VB1

    VWVX

    VY

    VZM4

    M5

    M3

    iout2 = 2(ieq1

    2 + ieq22 + ieqn

    2 )meq kTgi3

    82 =Remember

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    TAMU-Elen-474 Jose Silva-Martinez-08

    - 1 5 -

    Noise density and noise level

    The output referred current spectral density is

    And the input referred noise density becomes

    The noise level is

    25n

    25m

    22n

    22m

    21n

    21m

    2T0 vgvgvg2i ++=

    21m

    25n

    25m

    22n

    22m

    21n

    21m2

    in,eqg

    vgvgvg2v

    ++=

    ++==

    BW2

    1m

    25n

    25m

    21m

    22n

    22m2

    1nBW

    2in,eqnoise df

    g

    vg

    g

    vgv2dfvv

    FOLDED-CASCODE OTA

    vin-

    2ID

    1

    M1

    M2

    vout

    VB2

    VB1vin+

    2ID

    1

    VB2iOUT1

    2ID

    VDD

    -VSSM5

    VB3

    M5

    VB1

    VWVX

    VY

    VZ

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    TAMU-Elen-474 Jose Silva-Martinez-08

    - 1 6 -

    Noise level for the folded-cascode OTA

    Lets consider thermal noise (vn2 =(8/3)KT/(gm))

    Low-noise is associated with large gm1

    and relatively small gm2 and gm5

    ++=

    BW2

    1m

    25n

    25m

    21m

    22n

    22m2

    1nnoise dfg

    vg

    g

    vgv2v

    ++=

    BW m

    m

    m

    m

    m

    noise dfg

    g

    g

    g

    gkTv

    2

    1

    52

    1

    2

    1

    1

    3

    16

    ( )

    ++

    1

    5

    1

    2

    1

    18

    m

    m

    m

    m

    m

    noiseg

    g

    g

    gBW

    g

    kTv

    Or for a dominant (single) pole system with NBW = (/2)BW

    vin-

    2ID1

    M1

    M2

    vout

    VB2

    VB1vin+

    2ID1

    VB2iOUT1

    2ID1

    VDD

    -VSSM5

    VB3

    M5

    VB1

    VWVX

    VY

    VZ

    Noise of diff pair Noise Factor

    (due to other transistors)

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    Next Time

    Two Stage Miller OTA

    17