Micro Proc Ac Gen

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    VOL. 6, NO. 1, JAN.-FEB. 1982 J. E N E R G Y 49

    AIAA 80-9082R

    Application of a Microprocessor for AircraftElectrical Generator Control and Protection

    Patrick J. Leong,* IshaqueS. Mehdi , t and Teddy R. ThomasJBoeing M ilitary AirplaneCompany, Seattle, Wash.

    This paper describes the development of a microprocessor generator control unit (GCU) used for theprotection and control of an aircraft electrical generator system. The objectiveof this program is to replace thediscrete semicondu ctor analog logic circuitry of present GCUs with a m icrocomputer built around the Zilog Z80microprocessor. The design architecture is based on the use of an internal data bus for handling informationtransfer between the CPU and the buffer circuits which condition the external signalsof the GCU. A modularapproach has been used in the software development. A subroutine hasbeen developedfo r each of the protectiveand control funct ionsof the GCU. The overall program control is handled by an execu tive program.

    Introduction

    T HE greater use of electronics fo r mission aircraftavionics, and with power-by-wireon the horizon, hasincreased th e importance of having a reliable an d fault-tolerant electrical system.A key factor to achieving suchsystems is the implementation of power system control unitssuch as the gene ra to r control uni t (GCU) wi thmicroprocessors. This will facilitate the transmission of in-formation into and out of these units by a data bus. In -formation transfer is essential to the implementation of afault-tolerant electrical system with automaticload shedding,automatic bus switching, and the capability to be easilypro gram me d fo r specific mission scenarios. A stable fault-recovery strategy requires extensive coordination amongth eaffected control units .As a first step to achievingan advancedsystem, this projectto replace th e discrete logicin an aircraftGC U with a microcomputer buil t around th e Zilog Z80microprocessorwas initiated.

    System Configuration and OperationA one-line diagramof the electrical generation channelan d

    the GCU connections is shown in Fig. 1. The various com-ponents provide both analogand 28 V dc discrete logicoutputs to the GCU. Some of the components also requirediscrete inpu ts fromth e GCU. Table 1 summarizes th e inputsand outputs of each componentin relation to the GCU.

    As can be seen from Fig. 1, a good deal of signal con-dit ioning is required to interface th e CPU in the GCU to theelectrical system.A 12 bit analog-to-digital (A/D) converterprocesses th e analog signals and 8 bit counters are used to

    obta in f requencydata. Many of the signals are already indiscrete fo rm , 28 V dc. These signals are conditioned to 5 V dclevels to be compatible withth e microprocessor hardware.

    The basic functions of the GCU are toprovide excitat ion,control , and protection for an electrical generation channel.The primary function of the GCU is that of voltageregulation. During parallel operation,th e voltage regulatorwill automatically adjust th e excitation of the generator toinsure that th e reactive port ion of the load currentis dividedequally among all of the generators in the parallel system.

    Presented as Paper 80-9082 at the 15th Intersociety Energ y Con-version Eng ineering Con ference, Seattle, W ash., Au g. 18-22, 1980;submitted Oct. 23 , 1980; revision received Sept,24, 1981. Copyrig ht

    American In st i tuteof Aeronaut icsan d Astronautics, Inc., 1980.,All rightsreserved.* Specialist Engineer, Mechanical/Electrical Systems Technology,

    Advanced Airplane Branch.tSenior Eng ineering Supervisor, Mechanical/Electrical Systems

    Technology, Advanced Airplane Branch.^Senior Specialist Engineer, Mechanical/Electrical Systems

    Technology, Advanced Airplane Branch.

    Another funct ionof the GC U is toprovide proper controland

    coordination for the various contactors and relays in thesystem. Such control is provided for the generator controlrelay (GCR) a latching-typerelay in the GCU that opens andcloses th e generator field circuit;th e generator circuit breaker(GCB), wh ich connectsa generator to its bus; and the bus tiebreaker (BTB) which connectsth e main generator bus to thesynchronizing bus. A very important function of the GCU isto protect th e generator systemin the event of system faultsand to protect the load equipment connected to the systemfrom "out-of-limits" electrical power quality.The calibrationan d operating time delaysof the various protective circuitsaresuch as to selectively isolate any fault with a minimumreduction of generating capacity and a minimum interruptionof power to the airplane load buses. The GCU ; protectivefunctions an d their associated time delays ar e listed in Table2. All control and protection functionsare designed to allowautomatic operation of the electrical system with minimumcrew action. Crew interaction is provided through severalswitches.

    In designing th e GCU, all parallel ing functions weredeleted. Initially the GCU will operate only witha singleisolated generator system.The parallel ing functions willbeadded in the next generation of the GCU. The voltageregulation function willnot be included as a function of theCPU. It will be done with th e addition of a pulse-widthmodulated integrated circuit regulator.It was decided thatvoltage regulation wouldbe handled with hardware insteadofsoftware because th e algorithms involved in voltageregulation required enoughCPU t ime to necessitate th e

    addit ion of another processor.At the t ime of the initiation ofth e program, it was decided to use only one processor. Soft-ware voltage regulation w illbe includedin the next generationof th e microprocessor GCU.

    Microprocessor GCU HardwareThe GCU is buil t around a Zilog Z80 eight-bit

    microprocessor. This processor was chosen primarily for itsinterface simplicity and large instruction set . Memoryandinput /output funct ions are provided by a number ofperipheral circuit chips interfacing directlyto the paralleladdress, control , an d data buses of the Z80 CPU. Memory

    includes 4096 bytesof EPROM (erasable programmable readonly memory) an d 16,384 bytes of RAM (random accessmemory). Parallel input/ouput data is in ter faced throughfour Z80-PIO chips, each having two programmable eight-bitports , w hile t imingis controlled by a Z80-CTC countert imerchip. Analog vol tage inputsar e interfaced t h rough a 12-bitA/D conver terwith 32 mul t ip lexed analog inp uts .