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HAMAMATSU, JAPAN 200809-オープンプライス SY 011926 SERVICE MANUAL ’08.09 SPECIFICATIONS(総合仕様)..............................................4/6 PANEL LAYOUT(パネルレイアウト) ......................................8 CIRCUIT BOARD LAYOUT(ユニットレイアウト).................9 WIRING(束線組込図) ..............................................................9 DISASSEMBLY PROCEDURE(分解手順) ............................10 LSI PIN DESCRIPTION(LSI 端子機能表) .............................14 IC BLOCK DIAGRAM(IC ブロック図)..................................21 CIRCUIT BOARDS(シート基板図) .......................................23 FIRMWARE VERSION CHECK (ファームウェアバージョンの確認) ..................................34/35 BACKUP(バックアップ) ..................................................36/38 INITIAL SETTING(出荷時の設定) .........................................39 FACTORY SET(ファクトリーセット) ..................................40 TEST PROGRAM(テストプログラム) .............................41/53 BOOT SEQUENCE(起動シーケンス) .............................. 65/66 PARTS LIST BLOCK DIAGRAM(ブロックダイアグラム) CIRCUIT DIAGRAM(回路図) CONTENTS(目次) / MR816CSX Steinberg and Cubase are the registered trademarks of Steinberg Media Technologies GmbH. (SteinbergおよびCubaseは、Steinberg Media Technologies GmbH社(以下「Steinberg」)の登録商標です。) www.electronicsrepair.net

Mr816 Service Manual

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HAMAMATSU, JAPAN200809-SY 011926SERVICE MANUAL 08.09SPECIFICATIONS ..............................................4/6PANEL LAYOUT ......................................8CIRCUIT BOARD LAYOUT .................9WIRING ..............................................................9DISASSEMBLY PROCEDURE ............................10LSI PIN DESCRIPTIONLSI .............................14IC BLOCK DIAGRAMIC ..................................21CIRCUIT BOARDS .......................................23FIRMWARE VERSION CHECK ..................................34/35BACKUP ..................................................36/38INITIAL SETTING .........................................39FACTORY SET ..................................40TEST PROGRAM .............................41/53BOOT SEQUENCE.............................. 65/66PARTS LISTBLOCK DIAGRAMCIRCUIT DIAGRAM CONTENTS/MR816CSXSteinberg and Cubase are the registered trademarks of Steinberg Media Technologies GmbH.Steinberg Cubase Steinberg Media Technologies GmbH Steinbergwww.electronicsrepair.netMR816CSX/MR816X2 WARNINGComponents having special characteristics are marked and must be replaced with parts having specication equal to thoseoriginally installed.WARNING: This product contains chemicals known to the State of California to cause cancer, or birth defects or other reproductive harm.DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT SO EVER!Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose eyes to solder/ flux vapor!If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling food.IMPORTANT NOTICEThis manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed that basic service procedures inherent to the industry, and more specifically Yamaha Products, are already known and understood by the users, and have therefore not been restated. WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may have accumulated by grounding yourself to the ground bus in the unit (heavy gauge black wires connect to this bus.)IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power to the unit.IMPORTANT NOTICE FOR THE UNITED KINGDOMConnecting the Plug and CordIMPORTANT. The wires in this mains lead are coloured in accordance with the following code: BLUE : NEUTRAL BROWN : LIVEAs the colours of the wires in the mains lead of this apparatus may not correspond with the coloured markings identifying the terminals in your plug proceed as follows:The wire which is coloured BLUE must be connected to the terminal which is marked with the letter N or coloured BLACK.The wire which is coloured BROWN must be connected to the terminal which is marked with the letter L or coloured RED.Making sure that neither core is connected to the earth terminal of the three pin plug. This applies only to users in the United Kingdom. (2 wires) 3MR816CSX/MR816X SAVING DATASaving and backing up your data Storing the settings to internal memory of the MR816 CSX/MR816 X must be performed from the MR Editor on the computer. If you use the MR816 CSX/MR816 X with MR Editor, you can store the settings to internal memory by storing the settings as a Scene or recalling the Scene on the MR Editor. Also, you can save 20 Scenes as an Editor le to the computer. If you use the MR816 CSX/MR816 X with Cubase, you cannot store the settings to internal memory of the MR816 CSX/MR816 X. Save the settings as a project le to the computer. You should also save your Project les or Editor les onto external media as backup to avoid the loss of important data due to equipment malfunction or improper operation. If you want to store the settings edited on the MR816 CSX/MR816 X without a computer, launch the MR Editor with the computer and MR connected, then perform the Scene Store operation. This operation will store the settings to the internal memory of the MR816 CSX/MR816 X and the MR Editor as a Scene.Be sure toperform it MR Editor MR Editor MR Editor MR Editor [ ] [ ] Editor Cubase Cubase Editor MR Editor Editor MR Editor MR816CSX/MR816X4 SPECIFICATIONSElectrical CharacteristicsSample RateInternal 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHzExternal 44.1kHz, 48kHz, 88.2kHz, 96kHz ( 0.1%)Total Harmonic Distortion GAIN: Minimum 0.004% or less (1 kHz @ +18 dB, into 600 )Frequency Response(CH IN to LINE OUT)fs = 48 kHz 20 Hz20 kHz, +1, -3 dB @ +4 dB, into 600 fs = 96 kHz 20 Hz40 kHz, +1, -3 dB @ +4 dB, into 600 Dynamic Range(SN ratio at the maximum level)104 dB, DA converter (LINE OUT)97 dB, AD + DA (to LINE OUT)Hum & Noise(20 Hz20 kHz)Rs = 150 -118 dB, Equivalent input noise-86 dB, Residual output noise, Output fader: MinimumGAIN: Maximum -86 dB (90 dB SN), LINE OUTPAD: OFF Output channel fader: Nominal, All Input channel faders: MinimumGAIN: -60 dB -53 dB (57 dB SN), LINE OUTPAD: OFF Output channel fader: Nominal, Input channel fader (one channel): NominalMaximum Voltage Gain 84 dB, CH1 8 to LINE OUTCrosstalk @ 1 kHzGAIN: Minimum Adjacent Input-85 dB, CH1 8Input and Output SpecicationsAnalog Input TypeInput LevelNominal Level Maximum Level Input ImpedanceMIC/LINE/HI-Z jack 1,MIC/LINE jack 2 and MIC/LINE IN jacks 3 8 (CH1 8)XLR type balanced,+48 V Phantom powered-60 dBu to +10 dBu +24 dBu 3.5 kINSERT I/O jack 1 and 2 (INSERT IN) TRS phone type, unbalanced 0 dBu +14 dBu 10 kAnalog Input TypeOutput LevelNominal Level Maximum Level Input ImpedanceOUTPUT jacks 1 8(Line Output)TRS phone type, balanced +4 dBu +18 dBu 600 INSERT I/O jack 1 and 2(INSERT OUT)TRS phone type, unbalanced +4 dBu +18 dBu 10 kHeadphone jacks 1 and 2(Monitor 1/2)TRS phone type, unbalanced4 mW + 4 mW 25 mW + 25 mW 8 12 mW + 12 mW 75 mW + 75 mW 40 General SpecicationsPower Requirements 40 W (PA-30)Dimensions (H x D x W) 44 x 305 x 480 mmNet Weight 3.2 kgOperating Free-air Temperature Range +5 +35Included AccessoriesAC power adaptor (PA-30 or equivalent)DVD-ROM (Cubase AI 4)CD-ROM (TOOLS for MR)Getting Started manual (printed booklet)IEEE1394 cableRubber stoppers x 45MR816CSX/MR816XFunctionsInput Channels 1 8Analog InputMIC Preamp Discrete Class-A MIC preamp (Inverted Darlington Circuitry)[+48 V] button(Phantom Power switch)+48 V DC[PAD] button 0/26 dBGain knob 44 dB variable (-60 dB to -16 dB)Phase Normal/Reversed (controlled via a computer)High Pass FilterOFF/80 Hz (-12 dB/oct.)Controlled via a computer[HI-Z] switch On/off (for channel 1), Input impedance: 500 kAD converter 24 bit linear, Enhanced dual-bit delta-sigma conversion[SIG/PEAK] lamp-3 dB or mode (red), -40 db -3 dB (green) (when the clipping point of the signal is assumed to be 0 dB)Output Channels 1 8Analog OutputLevel ControlMulti Function Encoder knob control (for all the channels 1 8)Software control (for each of the channels 1 8)DA converter 24 bit linear, 128 times oversampling Advanced multi-bit delta/sigma conversionHeadphone jacks1 and 2Level Control Multi Function Encoder knob controlMaximum Output Level 25 mW (@ 8 )/75 mW (@ 40 )IEEE1394 jack Audio interface 16-ch input/16-ch outputEuropean modelsPurchaser/user Information specied in EN55103-1 and EN55103-2.Inrush current: 2.0 A (MR816 CSX), 2.0 A (MR816 X)Conforms to environments: E1, E2, E3, E4MR816CSX/MR816X6 Internal 44.1kHz48kHz88.2kHz96kHzExternal 44.1kHz48kHz88.2kHz96kHz 0.1% GAIN 0.004% 1kHz @ +18dB600 CH IN LINE OUTfs=48kHz 20Hz 20kHz+1-3dB @ +4dB600 fs=96kHz 20Hz 40kHz+1-3dB @ +4dB600 S/N 104dB DA LINE OUT97dB AD+DA LINE OUT20Hz 20kHzRs=150 -118dB -86dB GAIN -86dB90dB S/NLINE OUTPADGAIN-60dB -53dB57dB S/NLINE OUTPAD1 84dB CH1 8 LINE OUT@ 1kHz GAIN -85dB CH1 8 Type MIC/LINE/ HI-Z 1MIC/LINE 2MIC/LINEIN 3 8CH 1 8XLR +48V -60dBu +10dBu +24dBu 3.5kINSERT I/O 12INSERT INTRS 0dBu +14dBu 10k Type OUTPUT LINE OUT1 8TRS +4dBu +18dBu 600 INSERT I/O 12INSERT OUTTRS +4dBu +18dBu 10k12 TRS 4mW + 4mW 25mW + 25mW 8 12mW + 12mW 75mW + 75mW 40 40W PA-30H x D x W 44 x 305 x 480 mm 3.2kg +5 +35 PA-30 DVD-ROM Cubase AI 4CD-ROM TOOLS for MRMR816 CSX/MR816 X IEEE1394 x4 Rubber foot x47MR816CSX/MR816XCH1 8MIC Discrete Class-A MIC [+48V] +48V DC[PAD] 0/26dB 44dB -60dB -16dBPHASE / OFF/80Hz-12dB/oct.[HI-Z] ON/OFFCH1500k AD 24bit / [SIG/PEAK] -3dB -40dB -3dB0dB CH1 8 1 8 1 8 DA 24bit 128 / 12 12 25mW@ 8 /75mW@ 40 IEEE1394 I/F 16-ch input/16-ch outputMR816CSX/MR816X8 PANEL LAYOUTq [HI-Z] switchw [MIC/LINE/HI-Z] jack 1 (analog input jack 1) and [MIC/LINE] jack 2 (analog input jack 2)e [QUICK CONNECT] buttons (with LED lamps)r [SIG/PEAK] lampst Gain knobs 1 8y [+48V] button (phantom power button; with LED lamps)u [PAD] button (with LED lamps)i [ASSIGN] lamps (The [MORPH] lamp is only MR816CSX.)o Word Clock Source lamps!0 Sample Rate lamps!1 Multi Function encoder knobs 1 and 2 (with LED lamps)!2 Headphone jacks 1 and 2!3 [STANDBY/ON] switch@ @ @ @ MR816CSX onlyMR816CSX q [AC ADAPTOR IN] jackw [S/PDIF IN/OUT] jacke [OPTICAL IN/OUT] jackr IEEE1394 jacks 1 and 2t [WCLK IN/OUT] jacks (wordclock in/out jack)y [OUTPUT] jacks 1 8 (analog output jacks 1 8)u [MIC/LINE INPUT] jacks 3 8 (analog input jacks 3 8)i [INSERT I/O] jacks 1 and 2 @ @ @ Front panel Rear panelq [HI-Z] w [MIC/LINE/HI-Z] 1 1 [MIC/LINE] 2 2e [QUICK CONNECT] LED r [SIG/PEAK] t 1 8y [+48V] LED u [PAD] LED i [ASSIGN] [MORPH] MR816CSX o !0 !1 12 LED !2 12!3 [STANDBY/ON] q [AC ADAPTOR IN] w [S/PDIF IN/OUT] e [OPTICAL IN/OUT] r IEEE1394 12t [WCLK IN/OUT] / y [OUTPUT] 1 8 1 8u [MIC/LINE INPUT] 3 8 3 8i [INSERT I/O] 129MR816CSX/MR816XACPNHPDMJK CIRCUIT BOARD LAYOUT WIRINGJKPNHPDMACCN301(12P)CN901(12P)CN851(2P)CN104(4P)CN850(2P)CN112 (30P)CN101 (30P)CN102 (30P)CN111 (30P)CN601(6P)CN651(7P)CN701(6P)CN602(6P)CN652(7P)CN702(6P)CN201(8P)CN800(8P)CN102(5P)CN103(4P)CN101(3P)CN151(4P)PSW wiring assemblyAC wiring assemblyMR816CSX/MR816X10 DISASSEMBLY PROCEDUREFig. 11Photo 11Precautions* Notes on Flat Cable Contacts are visible from the back. Pay attention not to insert and install the cable to the connector inversely. (Photo 1)Front Side Back SideWe recommend you use the dedicated driver bit from HIOS Inc. (model number: THS6X-30-75) when you remove screws marked [118], [148A], [148B] or [148C].[118][148A][148B][148C] HIOS Inc. THS6X-30-75[148A] x 2[148A] x 2[148A] x 3[148A]x 3[118][118][148B] x 3[148C] x 3[144] [142] [142] [142][144][144] [172] Rear viewTOP COVER()CONNECTOR COVER()TOP COVER()FRONT PANEL()FABRIC GASKET()FABRIC GASKET()[118]: SCREW RAMI #SS3.0X6 MFZN2B3 (WN110000)[142]: BIND HEAD P-TIGHT SCREWPBIND3.0X8 MFZN2B3 (WF266600)[144]: BIND HEAD TAPPING SCREW-SSBIND3.0X6 MFZN2B3 (WE87780R)[148A], [148B], [148C]: SCREW RAMI #SS3.0X6 MFZN2B3 (WN110000)[172]: BIND HEAD TAPPING SCREW-SSBIND3.0X6 MFZN2B3 (WE87780R) 111MR816CSX/MR816X1. Top Cover (Time required: About 6 minutes)1-1 Remove the following screws and slide the top cover toward the rear side to remove it. (Fig. 1) [142]: 16 pcs. [144]: 8 pcs. [148A]: 10 pcs. [148B]: 3 pcs. [172]: 1 pc. * The connector cover will be removed together when the screw marked [172] is removed. Take care not to lose it. (Fig. 1)2. JK Circuit Board (Time required: About 7 minutes)2-1 Remove the top cover. (See procedure 1.)2-2 Unhook the three (3) hooks of the PCB space holder. The JK circuit board can then be removed. (Photo 2)Fig. 22Photo 22JKPCB SPACE HOLDER(PCB)[56][56][52A][52B][22A][22B] Top viewWIRING ASS'Y, AC(AC)WIRING ASS'Y, AC(AC)CORD HOLDER X 4()FABRIC GASKET()DMAC1 2PCB SPACE HOLDER(PCB)1. 6 1-1 1[142]: 16 [144]: 8 [148A]: 10 [148B]: 3 [172]: 1 [172] 12. JK 7 2-1 1 2-2 PCB 3 JK2[22A], [22B]: BIND HEAD TAPPING SCREW-SSBIND3.0X6 MFZN2B3 (WE87780R)[52A], [52B]: BIND HEAD TAPPING SCREW-SSBIND3.0X6 MFZN2B3 (WE87780R)[56]: BIND HEAD TAPPING SCREW-SSBIND4.0X8 MFZN2B3 (WE99480R)MR816CSX/MR816X12Fig. 333. AC Circuit Board and Wiring Ass'y, AC (Time required: About 7 minutes)3-1 Remove the top cover. (See procedure 1.)3-2 Remove the two (2) screws marked [52A], the screw marked [52B] tightened together with the cord holder, and the screw marked [56]. The AC circuit board and wiring ass'y, AC can then be removed. (Fig. 2) * The fabric gasket attached to the wiring ass'y, AC is not part of the wiring ass'y, AC. (Fig. 2)4. Front Panel (Time required: About 8 minutes)4-1 Remove the eight (8) knobs marked [A] and two (2) knobs marked [B]. (Fig. 3)4-2 Remove the two (2) screws marked [118], three (3) screws marked [148B] and three (3) screws marked [148C]. The front panel can then be removed. (Fig. 1) * The lenses attached to the rear side of the front panel is not part of the front panel. (Fig. 3)5. PN Circuit Board, HP Circuit Board and Wiring Ass'y, PSW5-1 Remove the top cover. (See procedure 1.)5-2 Remove the front panel. (See procedure 4.)5-3 PN Circuit Board (Time required: About 11 minutes)5-3-1 Remove the four (4) screws marked [104]. The two (2) combo angles can then be removed. (Fig. 4)5-3-2 Remove the four (4) screws marked [46] and eight (8) hexagonal nuts marked [48]. The PN circuit board can then be removed. (Fig. 4)5-3-3 Remove the eight (8) buttons marked [C] and two (2) buttons marked [D] from the PN circuit board. (Fig. 4) * The buttons marked [C] and [D] are not part of the PN circuit board. When replacing the PN circuit board, remove the buttons and attach them to the new PN circuit board. * When installing the PN circuit board, tighten the screws 1 and 2 shown in Fig. 4 in numerical order and then tighten the other screws. (Fig. 4)5-4 HP Circuit Board and Wiring Ass'y, PSW (Time required: About 10 minutes)5-4-1 Remove the screw marked [62] and remove the HP circuit board and wiring assy PSW by sliding them toward the front side. (Fig. 4, Fig. 5)3. AC AC 7 3-1 1 3-2 [52A] 2 [52B] 1 [56] 1 ACAC 2 AC AC24. 8 4-1 [A] 8 [B] 2 34-2 [118] 2 [148B] 3 [148C] 3 1 35. PN HP PSW5-1 1 5-2 4 5-3 PN 11 5-3-1 [104] 4 245-3-2 [46] 4 [48] 8 PN 45-3-3 PN [C] 8 [D] 2 4 [C] [D] PN PN PN PN 4 12 45-4 HP PSW10 5-4-1 [62] 1 HP PSW 45[A]Lens Lens[B] Front view Rear viewFRONT PANEL()FRONT PANEL()13MR816CSX/MR816XFig. 44Fig. 556. DM Circuit Board (Time required: About 11 minutes)6-1 Remove the top cover. (See procedure 1.)6-2 Remove the JK circuit board. (See procedure 2.)6-3 Remove the front panel. (See procedure 4.)6-4 Remove the four (4) screws marked [104]. The two (2) combo angles can then be removed. (Fig. 4)6-5 Remove the eight (8) hexagonal nuts marked [48]. (Fig. 4)6-6 Remove the three (3) screws marked [22A] tightened together with the cord holder and seven (7) screws marked [22B]. The DM circuit board can then be removed. (Fig. 2) * The fabric gasket attached to the DM circuit board is not part of the DM circuit board. (Fig. 1) * The PCB space holder are not part of the DM circuit board. When replacing the DM circuit board, remove the PCB space holder and attach them to the new DM circuit board.(Fig. 2) * When installing the DM circuit board, tighten the screws 1 and 2 shown in Fig. 2 in numerical order and then tighten the other screws. (Fig. 2)5-4-2 JK PSW55-4-3 U 2 HP 55-4-2 Remove the wiring ass'y, PSW from the JK switch angle. (Fig. 5)5-4-3 Remove the two (2) angle brackets, U. The HP circuit board can then be removed. (Fig. 5)6. DM11 6-1 1 6-2 JK 2 6-3 4 6-4 [104] 4 246-5 [48] 8 46-6 [22A] 3 [22B] 7 DM2 DMDM1 PCB DMDMPCB DM2 DM2 12 2 Front view[104] [104] [48] [C] [C] [D][46] [62]COMBO ANGLE()[48] [48] [46] WIRING ASS'Y, PSW(PSW)PN12[46]: BIND HEAD TAPPING SCREW-SSBIND3.0X6 MFZN2B3 (WE87780R)[48]: HEXAGONAL NUT9.0 MFNI33 (V243140R)[62]: BIND HEAD TAPPING SCREW-SSBIND3.0X6 MFZN2B3 (WE87780R)[104]: FLAT HEAD TAPPING SCREW-BBFLAT3.0X8 MFZN2B3 (WF266800)[62]WIRING ASS'Y, PSW(PSW)WIRING ASS'Y, PSW(PSW)JK SWITCH ANGLE(JK)JK SWITCH ANGLE(JK)ANGLE BRACKET, U()ANGLE BRACKET, U()HPHP[62]: BIND HEAD TAPPING SCREW-SSBIND3.0X6 MFZN2B3 (WE87780R)MR816CSX/MR816X14 LSI PIN DESCRIPTIONLSI 1394AV-L (X6893A00) DICEII ..................................................................................................... 16 17AK4358VQ (X4289A00) DAC (Digital to Analog Converter) ................................................................ 20AK5385BVF-E2 (X5364B00) ADC (Analog to Digital Converter) ........................................................ 19EP1C3T100C8N (X5691A00) FPGA.................................................................................................... 14MB87S1280 (X6363A00) SSP1 (MAIN/SUB) ...................................................................................... 18MN101C027YB (XS71120R) CPU ....................................................................................................... 15S1L50553F21Y000 (X4195A0R) MCI (Gate Array) ............................................................................. 19TSB41AB2PAP (XZ665A00) PHY ....................................................................................................... 15YAC523-VZ (X4325A00) EVR2 (Electric Variable Resistance 2) ......................................................... 20PINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849IOIOIOIOIOnCSODATA0nCONFIGVCCA_PLL1CLK0GNDA_PLL1nCEOnCEMSEL0MSEL1DCLKASDOVCCIO1GNDIOIOIOIOIOIOIOIOIOIOGNDVCCIO4GNDVCCINTIOIOIOIOIOIOIOIOIOGNDVCCINTGNDVCCIO4IOIOIOI/OI/OI/OI/OI/OOII-I-OIIII/OO--I/OI/OI/OI/OI/OI/OI/OI/OI/OI/O-I/O--I/OI/OI/OI/OI/OI/OI/OI/OI/O---I/OI/OI/OI/OPAD[4]PAD[3]AVC_SCLK Data I/Os AVC_DATAIAVC_CSChip select output that enables/disables a serial configuration device.Dedicated configuration data input pinDedicated configuration control inputAnalog power for PLL1Dedicated global clock inputAnalog ground for PLL1Output that drives low when device configu- ration is complete.Active-low chip enableDedicated mode select control pins that set the configuration mode for the device.Clock input (PS mode) or output (AS mode)Active serial data output from the Cyclone deviceI/O supply voltage pin for bank 1GroundP48V[8]P48V[7]P48V[6]P48V[5]P48V[4]Data I/OsP48V[3]DA4358_CSDA4382_CSDA_CDTIDA_CCLKGroundI/O supply voltage pin for bank 4GroundInternal logic array voltage supply pinCLK18MP48V[1]PAD[1]P48V[2]PAD[2] Data I/OsAnalog_MUTEDSP_MUTE/DAC1_MUTE/DAC2_MUTEMUTE_REQMUTE_OFFGroundInternal logic array voltage supply pinGroundI/O supply voltage pin for bank 4EN[1]EN[2] Data I/OsEN[3]5051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100IOIOIOIOIOIOIOIOGNDVCCIO3CONF_DONEnSTATUSTCKTMSTDOIOCLK2TDIIOIOIOIOIOIOIOIOIOIOIOIOVCCIO2GNDVCCINTGNDIOIOIOIOIOIOIOIOIOVCCINTGNDVCCIO2GNDIOIOIOIOI/OI/OI/OI/OI/OI/OI/OI/O-I/O--IIOI/OIII/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/O---I/OI/OI/OI/OI/OI/OI/OI/OI/O--I/O-I/OI/OI/OI/OEN[4]MMD[7]MMD[6]MMD[5]Data I/OsMMD[4]MMD[3]MMD[2]MMD[1]GroundI/O supply voltage pin for bank 3Dedicated configuration status pinDedicated JTAG input pinDedicated JTAG output pinMMD[0]Dedicated global clock inputDedicated JTAG input pinCD60RDCS61WRCS62WRCS63WRMMA[1]MIRQData I/OsMCI_SIRQDICE_IRQODA_MUTEDICE_MUTEAES_MUTE/WCK_MUTEFW_MUTEI/O supply voltage pin for bank 2GroundInternal logic array voltage supply pinGroundFS_CLKTL1DODATA[2]DODATA[1]DIDATA[2] Data I/OsDIDATA[1]DSAI_DODSAI_DIDSAI_FsInternal logic array voltage supply pinGroundI/O supply voltage pin for bank 2GroundPAD[8]PAD[7] Data I/OsPAD[6]PAD[5]EP1C3T100C8N (X5691A00) FPGA DM: IC12315MR816CSX/MR816XPINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME1234567891011121314151617181920212223242526272829303132S1S2S3S4S5VREF+VDDOSC2OSC1VSSXIXOMMODRD0RXDD0D1D2D3D4/RSTD5D6D7D8D9S6S7S8S9S10S11IIIII--OI-IOIOIOOOOOIOOOOOIIIIIISwitch matrix dataPower supply (+5V, analog)Power supply (+5V)Crystal oscillator (8MHz)Crystal oscillator (8MHz)GroundNot usedNot usedMemory mode select (Grounded)Rotary encoder dataMIDI receive dataLED and switch drive dataResetLED and switch drive dataSwitch matrix data3334353637383940414243444546474849505152535455565758596061626364S12S13S14TXDS15S16S17S18L16L17L18L19L8L9L10L11L12L13L14L15L7L6L5L4L3L2L1L0VREFAD0AD1S0IIIOIIIIOOOOOOOOOOOOOOOOOOOO-IIISwitch matrix dataMIDI transmit dataSwitch matrix dataLED drive dataLED and switch drive dataGroundedAnalog inputAnalog inputSwitch matrix dataMN101C027YB (XS71120R) CPU DM: IC150PINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME1234567891011121314151617181920212223242526272829303132LREQSYSCLKCNACTL0CTL1D0D1D2D3D4D5D6D7PDLPSNCDGNDDGNDC/LKONPC0PC1PC2ISOCPSDVDDDVDDTESTMSESMAVDDAVDDAGNDIOOI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OII--I/OIIIII--III---3334353637383940414243444546474849505152535455565758596061626364AGNDTPB0TPB0+TPA0TPA0+TPBIAS0AGNDR0R1AVDDTPB1TPB1+TPA1TPA1+TPBIAS1AGNDAGNDAGNDAVDDAVDDRESETFILTER0FILTER1PLLVDDPLLGNDPLLGNDXIXODVDDDVDDDGNDDGND-I/OI/OI/OI/OI/O----I/OI/OI/OI/OI/O-----II/OI/O---------LLC request inputSystem clock outputCable-not-active outputControl I/OsData I/OsPower-down inputLink power status inputNo connectionDigital groundBus manager contender programming input and link-on outputPower class programming inputsLink interface isolation control inputCable power status inputDigital power supplyTest control inputTest control inputTest control inputAnalog power supplyAnalog groundAnalog groundTwisted-pair cable B differential signalTwisted-pair cable A differential signalTwisted-pair bias outputAnalog groundCurrent setting resistorAnalog power supplyTwisted-pair cable B differential signalTwisted-pair cable A differential signalTwisted-pair bias outputAnalog groundAnalog power supplyLogic reset inputPLL filterPLL power supplyPLL groundCrystal oscillator inputsDigital power supplyDigital groundTSB41AB2PAP (XZ665A00) PHY DM: IC101MR816CSX/MR816X16PINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768OUTERNO.A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15C16C17C18C19C20D1D2D3D4D5D6D7D8VSS3OPSRAM_WEGPIO4/SRAM_READYI2C_CLKUART0_TXTRSTTDISCMORESETTCB[6]TCA[6]VDD3OPVSS3IVDD3OPTCB[1]TCA[0]REFII2S_RX0_D3I2S_RX0_BICKI2S_RX0_MCKD0SRAM_BS[1]SRAM_BS[0]CS0UART1_RXVDD1IHTDOTMSPLLEVDD3OPTCA[5]TCB[4]TCB[3]TCB[2]TCA[1]FS32I2S_RX0_D0I2S_RX0_LRCK I2S_TX0_D3 I2S_TX0_D1D5D1SRAM_OECS3/EN4_B/GPIO6I2C_DATAUART1_TXVSS3ITCKNLIGTCA[7]TCB[5]TCA[4]TCA[3]TCA[2]TCB[0]REFOI2S_RX0_D1I2S_TX0_D2I2S_TX0_D0GPIO7/ I2S_TX0_MCKD6D2D3VSS3OPCS2/EN4_A/GPIO5VDD3OPUART0_RXVSS3OPOI/OI/OOIIIIOOOOIIOOI/OOOOIOIIOOOOOOIOOOI/OI/OOI/OI/OOIIOOOOOOOIOOI/OI/OI/OI/OI/OII/O groundSRAM write enableGeneral purpose I/O / SRAM ready (read enable)I2C ClockSerial outputJTAG - Test reset (active low)JTAG - Test data inScan mode selectReset - active lowTest pinTest pinI/O 3.3VCore groundI/O 3.3VTest pinI2S Receiver 0 Data (ch.6/7)I2S Receiver 0 Bit clockI2S Receiver 0 Master clockData busSRAM upper byte selectSRAM lower byte selectChip selectSerial intputCore 1.8VJTAG - Test data outJTAG - Test mode selectPLL enableI/O 3.3VTest pinI2S Receiver 0 Data (ch.0/1)I2S Receiver 0 Left/Right clockI2S Transmitter 0 Data ch.6/7I2S Transmitter 0 Data ch.2/3Data busSRAM output enableChip select / Rotary encoder input / General purpose I/OI2C DataSerial outputCore groundJTAG - Test clockIgnore PLL no-lock before releasing reset, active high.Test pinI2S Receiver 0 Data (ch.2/3)I2S Transmitter 0 Data ch.4/5I2S Transmitter 0 Data ch.0/1General purpose I/O / I2S Transmitter 0 Master clockData busI/O groundChip select / Rotary encoder input / General purpose I/OI/O 3.3VSerial intputI/O ground69707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136OUTERNO.D9D10D11D12D13D14D15D16D17D18D19D20E1E2E3E4E17E18E19E20F1F2F3F4F17F18F19F20G1G2G3G4G17G18G19G20H1H2H3H4H17H18H19H20J1J2J3J4J9J10J11J12J17J18J19J20K1K2K3K4K9K10K11K12K17K18K19K20TEMOTCB[7]VDD3OPVDD1IHVSS3OPVDD3OPVDD3OPI2S_RX0_D2VSS3OPGPIO9/ I2S_TX0_LRCLKVDD1IHI2S_RX1_D1D9D8D7D4GPIO8/I2S_TX0_BICKVSS3II2S_RX1_D0I2S_RX1_MCKD13D12D10VDD3OPVDD3OPI2S_RX1_LRCK I2S_TX1_D1I2S_TX1_LRCLKVSS3ID15D14D11I2S_RX1_BICK I2S_TX1_D0I2S_TX1_BICKI2S_TX1_MCKA1A0VDD1IHVSS3OPVSS3OPI2S_RX2_D1I2S_RX2_D0I2S_RX2_LRCKA5A4A3A2VSS3OPVSS3OPVSS3OPVSS3OPI2S_RX2_BICKI2S_RX2_MCK I2S_TX2_D1 I2S_TX2_D0A8A6A7VDD3OPVSS3OPVSS3OPVSS3OPVSS3OPGPIO12/I2S_TX2_LRCLKGPIO11/I2S_TX2_BICKGPIO10/I2S_TX2_MCKHPX1IOII/OII/OI/OI/OI/OI/OIOI/OI/OI/OOOOI/OI/OI/OOOOOOOIIOOOOOOOOOOOOI/OI/OI/OOTest mode pinTest pinI/O 3.3VCore 1.8VI/O groundI/O 3.3VI2S Receiver 0 Data (ch.4/5)I/O groundGeneral purpose I/O / I2S Transmitter 0 Left/Right clockCore 1.8VI2S Receiver 1 Data (ch.2/3)Data busGeneral purpose I/O / I2S Transmitter 0 Bit clockCore groundI2S Receiver 1 Data (ch.0/1)I2S Receiver 1 Master clockData busI/O 3.3VI2S Receiver 1 Left/Right clockI2S Transmitter 1 Data ch.2/3I2S Transmitter 1 Left/Right clockCore groundData busI2S Receiver 1 Bit clockI2S Transmitter 1 Data ch.0/1I2S Transmitter 1 Bit clockI2S Transmitter 1 Master clockAddress busCore 1.8VI/O groundI2S Receiver 2 Data (ch.2/3)I2S Receiver 2 Data (ch.0/1)I2S Receiver 2 Left/Right clockAddress busI/O groundI2S Receiver 2 Bit clockI2S Receiver 2 Master clockI2S Transmitter 2 Data ch.2/3I2S Transmitter 2 Data ch.0/1Address busI/O 3.3VI/O groundGeneral purpose I/O / I2S Transmitter 2 Left/Right clockGeneral purpose I/O / I2S Transmitter 2 Bit clockGeneral purpose I/O / I2S Transmitter 2 Master clockGPIO(Z)1394AV-L (X6893A00) DICEII DM: IC10317MR816CSX/MR816XPINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204OUTERNO.L1L2L3L4L9L10L11L12L17L18L19L20M1M2M3M4M9M10M11M12M17M18M19M20N1N2N3N4N17N18N19N20P1P2P3P4P17P18P19P20R1R2R3R4R17R18R19R20T1T2T3T4T17T18T19T20U1U2U3U4U5U6U7U8U9U10U11U12A9A10A11A12VSS3OPVSS3OPVSS3OPVSS3OPVDD3OPHPX3PLL_1V8 (HPLL1)HPX2A13A14A15A16VSS3OPVSS3OPVSS3OPVSS3OPFILTER_HPLL2PLL_GND (HPLL1)PLL_BULK (HPLL1)FILTER_HPLL1A17A18A19VSS3OPVSS3OPPLL_GND (HPLL2)PLL_BULK (HPLL2)PLL_1V8 (HPLL2)A20/CS7/EN1_AA21/CS6/EN1_BA23/CS4/EN2_B/GPO6CLKOVSS3IPLL_BULK (CLK_CBL)PLL_1V8 (CLK_DBL)FILTER_CLK_DBLA22/CS5/EN2_AVSS3IGPIO1/CLKEVDD3OPVDD3OPXTAL1VDD1IHPLL_GND (CLK_DBL)VDD1IHRASSDRAM_WESDRAM_DQM1DSAI_TX0DSAI_TX3VDD3OPXTAL2CASCS1SDRAM_BNK0VSS3OPPHD5VDD3OPPHLPVSS3OPVD5/TDF_IFS0/U1_DSR/HFS1VDD3OPGPIO15/WCKO/TDF_OEM/U0_OUT2FILTER_TDIFOOOOI/OOOOOOAAOOOI/OI/OI/OOAI/OI/OIOOOOOOOOOI/OOI/OI/OAAddress busI/O groundI/O 3.3VGPIOPLL 1.8VGPIO(Z)Address busI/O groundJETPLL filter component connectionPLL groundPLL bulk biasJETPLL filter component connectionAddress busI/O groundPLL groundPLL bulk biasPLL 1.8VAddress bus / Chip select / Rotary encoder inputAddress bus / Chip select / Rotary encoder input / General purposeSDRAM interface AHB Bus clockCore groundPLL bulk biasPLL 1.8VClock Doubler VCO filter component connectionAddress bus / Chip select / Rotary encoder inputCore groundGeneral purpose I/O / SDRAM interface Clock enableI/O 3.3VXTAL for clock doubler/power manager/LLCCore 1.8VPLL groundCore 1.8VSDRAM interface Row address strobeSDRAM interface Write enableSDRAM interface Upper byte maskDSAI Transmitter 0 data lineDSAI Transmitter 3 data lineI/O 3.3VXTAL for clock doubler/power manager/LLCSDRAM interface Column address strobeChip selectSDRAM interface Bank addsessI/O groundPHY tristable data line bit 5I/O 3.3VLink power status. Pulsing if isolation barrier present.I/O groundVideo interface - Data byte bit 5 / TDIF sample rate 0 input / Data set ready UART status input / 512fs base rate clockI/O 3.3VGeneral purpose I/O / Word clock out / TDIF emphasis output / UART control programmable output 2 outputTDIF Receiver VCO filter component connection205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272OUTERNO.U13U14U15U16U17U18U19U20V1V2V3V4V5V6V7V8V9V10V11V12V13V14V15V16V17V18V19V20W1W2W3W4W5W6W7W8W9W10W11W12W13W14W15W16W17W18W19W20Y1Y2Y3Y4Y5Y6Y7Y8Y9Y10Y11Y12Y13Y14Y15Y16Y17Y18Y19Y20VSS3OPAES_RX2VDD3OPDSAI_RX1VSS3OPDSAI_SYNCDDSAI_CKDDSAI_TX2SDRAM_DQM0SDRAM_BNK1EN3_B/GPIO3/SDRAM_BNK3PHD4PHCT0PHLRVDD1IHVD2/TDF_I2/U0_DCDVD6/TDF_IFS1/U1_DCD/HFS2VCLK/TDF_O2/U1_OUT1GPIO14/WCKI/TDF_OFS1/U0_OUT1PLL_1V8 (AES,ADAT,TDIF)PLL_GND (AES,ADAT,TDIF)EXT_512BRAES_RX3AES_TX2DSAI_RX2DSAI_SYNCADSAI_SYNCCDSAI_TX1EN3_A /GPIO2/SDRAM_BNK2SCLKPHD1PHD3PHCT1PHLOVD0/TDF_I0/U0_CTSVD3/TDF_I3/U0_RIVD7/TDF_IEM/U1_RIVRDY/TDF_O1/U1_RTSGPIO13/BLKS/TDF_OFS0/U0_RTSVSS3IFILTER_AESOPTIAES_RX0AES_TX0AES_TX3DSAI_RX3DSAI_CKBDSAI_CKCPHD0PHD2PHD6PHD7PHDIVSS3IVD1/TDF_I1/U0_DSRVD4/TDF_ILR/U1_CTSVFSYNC/TDF_O0/U1_DTSVEND_DB/TDF_O3/U1_OUT2VVALID/TDF_OLR/U0_DTSVDD1IHFILTER_ADATOPTPEXT_FBRAES_RX1AES_TX1DSAI_RX0DSAI_CKADSAI_SYNCBIII/OI/OOOOI/OI/OI/OOI/OI/OI/OI/OI/OIOII/OI/OOI/OII/OI/OI/OII/OI/OI/OI/OI/OAIIOOII/OI/OI/OI/OI/OI/OII/OI/OI/OI/OI/OAOI/O1OII/OI/OI/O groundAES3 Receiver ch4/5I/O 3.3VDSAI Receiver 1 data lineI/O groundDSAI Sync DDSAI Clock DDSAI Transmitter 2 data lineSDRAM interface Lower byte maskSDRAM interface Bank addsessRotary encoder input / General purpose I/O / SDRAM interface Bank addsessPHY tristable data line bit 4PHY tristable control line bit 0Serial request output from S-LINK(Z)Core 1.8VVideo interface - Data byte bit 2 / TDIF audio data input 3 / Data carrier detect UART status inputVideo interface - Data byte bit 6 / TDIF sample rate 1 input / Data carrier detect UART status input / 512fs base rate clockVideo interface - Video Clock / TDIF audio data output 3 / UART control programmable output 1 outputGeneral purpose I/O / Word clock in / TDIF sample rate 1 output / UART control programmable output 1 outputPLL 1.8VPLL groundExternal 512 x base rate clockAES3 Receiver ch.6/7AES3 Transmitter ch.4/5DSAI Receiver 2 data lineDSAI Sync ADSAI Sync CDSAI Transmitter 1 data lineRotary encoder input / General purpose I/O / SDRAM interface Bank addsess49.152MHz PHY Clock inputPHY tristable data line bit 1PHY tristable data line bit 3PHY tristable control line bit 1Link on indication from PHY. Pulsing when asserted.Video interface - Data byte bit 0 / TDIF audio data input 1 / Clear to send UART status inputVideo interface - Data byte bit 3 / TDIF audio data input 4 / Ring indicator UART status inputVideo interface - Data byte bit 7 / TDIF emphasis input / Ring indicator UART status inputVideo interface - Video ready signal / TDIF audio data output 2 / UART control request to send outputGeneral purpose I/O / Block sync input/output signal / TDIF sample rate 0 output / UART control request to send outputCore groundAES Receiver filter component connectionOptical audio inAES3 Receiver ch.0/1AES3 Transmitter ch.0/1AES3 Transmitter ch.6/7DSAI Receiver 3 data lineDSAI Clock BDSAI Clock CPHY tristable data line bit 0PHY tristable data line bit 2PHY tristable data line bit 6PHY tristable data line bit 7A high indicates isolation barrier is not present.Core groundVideo interface - Data byte bit 1 / TDIF audio data input 2 / Data set ready UART status inputVideo interface - Data byte bit 4 / TDIF left right clock input / Clear to send UART status inputVideo interface - Video sync signal / TDIF audio data output 1 / UART control data terminalready outputVideo interface - End of Data block / TDIF audio data output 4 / UART control programmable output 1 outputVideo interface - Video data valid / TDIF left right clock output / UART control data terminal ready outputCore 1.8VADAT Receiver filter component connectionOptical audio outExternal 1fs base rate clockAES3 Receiver ch.2/3AES3 Transmitter ch.2/3DSAI Receiver 0 data lineDSAI Clock ADSAI Sync BMR816CSX/MR816X18DM: IC131, 132PINNO. I/O NAME123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104PINNO. I/O NAMEWAITNIRQN_OUTVSSVDDESCANSW[4]SCANSW[3]SCANSW[2]SCANSW[1]SCANSW[0]VSSVDDIADVDDADVSSVRLVREFANPORT[3]ANPORT[2]ANPORT[1]ANPORT[0]VRHVDDEIRQN_INARMSTOPVSSXIVSSVDDIXOTESTNVDDEPLVDDPLVSSPLLBPNVDDIACLKAFRMADIRVSSADAT[0]ADAT[1]ADAT[2]ADAT[3]VDDEADAT[4]ADAT[5]ADAT[6]ADAT[7]ADAT[8]ADAT[9]VSSADAT1[0]ADAT[11]ADAT[12]ADAT[13]ADAT[14]ADAT[15]DITOSYSCLKSYOVSSVDDEBCLKWCLK0SDO[0]SDO[1]SDO[2]SDO[3]SDO[4]SDO[5]SDO[6]SDO[7]VSSVDDIMUTENSDI[0]SDI[1]SDI[2]SDI[3]VDDISDI[4]SDI[5]SDI[6]VDDEEXCLKVSSVDDISDI[7]SDI[8]SDI[9]SDI[10]SDI[11]SYIVPDVSSRCLKIVSSVDDERCLKVSSRDNWRNUBNLBNVDDEWait for external CPUOutput of interrupt informationVSSVDDE +3.3VScan controlVSSVDDI +1.8VADVDD 3.3VADVSSADC reference voltageADC reference voltageADC analog inputADC reference voltageVDDE +3.3VInterrupt inputARM stopVSSCrystal oscillator(input)VSSVDDI +1.8VCrystal oscillator(output)Test pinVDDE +3.3VPLVDD +1.8VPLVSSSwitch of PLL and XIVDDI +1.8VABUS clockABUS frameABUS directonVSSABUS data busVDDE +3.3VABUS data busVSSABUS data busDIT outputSystem clockExternal synchronizationVSSVDDE +3.3VBit clock of SDI, SDOWord clock of SDI, SDOSerial audio outputVSSVDDI +1.8VAudio muteSerial audio inputVDDI +1.8VSerial audio inputVDDE +3.3VExternal synchronization clockVSSVDDI +1.8VSerial audio inputExternal synchronization inputTest pinVSSSDRAM clockVSSVDDE +3.3VSDRAM clockVSSExternal memory readExternal memory writeRAM enable(Upper Byte)RAM enable(Lower Byte)VDDE +3.3VData bus(ARM,DSP -> memory)Data bus(ARM,DSP -> memory)VSSData bus(ARM,DSP -> memory)VDDE +3.3VData bus(ARM,DSP -> memory)VSSData bus(ARM,DSP -> memory)VDDI +1.8VData bus(ARM,DSP -> memory)Memory addres busVDDE +3.3VVSSVDDI +1.8VMemory addres busVDDI +1.8VMemory addres busVSSMemory addres busVDDE +3.3VMemory addres busChip SelectVSSChip SelectExternal Address bus / GPIOVSSVDDE +3.3VExternal Address bus / GPIOExternal chip selectExternal readExternal writeExternal Data bus / GPIOVSSVDDI +1.8VExternal Data bus / GPIOVDDI +1.8VExternal Data bus / GPIOVSSVDDI +1.8VExternal Data bus / GPIOVDDE +3.3VJTAG clockJTAG modeJTAG resetVSSVDDE +3.3VInitial clearJTAG inputJTAG outputSerial output 0Serial input 0Serial output 1Serial input 1OO--OOOOO----IIIIIII-II-I--I/OI---I-I/OI/OO-I/OI/OI/OI/O-I/OI/OI/OI/OI/OI/O-I/OI/OI/OI/OI/OI/OOOO--OOOOOOOOOO--IIIII-III-I--IIIIIII-I--O-OOOO-105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208MD[7]MD[6]VSSMD[5]MD[4]MD[3]MD[2]MD[1]MD[0]VDDEMD[15]MD[14]MD[13]MD[12]VSSMD[11]MD[10]MD[9]VDDIMD[8]MA[12]MA[10]MA[9]MA[8]VDDEVSSVDDIMA[7]MA[6]MA[5]MA[13]MA[14]MA[11]VDDIMA[1]MA[2]MA[3]VSSMA[4]MA[18]MA[19]MA[17]VDDEMA[16]MA[15]MA[20]CS0NCS2NCS3NVSSCS4NEA[1]EA[2]EA[3]EA[4]EA[5]EA[6]EA[7]EA[8]VSSVDDEEA[9]EA[10]EA[11]EA[12]EA[13]EA[14]ECSNERDNEWRNED[0]VSSVDDIED[1]ED[2]ED[3]ED[4]ED[5]VDDIED[6]ED[7]ED[8]ED[9]ED[10]VSSVDDIED[11]ED[12]ED[13]ED[14]ED[15]VDDETCKTMSTRSTVSSVDDEICNTDITDOTXD0RXD0TXD1RXD1I/OI/O-I/OI/OI/OI/OI/OI/O-I/OI/OI/OI/O-I/OI/OI/O-I/OOOOO---OOOOOO-OOO-OOOO-OOOOOO-OIIIIIIII--IIIIIIIIII/O--I/OI/OI/OI/OI/O-I/OI/OI/OI/OI/O--I/OI/OI/OI/OI/O-III--IIOOIOIFUNCTION FUNCTIONMB87S1280 (X6363A00) SSP1 (MAIN/SUB)19MR816CSX/MR816XPINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME12345678910111213141516171819202122232425262728293031323334353637383940CLKICLKOVDDSCANENBATPGENBVSSPLLTESTPLLRESPLLVSSMVDDPLLVSSAVDDCHG0LPVSSVSSMIRQMCSMWRMRDMAVDDMD0MD1MD2MD3MD4MD5MD6MD7VSSMD8VDDMD9MD10MD11MD12MD13MD14MD15VSSIO-I/OI/O-II------I/OIII-I/OI/OI/OI/OI/OI/OI/OI/O-I/O-I/OI/OI/OI/OI/OI/OI/O-ClockPower supplyScan enableGroundTestResetGroundPower supplyGroundAnalog power supplyGroundInterrupt requestControl portWriteReadPower supplyDRAM data busGroundDRAM data busPower supplyDRAM data busGround41424344454647484950515253545556575859606162636465666768697071727374757677787980VDDRESETVSSOUT4OUT3INP2INP1INP0TESTENBVSSOSCOVDDOSCIVSSSIRQSCSSWRSRDSAVSSVDDSD0SD1SD2SD3SD4SD5SD6SD7VSSSD8VDDSD9SD10SD11SD12SD13SD14SD15VSS-I-OOIIII/O---I/OIII--I/OI/OI/OI/OI/OI/OI/OI/O-I/O-I/OI/OI/OI/OI/OI/OI/O-Power supplyResetGroundOutputInputTest enableGroundPower supplyGroundInterrupt requestControl portWriteReadGroundPower supplySerial dataGroundSerial dataPower supplySerial dataGroundDM: IC111S1L50553F21Y000 (X4195A0R) MCI (Gate Array)AK5385BVF-E2 (X5364B00) ADC (Analog to Digital Converter)PINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME1234567891011121314VREFLAVSSVCOMLIN+LINCKS0DVDDDVSSOVFPDNDIFM/SLRCKBICKIOIIIOIIII/OI/OLch voltage reference inputAnalog groundCommon voltage outputLch analog positive inputLch analog negative inputMaster clock select 0Digital power supply (3.0 - 5.25 V)Digital groundAnalog input overflow detectPower down modeAudio interface formatMaster / Slave modeOutput channel clockAudio serial data clock1516171819202122232425262728SDTOCKS1MCLKDFS0HPFEDFS1BVSSAVSSAVDDRINRIN+TESTAVSSVREFROIIIIIIIIIAudio serial date outputMaster clock select 1Master clock inputSampling speed select 0High pass filter enableSampling speed select 1Substrate groundAnalog groundAnalog power supply (4.75 - 5.25 V)Rch analog negative inputRch analog positive inputTest pinAnalog groundRch voltage reference inputDM: IC704, 709, 710, 712MR816CSX/MR816X20PINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME123456789101112131415161718192021LOUT1-LOUT1+DZF3DZF2DZF1CAD0ACKSNPDNBICKMCLKDVDDDVSSSDTI4SDTI1SDTI2SDTI3LRCKI2CCCLK/SCLCDTI/SDACSN/CAD1OOOOOIIIII--IIIIIIII/OIDAC1 Lch Negative Analog Output PinDAC1 Lch Positive Analog Output PinZero Input Detect 3 PinZero Input Detect 2 PinZero Input Detect 1 PinChip Address 0 PinAuto Setting Mode Disable Pin (Pull-down Pin)L: Auto Setting Mode, H: Manual Setting ModePower-Down Mode PinWhen at L, the AK4358 is in the power-down mode and is held in reset.Audio Serial Data Clock PinMaster Clock Input Pin An external TTL clock should be input on this pin.Digital Power Supply Pin, +4.75 +5.25VDigital Ground PinDAC4 Audio Serial Data Input PinDAC1 Audio Serial Data Input PinDAC2 Audio Serial Data Input PinDAC3 Audio Serial Data Input PinL/R Clock PinControl Mode Select Pin L: 3-wire Serial, H: I2C BusControl Data Clock PinI2C = L: CCLK (3-wire Serial), I2C = H: SCL (I2C Bus)Control Data Input PinI2C = L: CDTI (3-wire Serial), I2C = H: SDA (I2C Bus)Chip Select PinI2C = L: CSN (3-wire Serial), I2C = H: CAD1 (I2C Bus)222324252627282930313233343536373839404142434445464748DCLKDSDL4DSDR4DSDL1DSDR1DSDL2DSDR2DSDL3DSDR3DIF0ROUT4-ROUT4+VREFHAVDDAVSSLOUT4-LOUT4+ROUT3-ROUT3+LOUT3-LOUT3+ROUT2-ROUT2+LOUT2-LOUT2+ROUT1-ROUT1+IIIIIIIIIIOOI--OOOOOOOOOOOODSD Clock PinDAC4 DSD Lch Data Input PinDAC4 DSD Rch Data Input PinDAC1 DSD Lch Data Input PinDAC1 DSD Rch Data Input PinDAC2 DSD Lch Data Input PinDAC2 DSD Rch Data Input PinDAC3 DSD Lch Data Input PinDAC3 DSD Rch Data Input PinAudio Data Interface Format 0 PinDAC4 Rch Negative Analog Output PinDAC4 Rch Positive Analog Output PinPositive Voltage Reference Input PinAnalog Power Supply Pin, +4.75 +5.25VAnalog Ground PinDAC4 Lch Negative Analog Output PinDAC4 Lch Positive Analog Output PinDAC3 Rch Negative Analog Output PinDAC3 Rch Positive Analog Output PinDAC3 Lch Negative Analog Output PinDAC3 Lch Positive Analog Output PinDAC2 Rch Negative Analog Output PinDAC2 Rch Positive Analog Output PinDAC2 Lch Negative Analog Output PinDAC2 Lch Positive Analog Output PinDAC1 Rch Negative Analog Output PinDAC1 Rch Positive Analog Output PinAK4358VQ (X4289A00) DAC (Digital to Analog Converter) DM: IC751PINNO. I/O FUNCTION NAME PINNO. I/O FUNCTION NAME12345678910111213141516171819202122AVSSAVDDIN1IN2IN3IN4IN5IN6IN7AVDDAVSSREF7BREF7AREF6BREF6AREF5BREF5AREF4AREF4BREF3AREF3BREF2A--IIIIIII--IIIIIIIIIIIMinus power supply for analog (-6.0V Typ.)Plus power supply for analog (+6.0V Typ.)ch1 analog inputch2 analog inputch3 analog inputch4 analog inputch5 analog inputch6 analog inputch7 analog inputPlus power supply for analog (+6.0V Typ.)Minus power supply for analog (-6.0V Typ.)ch7 analog reference voltage input 7B Connect to ground directly.ch7 analog reference voltage input 7A Connect to ground through 33F.ch6 analog reference voltage input 6B Connect to ground directly.ch6 analog reference voltage input 6A Connect to ground through 33F.ch5 analog reference voltage input 5B Connect to ground directly.ch5 analog reference voltage input 5A Connect to ground through 33F.ch4 analog reference voltage input 4A Connect to ground through 33F.ch4 analog reference voltage input 4BConnect to ground directly.ch3 analog reference voltage input 3A Connect to ground through 33F.ch3 analog reference voltage input 3B Connect to ground directly.ch2 analog reference voltage input 2A Connect to ground through 33F.2324252627282930313233343536373839404142434445464748REF2BREF1AREF1BNCNCOUT7OUT6OUT5OUT4OUT3OUT2OUT1NCNCAVSSZCEN1ZCEN2CSNSDATAISCLKSDATAOTE2TE1DGNDREFAVSSIII--OOOOOOO---IIIIIOII-O-ch2 analog reference voltage input 2B Connect to ground directly.ch1 analog reference voltage input 1A Connect to ground through 33F.ch1 analog reference voltage input 1B Connect to ground directly.Non connection or connect to ground.Non connection or connect to ground.ch7 analog outputch6 analog outputch5 analog outputch4 analog outputch3 analog outputch2 analog outputch1 analog outputNon connection or connect to ground.Non connection or connect to ground.Minus power supply for analog (-6.0V Typ.)Zero-cross control input 1Zero-cross control input 2. Chip select inputSerial data inputSerial clock inputSerial data output Serial data are outputted from this terminal when CSN pin is "L" level. This terminal becomes high-impedance state when CSN pin is "H". Test terminal Non connection or connect to DGND terminal.Test terminal Non connection or connect to DGND terminal.Digital groundReference voltage output for digitalMinus power supply for analog (-6.0V Typ.)YAC523-VZ (X4325A00) EVR2 (Electric Variable Resistance 2) DM: IC81421MR816CSX/MR816X IC BLOCK DIAGRAMIC SN75121NSR (XU816A00)DM: IC107Dual Line DriverSN74AHC08PWR (X2713A00)DM: IC115, 116, 750Quad 2 Input AND1231A1Y4 2A5 2B6 2Y7 VSS1B141312VDD4A11 4Y10 3B9 3A8 3Y4BSN74HCU04NSR (XW842A0R)DM: IC108Hex Inverter12345671A1Y2A2Y3A3YVss141312111098VDD6A6Y5A5Y4A4YSN74AHC14PWR (X3098A00)DM: IC138Hex Inverter 12345671A1Y2A2Y3A3YGND141312111098VDD6A6Y5A5Y4A4YSN74AHCT245PWR (X2709A00)DM: IC803SN74LV245APWR (X3693A0R)DM: IC200Octal 3-State Bus TransceiverSN75124NSR (XV930A00)DM: IC106Triple Line Receiver1 D1R2345678910A1A2A3A4A5A6A7A8GND 11121314151617181920 VCCGB1B2B3B4B5B6B7B8Vcc2F2E2A2Y GND1Y12345678 9101112131415162C2B2D1A1B1C1D1E1F1A1B2R2S2A2B2YGND1 162 153 144 135 126 117 108 9Vcc1S1R1Y3A3S3R3YEPCS1SI8N (X9775B00)DM: IC124Serial Configuration DeviceSN74AHCT1G08DBVR (X2622A00)DM: IC152155SN74LVC1G08DBVR (X9045A00)DM: IC151TC7SET08FU(T5L) (X8398A00)DM: IC807, 808, 815Single 2-Input Positive-AND Gate123ABGND54VccYINPUTSFUNCTION TABLEOUTPUTA B YHLLHXLHLX12348765nCSVccGNDVccVccDCLKASDIDATAControlLogicI/O ShiftRegisterMemoryArrayStatus Register Address CounterDecode LogicData BuffernCSDCLKDATAASDI1256InInOutInMR816CSX/MR816X22LM3478MM (XZ914A00)DM: IC852FET ControllerR3112N161A-TR (X7747A00)DM: IC137Low Voltage Detector with Outout DelayAK4382AVT (X0661A00) DM: IC809, 810Digital to Analog Converter1234567161514131211DZFLDZFRVDDVssAOUTL+AOUTL-AOUTR+8 910AOUTR-MCLKBICKSDTILRCKPDNCSNCCLKCDTI61714131615121110984235CSNVDDMCLKVSSDZFLDZFRAOUTL+AOUTL-AOUTR+AOUTR-CCLKCDTIPInterfaceLRCKBICKSDTIPDNPin No. Pin Name12345678910111213141516I/OIIIIIIIIOOOOOOMCLKBICKSDTILRCKPDNCSNCCLKCDTIAOUTR-AOUTR+AOUTL-AOUTL+VSSVDDDZFRDZFLFunctionMaster clock inputAudio serial data clockAudio serial data inputL/R clockPower down modeChip selectControl data inputControl data inputRch negative analog outputRch positive analog outputLch negative analog outputLch positive analog outputGroundPower supply +5VRch data zero input detectLch data zero input detectNote: All input pins should not be left floating.De-emphasisControlClockDivider8XInterpolator Modulator8XInterpolator ModulatorSCFSCFAudioDataInterface12348765ISENFBAGNDVINFAD/SDDRPGNDCOMPUnder-voltageLockoutVINDRPGND7.2VBiasVoltagesSwitchLogicPWMComparatorThermalShutdownSet/BlankoutShutdownDetectOscillatorSoft-start1.26VReference RampAdjustFAD/SDCOMPFBISENAGNDFixed FrequencyDetectSlopeCompensationl-VConverterV-lConverterOvervoltageComparatorShort-circuitComparator350mV++++EAOneShotLevelShifter+SwitchDriverR SQ123OUTVDDGND54CDNCGNDVDD-+VrefOUTRD1 235NJM2068M-D(TE2) (X3505A00)DM: IC602607, 650655, 700703, 705708, 752755, 811, 812NJM2082M(TE1) (X5030A00)DM: IC601NJM4556AD (XQ824A00)DM: IC817, 818Dual Operational Amplifier1234 -V8765Output A +VNon-InvertingInput A-DC Voltage Supply+DC VoltageSupplyOutput BInvertingInput BNon-InvertingInput BInvertingInput A + -+ -NE5532DR (X5482A00)DM: IC756763Dual Operational Amplifier12348765Output A +VNon-InvertingInput AGround+DC VoltageSupplyOutput BInvertingInput BNon-InvertingInput BInvertingInput A + -+ -23MR816CSX/MR816X HP Circuit Board CIRCUIT BOARDSAC Circuit Board (X9234C0) ...........................................................32DM Circuit Board (X9232D0) ............................................24/26/28/30HP Circuit Board (X9234C0) ...........................................................23JK Circuit Board (X9234C0) ............................................................23PN Circuit Board (X9404C0) ......................................................32/33Note: See parts list for details of circuit board component parts.: 2NA-WM06850to DM-CN800 12to DM-CN901OUTPUT 1 OUTPUT 3 OUTPUT 5 OUTPUT 7 JK Circuit BoardComponent sideComponent side24MR816CSX/MR816X DM Circuit Board2NA-WK58180HI-ZMIC/LINE/HI-Z MIC/LINEGAIN 1 GAIN 2 GAIN 3 GAIN 4 GAIN 5 GAIN 6 GAto AC-CN103to DM-CN602to DM-CN652to DM-CN702to DM-CN651to HP-CN201to DM-CN601INSERT I/O12MIC/LINE INPUT3 4 5 6 72 48A'A25MR816CSX/MR816XComponent side2NA-WK58180GAIN 6 GAIN 7 GAIN 8to DM-CN701to JK-CN301 to AC-CN103to PN-CN102to PN-CN101OUTPUTWCLK IN/OUT1 2IN2 4 6 8S/PDIF, OPTICAL OUTto AC-CN151not installednot installedN.C.A'AIEEE1394 (S400) IEEE1394 (S400) Scale: 70/10026MR816CSX/MR816X DM Circuit BoardB'B2NA-WK5818027MR816CSX/MR816XComponent side3 layer3 Scale: 70/100B'B2NA-WK5818028MR816CSX/MR816X DM Circuit BoardC'C2NA-WK5818029MR816CSX/MR816XComponent side6 layer6 Scale: 70/100C'C2NA-WK5818030MR816CSX/MR816X DM Circuit BoardD'D2NA-WK5818031MR816CSX/MR816XPattern sideScale: 70/100D'D2NA-WK5818032MR816CSX/MR816X AC Circuit Boardto DM-CN104N.C.to AC wiring assembly to PSW wiring assembly to DM-CN851 to DM-CN850 to DM-CN1116 78+48VPADMto DM-CN112E'EF'F1 2MR816CSX onlyF'FComponent sideComponent side PN Circuit Board12 3 4 5 6QUICK CONNECTE'EAC: 2NA-WM06850PN: 2NA-WM4617033MR816CSX/MR816XPattern sideG'GG'GH'H PN Circuit BoardH'H2NA-WM06850MR816CSX/MR816X34 FIRMWARE VERSION CHECK Version indication Each version is shown with respective LEDs shown in the following gure. (Fig. 2) Version indication Version number is shown as a binary number and a lighting LED light represents binary digit 1. For example, V1.23 is indicated with three numbers: Major version number = 1 (0001 in binary notation), Middle version number = 2 (0010 in binary notation), and Minor version number = 3 (0011 in binary notation). The LEDs around the encoder light up to indicate the binary numbers; the right bottom LED corresponds to the highest digit and the other digits are shown with LEDs in counterclockwise direction.Turn on the power of the MR816CSX/MR816X while holding down the [ASSIGN 2] encoder. Keep the [ASSIGN 2] encoder held down.Firmware BOOT version will be indicated on the LED around the [ASSIGN 1] encoder. Firmware PROGRAM version will be indicated on the LED around the [ASSIGN 2] encoder. Refer to the following "Version indication" for how to read version number.Release the [ASSIGN 2] encoder after checking the version. (Fig. 1)1 2 3Major version Middle version Minor versionLED LED LEDD2 D1 D0 D3 D2 D1 D0 D3 D2 D1 D00 0 1 0 0 1 0 0 0 1 1Decimal numberBinary numberLEDD3 D2 D1 D00 0 0 0 01 0 0 0 12 0 0 1 03 0 0 1 14 0 1 0 05 0 1 0 16 0 1 1 07 0 1 1 18 1 0 0 09 1 0 0 1MR816CSX Only PowerASSIGN 2 ASSIGN 1ASSIGN 2 ASSIGN 1D2D1D0D1D1D0D0D2D2D3D3D2D1D0D1D1D0D0D2D2D3D3PROGRAM sectionMiddle versionPROGRAM sectionMajor versionPROGRAM sectionMinor versionBOOT sectionMiddle versionBOOT sectionMajor versionBOOT sectionMinor version0: Not lighting, 1: Lighting0: Not lighting, 1: LightingEx.) In case of version 1.2335MR816CSX/MR816X LED 2 2 1 bit LED V1.23 =1 (2 0001)=2(2 0010)=3(2 0011) LED LED[ASSIGN 2] MR816CSX/MR816X [ASSIGN 2] [ASSIGN 1] LED BOOT [ASSIGN 2] LED PROGRAM [ASSIGN 2] 1 1 2 3 LED LED LEDD2 D1 D0 D3 D2 D1 D0 D3 D2 D1 D00 0 1 0 0 1 0 0 0 1 110 2 LEDD3 D2 D1 D00 0 0 0 01 0 0 0 12 0 0 1 03 0 0 1 14 0 1 0 05 0 1 0 16 0 1 1 07 0 1 1 18 1 0 0 09 1 0 0 1MR816CSX ASSIGN 2 ASSIGN 1ASSIGN 2 ASSIGN 1PROGRAMPROGRAMPROGRAMBOOT BOOT BOOT D2D1D0D1D1D0D0D2D2D3D3D2D1D0D1D1D0D0D2D2D3D30: 1: 0: 1: 1.23 MR816CSX/MR816X36 BACKUPPreparations: Connect t he IEEE1394 t ermi nal of t he MR816CSX/MR816X to the computer with an IEEE1394 cable.1. Backup procedure1-1 Turn on the power of the MR816CSX/MR816X to start in normal mode and then start the MR Editor (X9658A0) on the computer. * Error indication will appear if the MR Editor is started in the following cases. The MR816CSX/MR816X and the computer are not connected properly. The MR Editor is started before the MR816CSX/MR816X is ready in normal mode.Recheck the connection, start the MR816CSX/MR816X and then restart the MR Editor.

1-2 Click the file icon (to the left of the Scene Name text box) in the upper part of the MR Editor screen and click the "Save" in the pull-down menu.1-3 Enter an appropriate le name and save the scene data on the computer as a ".mre" le. * All the scenes stored in the MR816CSX/MR816X will be saved in one le on the computer.The backup procedure is now nished.Click this icon Pull-down menuEnter a file name you like Click the Store button37MR816CSX/MR816X2. Restoring procedure2-1 Start the MR Editor with the same procedure as in "1. Backup procedure". (See procedure 1-1)

2-2 Click the file icon in the upper part of the MR Editor screen and click the "Open" in the pull-down menu.Click this icon Pull-down menu2-3 Open the ".mre" file stored in the computer with the "1. Backup procedure" and the scene data will be stored back on the MR816CSX/MR816X automatically. Icon of the .mre fileThe .mre le stored in the computer with the 1. Backup procedure (the le to be restored to the MR816CSX/MR816X)Click after selecting the leMR816CSX/MR816X38 MR816CSX/MR816X IEEE1394 IEEE1394 1. 1-1 MR816CSX/MR816X MR Editor (X9658A0) MR Editor MR816CSX/MR816X MR816CSX/MR816X MR Editor MR816CSX/MR816X MR Editor

< > 1-2 MR Editor Save 1-3 .mre MR816CSX/MR816X (STORE) 39MR816CSX/MR816X 2. 2-1 1. MR Editor 1-1

2-2 MR Editor Open 2-3 1. .mreMR816CSX/MR816X .mre .mre GAIN MIN[Hi-Z] OFF[STANDBY/ON] : OFF (STANDBY) INITIAL SETTING ControllerGAIN volume: MIN[Hi-Z] switch: OFF[STANDBY/ON] switch: OFF (STANDBY)MR816CSX/MR816X40 FACTORY SET (SSP1 FLASH ROM) SSP1 EEPROM[ASSIGN 1] [PAD] MR816CSX/MR816X *MR816CSX/MR816X LED 2 *35 MR816CSX/MR816X Fig. 11MR816CSX OnlyMR816CSX PowerPAD ASSIGN 1MR816CSX OnlyMR816CSX All the LEDs flash several timesLED Fig. 2 The LEDs of the MR816CSX/MR816X during the Factory set mode2MR816CSX/MR816X LED The following contents can be initialized by executing the Factory set. Mixer setup information (Flash ROM around SSP1) Wordclock related setup information (EEPROM around SSP1)* Be sure to save user data before executing Factory set. Turn on the power of the MR816CSX/MR816X while holding down the [ASSIGN 1] encoder and [PAD] button to enter the Factory set mode. Release the buttons when the Firmware version* of the MR816CSX/MR816X is shown. The LEDs of the MR816CSX/MR816X change as Fig. 2 to indicate that the mixer setup information is initialized.*: Refer to "FIRMWARE VERSION CHECK" on P.34. The MR816CSX/MR816X will start up in normal mode after the Factory set is executed.* Do not turn off the power of the MR816CSX/MR816X until the Factory set is nished.41MR816CSX/MR816X TEST PROGRAM1. PreparationsJig IEEE1394 repeater hub 2 pcs. [ex.:1394-RP2GPH by Sanwa Supply] IEEE1394 cable 2 pcs. RCA pin cable 1 pc. Optical digital cable 1 pc. BNC-BNC cable 1 pc. Stereo PHONE cable (TRS) 1 pc.Measuring Instruments Level meter (JIS-C lter) Frequency counter Distortion meter Oscilloscope Jitter meter2. How to enter the Test Program mode While holding down the [ASSIGN 2] encoder and [QUICK CONNECT 4] buttons, turn on the power.(Fig. 1) Release the buttons when the Firmware version* of the MR816CSX/MR816X is shown to enter the test program mode. The LED will be as shown in Fig. 2 in the test program mode.*: Refer to "FIRMWARE VERSION CHECK" on P.34.(Fig. 2)3. Test program item list(Table 1)No. 0: ANALOG test mode will be selected just after entering the test program mode.Wordclock source is INTERNAL 96 kHz.Analog test mode will always be selected when none of the Memory, LED, Switch, Encoder or Digital I/O test is being conducted.4. Selection of test item, executing procedure and indication of results4-1. Turn the [ASSIGN 1] encoder to select a test item. LEDs around the [ASSIGN 1] encoder light to indicate which test is selected. Refer to Fig. 3 for correspondence between LEDs and test items.4-2. Turn the [ASSIGN 1] encoder to select a test item and then press the [ASSIGN 1] encoder to execute the test.4-3. The LEDs around the [ASSIGN 2] encoder will indicate the test result. (Lighting: OK, Not lighting: NG, Blinking: Not tested (No.0: Analog test mode)) Refer to Fig. 3 for an LED corresponding to each test item.(Fig. 3)4-4. Turn off the power of the MR816CSX/MR816X to leave the test program mode.No. Item0 ANALOG1 MEMORY2 LED3 SWITCH4 ENCODER5 DIGITAL I/O6 1394_CONNECTMR816CSX Only PowerASSIGN 2QUICK CONNECT 4ASSIGN 2 ASSIGN 16. 1394 CONNECT4. ENCODER3. SWITCH1. MEMORY2. LED5. DIGITAL I/O6. 1394 CONNECT4. ENCODER5. DIGITAL I/O3. SWITCH1. MEMORY2. LEDResult of testsLighting:The result is successfulNot Lighting: The result is unsuccessfulBlinking:No. 0 Analog test modeThe LED corresponding to the selected test item lights up.MR816CSX OnlyLightingBlinking[SIG/PEAK] The LED lights up in green[QUICK CONNECT 4] LED lights upClock source indication (UNLOCK: Blinking, LOCK: Lighting) Synchronous sampling frequency indicationMR816CSX/MR816X425. Test item5-1. No. 0 ANALOG test5-1-1. OutlineThis test mode is for checking device around analog audio and signal cable connection.5-1-2. Main devices to be tested A/D Converter D/A Converter Analog Volume Controller Phantom +48V PAD HI-Z Muting Circuit5-1-3. How to checkANALOG test mode will always be selected in the test program mode if none of the MEMORY, LED, SWITCH, ENCODER or DIGITAL I/O test is being conducted.5-1-3-1. Checking with panel operation Audio connection AD/DA, Digital In/Out audio connection is selected in the ANALOG test mode just after entering the test program mode.Each press of the [QUICK CONNECT 6] button changes the audio connection in the test mode from AD/DA, Digital In/Out ([QUICK CONNECT 6] LED does not light) to 1394 Analog, ADAT, Coaxial ([QUICK CONNECT 6] LED lights up) ADAT Analog ([QUICK CONNECT 6] LED ashes quickly) S/PDIF Analog ([QUICK CONNECT 6] LED ashes slowly). (Press the [QUICK CONNECT 6] button in the connection to return to the connection .) (Fig. 4)* The audio connection is not to be used.* Refer to Fig. 5, Fig. 6 and Fig. 7 for details of the audio connections , and .(Fig. 4) AD/DA, Digital Input/Output connection diagramThe connection in dotted lines A is deactivated at 88.2 kHz/96 kHz.(Fig. 5)ADAT Analog connection diagramThe connection in dotted lines B is deactivated at 88.2 kHz/96 kHz.(Fig. 6)MR816CSX Only QUICK CONNECT 6ABB43MR816CSX/MR816XS/PDIF Analog connection diagram(Fig. 7) Analog Volume ControllerPress the [ASSIGN 2] encoder and the current Analog Volume value will be shown on the LED around the [ASSIGN 2] encoder for a given time. Analog Volume value of the Headphone Output 1L/R and Headphone Output 2L/R can be changed simultaneously by turning the [ASSIGN 2] encoder (- 0(dB)).(Fig. 8) PADPress the [PAD] button to enter the PAD setup mode where corresponding PAD of the Analog Input can be turned ON/OFF by pressing the [QUICK CONNECT 1] [QUICK CONNECT 8] button.In the PAD setup mode, the LED for the [PAD] button lights up and the [QUICK CONNECT 1] [QUICK CONNECT 8] LED indicates if the PAD is ON or OFF.Press the [PAD] button again to leave the PAD setup mode.(Fig. 9) Phantom +48 VPress the [+48V] button to enter the Phantom +48 V setup mode where corresponding Phantom +48 V of the Analog Input can be turned ON/OFF by pressing the [QUICK CONNECT 1] [QUICK CONNECT 8] button.In the Phantom +48 V setup mode, the LED for the [+48 V] button lights up and the [QUICK CONNECT 1] [QUICK CONNECT 8] LED indicates if the Phantom +48 V is ON or OFF.Press the [+48 V] button again to leave the Phantom +48 V setup mode. Muting CircuitDICEII activates the MUTE signal cable when the [QUICK CONNECT 7] button is pressed.Check that related devices are muted.Press the [QUICK CONNECT 7] button again to cancel muting.SSP1 activates the DA MUTE signal cable when the [QUICK CONNECT 8] button is pressed. SOFT MUTE setup for the AK4382A and AK4358 is conducted as well.Check that related devices are muted.Press the [QUICK CONNECT 8] button again to cancel muting. HI-ZHI-Z of the Analog Input1 can be turned ON/OFF with the [HI-Z] switch in the front side of the panel.(Fig. 10)5-1-3-2. Analog characteristics testSet 0 dBu = 0.775 Vrms and 0 dBV = 1 Vrms. Preparations Load resistanceLoad resistance of each output terminal should be as follows:Headphones [1, 2] : 40ohms (3W or >3W)[OUTPUT 1 8] : 600ohms Input/output terminals[INSERT I/O 1, 2]: Unconnected Controller settingsUnless otherwise specied, set up as follows. CH INPUTGAIN volume (CH 1 8): MIN[PAD] switch (CH 1 8): OFF[Hi-Z] switch (CH 1): OFF[+48V] switch (CH 1 8): OFF HEADPHONES [1, 2] OUTPUT control[ASSIGN 1, 2] encoder (Volume): MAX Muting Circuit [QUICK CONNECT 7,8]Mute: OFFControllers which are not described above can be set to any settings.MR816CSX OnlyASSIGN 2MR816CSX OnlyPAD+48 V QUICK CONNECT 1QUICK CONNECT 8MR816CSX OnlyHI-ZMR816CSX/MR816X44 Input signalUse 1 kHz sine wave for input signal unless otherwise specied.Input the following signals to the INPUT terminals. Setup of measuring deviceDon't set up the filter of the measuring device unless otherwise specied. NoticeIf a result of test related to noise (distortion, equivalent input noise, crosstalk, mute, residual noise, etc.) is NG, execute factory set and then test again.(Refer to "FACTORY SET" on P. 40) Analog testSet the MR816CSX/MR816X to the AD/DA through setup (AD/DA, Digital Input/Output audio connection) for checking. (Refer to " Audio connection" in procedure 5-1-3-1 (P. 42)) Gain (MIC input)Set up the GAIN volumes [1 8] and [PAD] switches as in the following table.Unit:[dBu]Unit:[dBu]*1: Check that level differences between OUTPUT 1 8 channels and Headphones [1, 2] L/R channels are as follows: Gain (LINE input)Perform the same test as the 1 of procedure . Frequency CharacteristicsSet up as in description marked 2 and 4 in procedure .Check that the level of each output when the frequency is 20 Hz and 40 kHz are within the range shown below compared with the level when the frequency is 1 kHz. DistortionSet up as in description marked 1 and 3 in procedure .Then, adjust input level so that output level is as in the description below:Check that the distortion of outputs is as follows:Unit:[dBu]Unit:[dBu]* Use 22 Hz HPF and 30 kHz LPF. Equivalent input noiseSet up as in description marked 2 in procedure .Connect 150 resistor to the input terminals asfollows:MIC/LINE INPUT 1 8:Between pin 2 (Hot) and pin 3 (Cold)Measure the output level at the [OUTPUT 1 8] terminals.Check that the noise levels are as follows:Unit:[dBu]* Use 22 Hz HPF and 30 kHz LPF. Output residual noiseSet up as in description marked 1 and 3 in procedure .Measure output levels with no signal input.Check that the noise levels are as follows:Unit:[dBu]* Use 22 Hz HPF and 30 kHz LPF.MIC/LINE INPUT 1 8System BalanceSource Impedance150 ohmINPUTINPUTLEVELGAIN PADOUTPUT 1 8MIC/LINEINPUT 1 8-16 MIN ON -22+/-2-60 MAX OFF +4 +/-2 (*1)12INPUTINPUT LEVELGAIN PADHEADPHONES 1, 2MIC/LINE INPUT1 4-16 MIN ON -32.9+2/-3-60 MAX OFF -6.9 +2/-3 (*1)34Tolerance2 dB or lessToleranceWithin +1/-3 dBOUTPUT LEVELOUTPUT 1 8 +4Headphones 1, 2 -6.9OUTPUT DistortionOUTPUT 1 8 0.03% or lessHeadphones 1, 2 0.1 % or lessINPUT OUTPUT 1 8MIC/LINE INPUT 1 8 -46 (EIN: -110)OUTPUT 1 8 Headphones 1, 2Noise Level -80 or less -80 or less45MR816CSX/MR816X Crosstalk (OUTPUT 1 8)Set up as in description marked 1 in procedure (P. 44).Then, adjust input level so that output level is as in the description below:Unit:[dBu]* Turn ON the [PAD] switches of INPUT channel 1 8.*2: Connect 150 resistor to the input terminals as follows:MIC/LINE INPUT CH 1 8: Between pin 2 (Hot) and pin 3 (Cold)Measure the output level at the [OUTPUT 2 8] terminals.Check that the noise levels are as follows:Unit: [dBu]* Use 22 Hz HPF and 30 kHz LPF. Crosstalk (Headphones 1, 2)Set up as in description marked 3 in procedure (P. 44).Then, adjust input level so that output level is as in the description below:Unit:[dBu]* Turn ON the [PAD] switches of INPUT channel 1 4.*3: Connect 150 resistor to the input terminals as follows:MIC/LINE INPUT 1 4:Between pin 2 (Hot) and pin 3 (Cold)Measure the output level at the Headphones [1, 2] terminals.Check that the noise levels are as follows:Unit: [dBu]* Use 22 Hz HPF and 30 kHz LPF. MuteSet up as in description marked 1 and 3 in procedure (P. 44).Execute the Muting Circuit. (Refer to " Muting Circuit" in procedure 5-1-3-1 (P. 43))Check the mute function of corresponding output terminal according to the following table.Unit: [dBu]* Use 12.7 Hz, -6 dB/oct LPF. INSERT I/OSet up as in description marked 2 in procedure (P. 44).Insert a plug, which has wiring connection as in the following gure, to the [INSERT I/O 1, 2] terminal to be measured.Check that the level at the [OUTPUT 1, 2] terminal is as described below.Unit: [dBu]OUTPUT OUTPUT LEVELOUTPUT 1 8 +18Signal Input CH (MIC)Resistor (*2)CH 1 CH 2CH 2 CH 3CH 3 CH 4CH 4 CH 5CH 5 CH 6CH 6 CH 7CH 7 CH 8INPUT OUTPUT 2 8MIC/LINE INPUT 1 7 -70 or lessOUTPUT OUTPUT LEVELHeadphones 1, 2 +7.1Signal Input CH (MIC)Resistor (*3)CH 1 Monitor 1RCH 2 Monitor 1LCH 3 Monitor 2RCH 4 Monitor 2LINPUT Headphones 1, 2MIC/LINE INPUT 1 4 -60 or lessOUTPUT TERMINALOUTPUT LEVEL(after MUTE)OUTPUT 1 8 -85 or lessHeadphones 1, 2 -85 or lessTip: outputRing: inputSleeve: GND5.1k ohms5.1k ohmsOUTPUT 1, 2-5 +/-3MR816CSX/MR816X46 Headphones volume attenuationSet up as in description marked 4 in procedure (P. 44).Set up as follows.Headphones 1, 2 volume: MINUnit: [dBu]Unit: [dBu] Hi-ZSet up as in the following table.Input signal from CH 1 with unbalanced system.Turn ON the [Hi-Z] switch of CH 1.Check that the difference of output levels between the output level when a 500 k resistor is connected in series to the signal line compared to the output level before connecting the resistor is as follows: PhantomWith the No. 2 and No. 3 pins of the [MIC/LINE INPUT 1 8] terminal shorted, connect a resistance load of 10 k between the No. 1 and No. 2 pins.Turn ON the Phantom function of the channel to be measured.Refer to " Phantom +48V" in procedure 5-1-3-1 (P. 43) for the way to turn on the Phantom function.Check that the voltage applied to the resistor is within the following range.5-1-3-3. Digital characteristic inspectionSet 0 dBu = 0.775 Vrms, 0 dBV = 1 Vrms and 0 dBFS = +18 dBu. Preparations Load resistanceLoad resistance of each output terminal should be as follows:[OUTPUT 1 4]: 600 ohms Input/output terminals[INSERT I/O 1, 2]: Unconnected Controller settingsUnless otherwise specied, set up as follows. CH INPUTGAIN volume (CH 1 8): MIN[PAD] switch (CH 1 8): OFF[Hi-Z] switch (CH 1): OFF[+48V] switch (CH 1 8): OFF Muting Circuit [QUICK CONNECT 7,8]Mute: OFFControllers which are not described above can be set to any settings. Input signalUse 1 kHz sine wave for input signal unless otherwise specied.Input the following signals to the INPUT terminals. Setup of measuring deviceDon't set up the lter of the measuring device unless otherwise specied. NoticeIf a result of test related to noise (distortion, mute) is NG, execute factory set and then test again. (Refer to "FACTORY SET" on P. 40) Digital I/O test ADAT (OPTICAL) test Set the MR816CSX/MR816X to the ADAT Analog audio connection setup for checking. (Refer to " Audio connection" in procedure 5-1-3-1 (P. 42)) Connect the [adat IN] terminal and [adat OUT] terminal to be in loop connection. Gain (MIC input)Set up the GAIN volumes [1 4] and [PAD] switches as in the following table.Unit: [dBu]INPUTHeadphones 1L RCH1 -80 or less CH2 -80 or lessINPUTHeadphones 2L RCH3 -80 or less CH4 -80 or lessVoltage+35 +/-3 VMIC/LINE INPUT14System BalanceSource Impedance150 ohmInput CH1 LEVELGAIN PADOUTPUT 1 LEVEL DIFFERENCE-25 dBu (Unbalance)MAX ON -6 +/-1 dBINPUTINPUT LEVELGAIN PADOUTPUT 1 4MIC/LINE INPUT1 4-16 MIN ON -22 +/-2-60 MAX OFF +4 +/-2 (*4)1247MR816CSX/MR816X*4: Check that level differences between channels are as follows: Frequency CharacteristicsSet up as in description marked 2 in procedure (P. 46).Check that the level of each output when the frequency is 20 Hz and 40 kHz are within the range shown below compared with the level when the frequency is 1 kHz. DistortionSet up as in description marked 1 in procedure (P. 46).Then, adjust input level so that output level is as in the description below:Check that the distortion of outputs is as follows:Unit: [dBu]* Use 22 Hz HPF and 30kHz LPF. S/PDIF (COAXIAL/OPTICAL) test Set the MR816CSX/MR816X to the S/PDIF Analog audio connection setup for checking. (Refer to " Audio connection" in procedure 5-1-3-1 (P. 42)) Connect the [S/PDIF IN] terminal and [S/PDIF OUT] terminal to be in loop connection. Gain (MIC input)Set up the GAIN volumes [3, 4] and [PAD] switches as in the following table.Unit: [dBu]*5:Check that level differences between channels are as follows:* Measure only the [S/PDIF IN, OUT] (COAXIAL) terminal.Tolerance2 dB or less Frequency characteristicsSet up as in description marked 2 in procedure (P. 46).Check that the levels of each output when the frequency is 20 Hz and 40 kHz are within the range shown below compared with the level when the frequency is 1 kHz.* Measure only the [S/PDIF IN, OUT] (COAXIAL) terminal. DistortionSet up as in description marked 1 in procedure (P. 46).Then, adjust input level so that output level is as in the description below:Check that the distortion of outputs is as follows:Unit: [dBu]* Use 22 Hz HPF and 30kHz LPF.* Measure only the [S/PDIF IN, OUT] (COAXIAL) terminal. Gain (S/PDIF OUT)Set up as in procedure .Measure the [S/PDIF OUT] (COAXIAL) and [adat OUT] (OPTICAL) terminal.Check that the output level is as follows:Unit: [dBFs] Mute (S/PDIF OUT)Set up as in description marked 1 in procedure (P. 46).Measure the [S/PDIF OUT] (COAXIAL) and [adat OUT] (OPTICAL) terminal.Execute the Muting Circuit. (Refer to " Muting Circuit" in procedure 5-1-3-1 (P. 43))Check the mute function of corresponding output terminal according to the following table.Unit: [dBFs]ToleranceWithin +1/-3 dBOUTPUT LEVEL Distortion+4 0.03 % or lessINPUTINPUT LEVELGAIN PADOUTPUT3, 4MIC/LINE INPUT 3, 4-16 MIN ON -22 +/-2-60 MAX OFF +4 +/-2 (*5)Tolerance2 dB or lessToleranceWithin +1/-3 dBOUTPUT LEVEL Distortion+4 0.03 % or lessS/PDIF OUT (COAXIAL, OPTICAL) LEVEL-14 +/-2S/PDIF OUT (COAXIAL, OPTICAL)LEVEL-110 or less12MR816CSX/MR816X48 Jitter measurement (WORD CLOCK INTERNAL)Measure the [S/PDIF OUT] (COAXIAL) terminal.Set WORD CLOCK to INTERNAL.Check that the jitter measurement value is as follows: Jitter measurement (WORD CLOCK EXT)Measure the [S/PDIF OUT] (COAXIAL) terminal.Set up the WORD CLOCK and frequency of input sources as follows:Check of WORD CLOCK IN: WCLKCheck of ADAT : ADATCheck of S/PDIF : S/PDIFCheck that the jitter measurement value is as follows:* Be sure to execute Factory set after nishing digital characteristic inspection. (Refer to "FACTORY SET" on P. 40)5-2. No. 1 MEMORY test5-2-1. OutlineCheck the ROM/RAM device around the SSP1 on the DM circuit board and connection of signal cables between devices.5-2-2. Main devices to be tested FLASH ROM SDRAM(SSP1 SUB) SRAM EEPROM5-2-3. Test methodTurn the [ASSIGN 1] encoder to turn on the LED corresponding to the MEMORY test and then press the [ASSIGN 1] encoder to execute the test.Test of ROM/RAMs will be executed automatically.The LED for the [ASSIGN 2] encoder corresponding to the MEMORY test lights up if the test result is OK or doesn't light if the result is NG.(Fig. 11)5-2-4. Test contentsThe result of the test is OK if test result of all the ROM/RAMs around the SSP1 is OK. The result of the test is OK if test result of any one of the ROM/RAMs around the SSP1 is NG. FLASH ROMCFI Query information of FLASH ROM is read from the SSP1.If correct information is obtained, the signal cable between the SSP1 and Flash ROM should be connected properly and the test result is OK. SRAMChecking of data bus and address bus connection between the SSP1 and SRAM is conducted. SDRAM (SSP1 SUB)Checking of data bus and address bus connection between the SSP1 SUB and SDRAM is conducted. The test uses the signal cable between the SSP1 MAIN and SSP1 SUB and the test result also shows if the connection of the signal cable between the SSP1 MAIN and SSP1 SUB is normal. EEPROMIssue Write Disable command from the SSP1 to EEPROM and then issue Read Status Register command and check that WEL bit is not on. Next, issue Write Enable command and then issue Read Status Register command and check that WEL bit is on. If both the WEL bits are read properly, the signal cable between the SSP1 and EEPROM should be connected properly and the test result is OK.5-3. No.2 LED test5-3-1. OutlineExecutes device check of LED on the PN circuit board and panel micro computer, and connection check of signal cables between LED, panel micro computer and SSP1.WORD CLOCK Tolerance44.1 kHz5 nsec or below48 kHz88.1 kHz96 kHzASSIGN 2 ASSIGN 11. MEMORY 1. MEMORY(Test result) (Test item selection)WORD CLOCK Tolerance44.1 kHz5 nsec or below48 kHz88.1 kHz96 kHz49MR816CSX/MR816X5-3-2. Main devices to be tested Panel micro computer LEDColors of LEDs are as follows:5-3-3. Test methodThe program automatically judges if the panel micro computer is OK while you have to check visually if the LEDs are OK or NG.Turn the [ASSIGN 1] encoder to turn on the LED corresponding to the LED test and then press the [ASSIGN 1] encoder to execute the LED test.The LED for the [ASSIGN 2] encoder corresponding to the LED test lights up if the test result is OK or doesn't light if the result is NG.(Fig. 12)5-3-4. Test contentsCommunication with the panel micro computer is checked before conducting the LED lighting test.If the test result of the communication with the panel micro computer is NG, the test will be aborted before proceeding to the LED lighting test. Panel micro computerThe test is conducted automatically.The result is OK if the version of the panel micro computer is read from the SSP1 correctly. The LED lighting test will follow in case of OK. LED(1) All the LEDs of the MR816CSX/MR816X will light up on entering the LED lighting test.(2) Check visually and if all the LEDs are lighting, press the [ASSIGN 1] encoder to proceed to the Color by Color test. Press the [ASSIGN 2] encoder in case of NG to abort the LED test.(3) All the green LEDs of the MR816CSX/MR816X will light on entering the Color by Color test. Check visually and press the [ASSIGN 1] encoder in case of OK to proceed to the Red LED lighting test. Press the [ASSIGN 2] encoder in case of NG to abort the LED test.(4) Check visually in the Red LED lighting test. Press the [ASSIGN 1] encoder if all the red LEDs of the MR816CSX/MR816X are lighting to proceed to the Blue LED lighting test. (Proceed to the procedure (6) in case of the MR816X). Press the [ASSIGN 2] encoder in case of NG to abort the LED test.(5) Check visually in the Blue LED lighting test. Press the [ASSIGN 1] encoder if all the blue LEDs of the MR816CSX/MR816X are lighting to proceed to the sequential LED lighting test. Press the [ASSIGN 2] encoder in case of NG to abort the LED test.(6) Check if the LEDs of the MR816CSX/MR816X light sequentially from the upper left to lower right of the panel in the sequential LED lighting test. Order of LED lighting[QUICK CONNECT 1] [QUICK CONNECT 2] ...[QUICK CONNECT 8] [SIG/PEAK 1] [SIG/PEAK 2] ...[SIG/PEAK 8] [+48V] [PAD] [PHONES] [MASTER] [WCLK] [S/PDIF] [ADAT] [INTERNAL] [REV-X] [MORPH] [96k] [88k] [48k] [44k][ASSIGN 1] (1 11) [ASSIGN 2] (1 11)Press the [ASSIGN 2] encoder in case of NG to abort the LED test.MR816X MR816CSXQUICK CONNECT 1 8 Green BlueSIG/PEAK 1 8 Green Red Green Red+48V Green GreenPAD Green GreenPHONES Green GreenMASTER Green GreenREV-X Green GreenMORPH None GreenWCLK Green GreenS/PDIF Green GreenADAT Green GreenINTERNAL Green Green96k Green Green88k Green Green48k Green Green44k Green GreenAround ASSIGN 1 Green BlueAround ASSIGN 2 Green BlueASSIGN 2 ASSIGN 12. LED 2. LED(Test result) (Test item selection)MR816CSX/MR816X50(7) All the LEDs of the MR816CSX/MR816X will ash automatically after the sequential lighting. Check visually again and press the [ASSIGN 1] encoder in case of OK or the [ASSIGN 2] encoder in case of NG.(8) The LED test will be stopped followed by the test item selection mode.(Fig. 13) Order of sequential LED lighting5-4. No. 3 SWITCH test5-4-1. OutlineExecutes device check of switches on the PN circuit board and panel micro computer, and connection check of signal cables between switches, panel micro computer and SSP1.5-4-2. Main devices to be tested Panel micro computer Switch5-4-3. Test methodThe program automatically judges if the panel micro computer is OK while you have to check manually if the switches are OK or NG.Turn the [ASSIGN 1] encoder to turn on the LED corresponding to the SWITCH test and then press the [ASSIGN 1] encoder to execute the test.The LED for the [ASSIGN 2] encoder corresponding to the SWITCH test lights up if the test result is OK or doesn't light if the result is NG.(Fig. 14)5-4-4. Test contentsCommunication with the panel micro computer is checked before conducting the SWITCH test.If the test result of the communication with the panel micro computer is NG, the test will be aborted before proceeding to the SWITCH test. Panel micro computerThe test is conducted automatically.The result is OK if the version of the panel micro computer is read from the SSP1 correctly. The SWITCH test will follow in case of OK. Switch(1) All the LEDs by the switches on the panel will light up on entering the SWITCH test. The LEDs by the switches for which checking is nished will go off to indicate the progress of the test.(2) Turn ON and OFF the switch in the order of the SWITCH test. If the correct switch is turned ON/OFF, the LED closest to the switch will go off. Order of switches[QUICK CONNECT 1] ... [QUICK CONNECT 8][+48 V] [PAD] [ASSIGN 1] [ASSIGN 2]If the switches are turned ON/OFF according to the order of the SWITCH test and still the LED closest to a switch does not go off, the switch or signal cable may be defective. In that case, press the [ASSIGN 1] encoder and [ASSIGN 2] encoder simultaneously to abort the SWITCH test.(3) If ON/OFF checking of all the switches are finished according to the order, the SWITCH test will be finished followed by test item selection mode automatically.(Fig. 15) Order of SWITCH test5-5. No. 4 ENCODER test5-5-1. OutlineCheck the encoders on the PN circuit board and connection of the signal cables between the encoders and SSP1.5-5-2. Main devices to be tested Encoder5-5-3. Test methodTurn encoder knob on the panel counterclockwise and clockwise by the designated number of clicks (1 to 3 turns) to check if the value changes correctly.Turn the [ASSIGN 1] encoder to turn on the LED corresponding to the ENCODER test and then press the [ASSIGN 1] encoder to execute the test.The LED for the [ASSIGN 2] encoder corresponding to the ENCODER test lights up if the test result is OK or doesn't light if the result is NG.MR816CSX OnlyASSIGN 2 ASSIGN 13. SWITCH 3. SWITCH(Test result) (Test item selection)MR816CSX Only51MR816CSX/MR816X(Fig. 16)5-5-4. Test contents(1) The LEDs around the [ASSIGN 1] encoder light sequentially clockwise repeatedly on entering the test to be in the clockwise rotation check mode.(2) Turn the [ASSIGN 1] encoder clockwise and LEDs will change from automatic sequential lighting to sequential clockwise lighting in accordance with the rotation. (One LED lights up when the encoder is turned by one click.)(3) Turn the [ASSIGN 1] encoder until the LEDs around the encoder light sequentially by three turns to enter the counterclockwise rotation check mode where the LEDs around the [ASSIGN 1] encoder light sequentially counterclockwise repeatedly.(4) Turn the [ASSIGN 1] encoder counterclockwise and LEDs will change from automatic sequential lighting to sequential counterclockwise lighting in accordance with the rotation. (One LED lights up when the encoder is turned by one click.)(5) Turn the [ASSIGN 1] encoder until the LEDs around the encoder light sequentially by three turns followed by the test of the [ASSIGN 2] encoder. Repeat the same procedure as the [ASSIGN 1] encoder test for the [ASSIGN 2] encoder test.(6) If the clockwise and counterclockwise rotation test of the [ASSIGN 1] and [ASSIGN 2] encoders are nished with the test result of OK, the test will be stopped automatically followed by the test item selection mode.If an encoder does not work during the test (LEDs around the encoder does not light in accordance with the rotation), the test result is NG. In that case, press the [ASSIGN 2] encoder to abort the test to go to the test item selection mode. 5-6. No. 5 DIGITAL I/O test5-6-1. OutlineExecutes connection checking of the A-BUS signal cable between the SSP1 and SSP1 SUB, connection checking of the audio signal cable between the SSP1 and DICEII, and connection checking of the signal cables between the DICEII and audio interfaces.Digital I/O Mode is set to ADAT x4 + S/PDIF(coaxial), clock source is set to INTERNAL and nominal FS is set to 96 kHz automatically on entering the test.5-6-2. Main devices to be tested A-BUS between the SSP1 and SSP1 SUB Audio signal cable between the SSP1, DICEII and FPGA [WCLK] terminal [S/P DIF] terminal [adat] terminal5-6-3. PreparationsConnect the following terminals with cables to make loop connections before executing the test. OUT and IN of the [WCLK] terminal OUT and IN of the [S/PDIF] terminal OUT and IN of the [adat] terminal(Fig. 17)5-6-4. Test methodTurn the [ASSIGN 1] encoder to turn on the LED corresponding to the DIGITAL I/O test and then press the [ASSIGN 1] encoder to execute the test.The LED for the [ASSIGN 2] encoder corresponding to the DIGITAL I/O test lights up if the test result is OK or doesn't light if the result is NG.(Fig. 18)ASSIGN 2 ASSIGN 14.ENCODER 4.ENCODER(Test result) (Test item selection)WCLK OUTWCLK IN S/PDIF OUT S/PDIF INadat OUT adat INASSIGN 2 ASSIGN 15.DIGITAL I/O 5.DIGITAL I/O(Test result) (Test item selection)MR816CSX/MR816X525-6-5. Test contents(1) Connection checking of the A-BUS between the SSP1 and connection checking of the audio signal cable between the SSP1 and DICEII are conducted automatically on entering the test.(2) Then, lock checking of the [WCLK], [S/PDIF] and [adat] terminals with loopback connection and audio check will be conducted automatically.(3) Then, the test will be nished. The test item selection mode will follow automatically when the test is nished. If you want to abort the DIGITAL I/O test, press the [ASSIGN 2] encoder.5-7. No. 6 1394_CONNECT test5-7-1. OutlineChecks 1394 peripheral device on the DM circuit board and connection.5-7-2. Main devices to be tested 1394 peripheral device5-7-3. PreparationsConnect one each 1394 hub (S400 compatible) to the two 1394 connectors of the MR816CSX/MR816X with 1394 cables.5-7-4. Test methodTurn the [ASSIGN 1] encoder to turn on the LED corresponding to the 1394_CONNECT test and then press the [ASSIGN 1] encoder to execute the test.The LED for the [ASSIGN 2] encoder corresponding to the 1394_CONNECT test lights up if the test result is OK or doesn't light if the result is NG.(Fig. 19) 5-7-5. Test contentsIf the number of nodes is obtained correctly, the 1394 peripheral device and connection check are judged as OK. If 3 nodes in total (two 1394 hubs and one MR816CSX/MR816X connected to the connectors) are recognized, the test result is OK.The checking is conducted automatically and the test item selection mode will follow in case of OK.6 Others, Checking function6-1. FPGA version indication6-1-1. OutlineProgram version of the FPGA on the DM circuit board is shown with the LEDs on the panel of the MR816CSX/MR816X.6-1-2. Main devices to be tested FPGA6-1-3. How to checkLEDs for the [QUICK CONNECT 6] to [QUICK CONNECT 8] indicate the FPGA version in the ANALOG test mode (just after starting the test program) when the [QUICK CONNECT 5] button is pressed.The correspondence between the FPGA version and LED indication is as follows.ASSIGN 2 ASSIGN 16.1394 CONNECT 6.1394 CONNECT(Test result) (Test item selection)FPGAversionQUICK CONNECT 6QUICK CONNECT 7QUICK CONNECT80 Off Off Off1 On Off Off2 Off On Off3 On On Off4 Off Off On5 On Off On6 Off On On7 On On On53MR816CSX/MR816X 1. IEEE1394 2 1394-RP2GPH IEEE1394 2 RCA 1 1 BNC-BNC 1 (TRS) 1 (JIS-C ) 2. [ASSIGN 2] [QUICK CONNECT 4] 1MR816CSX/MR816X *LED 2 *35 23. 1No.0 : ANALOG INTERNAL 96kHzMEMORYLEDSWITCHENCODERDIGITAL I/OANALOG 4. 4-1. [ASSIGN 1] [ASSIGN 1] LED LED 3 4-2. [ASSIGN 1] [ASSIGN 1] 4-3. [ASSIGN 2] LED : OK: NG: No : ANALOG LED 3 34-4. MR816CSX/MR816X OFF No. 0 ANALOG1 MEMORY2 LED3 SWITCH4 ENCODER5 DIGITAL I/O6 1394_CONNECTMR816CSX ASSIGN 2QUICK CONNECT 4ASSIGN 2 ASSIGN 16. 1394 CONNECT4. ENCODER3. SWITCH1. MEMORY2. LED5. DIGITAL I/O6. 1394 CONNECT4. ENCODER5. DIGITAL I/O3. SWITCH1. MEMORY2. LEDOKNGNo.0 ANALOG LED MR816CSX [SIG/PEAK] LED [QUICK CONNECT 4] LED UNLOCK: LOCK: MR816CSX/MR816X545. 5-1. No.0 ANALOG 5-1-1. ANALOG 5-1-2. A/D Converter D/A Converter Analog Volume Controller Phantom +48 V PAD HI-Z Muting Circuit5-1-3. MEMORYLEDSWITCHENCODERDIGITAL I/OANALOG 5-1-3-1. ANALOGAD/DADigital In/Out [QUICK CONNECT 6] AD/DADigital In/Out[QUICK CONNECT 6] LED 1394 AnalogADATCoaxial [QUICK CONNECT 6] LED ADAT Analog[QUICK CONNECT 6] LED S/PDIF Analog[QUICK CONNECT 6] LED [QUICK CONNECT 6] 4567 4 AD/DADigital Input/Output A88.2 kHz/96 kHz 5ADAT Analog B88.2 kHz/96 kHz 6MR816CSX QUICK CONNECT 6ABB55MR816CSX/MR816XS/PDIF Analog 7 Analog Volume Controller[ASSIGN 2] Analog Volume [ASSIGN 2] LED [ASSIGN 2] Headphone Output 1L/RHeadphone Output 2L/R Analog Volume (- 0(dB))8 PAD[PAD] PAD [QUICK CONNECT 1] [QUICK CONNECT 8] Analog Input PADON/OFF PAD [PAD] LED [QUICK CONNECT 1] [QUICK CONNECT 8] LED PAD ON/OFF [PAD] PAD 9 Phantom +48 V[+48 V] Phantom +48 V [QUICK CONNECT 1] [QUICK CONNECT 8] Analog Input Phantom +48 V ON/OFF Phantom +48 V [+48 V] LED [QUICK CONNECT 1] [QUICK CONNECT 8] LED Phantom +48 V ON/OFF[+48 V] Phantom +48 V Muting Circuit[QUICK CONNECT 7] DICEIIMUTE MUTE [QUICK CONNECT 7] MUTE[QUICK CONNECT 8] SSP1DA MUTE AK4382AAK4358 SOFT MUTE MUTE [QUICK CONNECT 8] MUTE HI-Z[HI-Z] Analog Input1 HI-Z ON/OFF 105-1-3-2. 0 dBu=0.775 Vrms0 dBV=1 Vrms [1, 2]: 40 ohms (=3 W or >3 W)[OUTPUT 1 8]: 600 ohms [INSERT I/O 1, 2]: CH INPUTGAIN (CH 1 8): MIN[PAD] (CH 1 8): OFF[Hi-Z] (CH 1): OFF[+48 V] (CH 1 8): OFF [1, 2] OUTPUT [ASSIGN 1, 2] : MAX Muting Circuit [QUICK CONNECT 7,8]Mute: OFFMR816CSX ASSIGN 2MR816CSX PAD+48 V QUICK CONNECT 1QUICK CONNECT 8MR816CSX HI-ZMR816CSX/MR816X56 1 kHz Filter NG P. 40 AD/DA AD/DADigital Input/Output 5-1-3-1 P. 54 MIC GAIN [1 8] [PAD] Unit:[dBu]Unit:[dBu]*1: OUTPUT 1 8 CH [1, 2]L/R CH LINE 1 2 , 4 20 Hz40 kHz 1 kHz 1 , 3 Unit:[dBu]Unit:[dBu]22 Hz HPF30 kHz LPF 2 150 MIC/LINE INPUT 1 8: 2 pin(Hot) 3 pin(Cold) [OUTPUT 1 8] Unit:[dBu]22 Hz HPF30 kHz LPF 1 , 3 MIC/LINE INPUT 1 8System BalanceSource Impedance150 ohmINPUTINPUTLEVELGAIN PADOUTPUT 1 8MIC/LINEINPUT 1 8-16 MIN ON -22+/-2-60 MAX OFF +4 +/-2 (*1)12INPUTINPUT LEVELGAIN PAD 1, 2MIC/LINE INPUT1 4-16 MIN ON -32.9+2/-3-60 MAX OFF -6.9 +2/-3 (*1)342 dB +1/-3 dB OUTPUT LEVELOUTPUT 1 8 +4 1, 2 -6.9OUTPUT DistortionOUTPUT 1 8 0.03% 1, 2 0.1 %INPUT OUTPUT 1 8MIC/LINE INPUT 1 8 -46EIN: -11057MR816CSX/MR816XUnit:[dBu]22 Hz HPF30 kHz LPF OUTPUT 1 8) (P. 56) 1 Unit:[dBu]CH 18[PAD] ON*2: 150 MIC/LINE INPUT CH 1 8:2 pin(Hot) 3 pin(Cold) [OUTPUT 2 8] Unit: [dBu]22 Hz HPF30 kHz LPF 1, 2) (P. 56) 3 Unit:[dBu]CH 14[PAD] ON*3: 150 MIC/LINE INPUT 1 4: 2pin(Hot) 3pin(Cold) [1, 2] Unit: [dBu]22 Hz HPF30 kHz LPF (P. 56) 1 , 3 Muting Circuit 5-1-3-1 Muting CircuitP. 55Unit: [dBu]12.7 kHz -6 dB/oct LPF INSERT I/O (P. 56) 2 [INSERT I/O 1, 2] [OUTPUT 1, 2] Unit: [dBu]OUTPUT 1 8 1, 2Noise Level -80 -80 OUTPUT OUTPUT LEVELOUTPUT 1 8 +18Signal Input CH (MIC)Resistor (*2)CH 1 CH 2CH 2 CH 3CH 3 CH 4CH 4 CH 5CH 5 CH 6CH 6 CH 7CH 7 CH 8INPUT OUTPUT 2 8MIC/LINE INPUT 1 7 -70 OUTPUT OUTPUT LEVEL1, 2 +7.1Signal Input CH (MIC)Resistor (*3)CH 1 Monitor 1RCH 2 Monitor 1LCH 3 Monitor 2RCH 4 Monitor 2LINPUT 1, 2MIC/LINE INPUT 1 4 -60 OUTPUT TERMINALOUTPUT LEVEL(MUTE )OUTPUT 1 8 -85 1, 2 -85 Tip: outputRing: inputSleeve: GND5.1k ohms5.1k ohmsOUTPUT 1, 2-5 +/-3MR816CSX/MR816X58 (P. 56) 4 1, 2 :MINUnit: [dBu]Unit: [dBu] Hi-ZCH1 CH1 [Hi-Z] ON 500 k Phantom[MIC/LINE INPUT 1 8] 23 12 10 k CH ON ON 5-1-3-1 Phantom +48VP. 555-1-3-3 0 dBu=0.775 Vrms0 dBV=1 Vrms0 dBFS=+18 dBu [OUTPUT 1 4]: 600 ohms [INSERT I/O 1, 2]: CH INPUTGAIN (CH 1 8): MIN[PAD] (CH 1 8): OFF[Hi-Z] (CH 1): OFF[+48V] (CH 1 8: OFFMuting Circuit [QUICK CONNECT 7,8]Mute: OFF 1 kHz Filter NG P. 40 I/O ADATOPTICAL ADAT Analog 5-1-3-1 P. 54 [adat IN] [adat OUT] MIC GAIN [1 4] [PAD] Unit: [dBu]*4: CH INPUT1L RCH1 -80 CH2 -80 INPUT2L RCH3 -80 CH4 -80 Voltage+35 +/-3 VMIC/LINE INPUT1 4System BalanceSource Impedance150 ohmINPUTINPUT LEVELGAIN PADOUTPUT 1 4MIC/LINE INPUT 1 4-16 MIN ON -22 +/-2-60 MAX OFF +4 +/-2 (*4)2 dB Input CH1 LEVELGAIN PADOUTPUT 1 LEVEL DIFFERENCE-25 dBuMAX ON -6 +/-1 dB1259MR816CSX/MR816X P. 58 2 20 Hz40 kHz 1 kHz P. 58 1 Unit: [dBu]22 Hz HPF30kHz LPF S/PDIFCOAXIAL/OPTICAL S/PDIF Analog 5-1-3-1 P. 54 [S/PDIF IN] [S/PDIF OUT] MIC GAIN [3, 4] [PAD] Unit: [dBu]*5: CH [S/PDIF IN, OUT]COAXIAL P. 58 2 20 Hz40 kHz 1 kHz [S/PDIF IN, OUT]COAXIAL P. 58 1 Unit: [dBu]22 Hz HPF30kHz LPF [S/PDIF IN, OUT]COAXIAL S/PDIF OUT [ S/PDI F OUT] COAXI AL[ adat OUT]OPTICALUnit: [dBFs] S/PDIF OUT P. 58 1 [ S/PDI F OUT] COAXI AL[ adat OUT]OPTICALMuting Circuit 5-1-3-1 Muting CircuitP. 55Unit: [dBFs] WORD CLOCK INTERNAL[S/PDIF OUT]COAXIALWORD CLOCK INTERNAL +1/-3 dB OUTPUT LEVEL Distortion+4 0.03 % INPUTINPUT LEVELGAIN PADOUTPUT