Ngôn Ngữ Lập Trình MPLAB C18

7/22/2019 Ngn Ng Lp Trnh MPLAB C18

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Nguyn Vn Hng [email protected] Hc vin kthut qun s

1

M u

Sau nhiu nm c m t ti Vit Nam, hin nay dng vi iu khin

PIC vn th hin u th ca n. T cc ng dng nh ti cc ng dng

ln ta u c th chn loi PIC ph hp vi ng dng ca mnh m gi

thnh vn ph hp.

Vit Nam hin nay pht t rin cc ng dng thng s dng cc

trnh bin dch ngn ng C cho vi iu khin nh CSS, Keil C

compiler Bi v l do n gin l cc hm, cc th vin m cc trnh

dch ny cung cp tng i y v kh d s dng. Tuy nhin vic

pht trin cc trnh ng dng ln v mang tnh chuyn nghip hn th

cc trnh d ch ny hu nh vn cha mang li. 1 c tnh na l trnh

dch ny khng phi do chnh hng sn xut phn cng Microchip

cung cp do vy tnh mi v tnh chuyn nghip s k hng c cao

nh chnh do nh sn xut cung cp.

MPLAB l mi trng lp trnh tch hp do chnh Microchip cung

cp, i km vi n ngn ng lp trnh ph hp vi tng dng vi iu

khin. Pic16 c ngn ng C16, Pic 18 c ngn ng C18, Pic 30 c

C30Theo ti thy cc th vin hm, cc v d ng dng do

Microchip cung cp kh y v chuyn nghip. Hin nay vic pht

trin cc ng dng trn nn MPLAB n c ta vn cha ph bin. Vimong mun gp 1 phn nh v rt ngn thi gian hc tp ca cc bn

mi lm quen vi mi trng ny. Trong ti liu ny ti xin gii thiu

nhng nt chnh v ngn ng C18 v cc ng dng trn dng Pic18 s

dng ngn ng ny
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Mc lcPhn I: Ngn Ng C18........................................................................................................................ 3

1. Kiu d l iu v cc gi i hn ................................................................................................. 3

2. S m rng ca C18 ................................................................................................................. 9

3. #pragma sectiontype............................................................................................................... 11

4 . #Pragma interrupt low v #Pragma interrupt ............................................................. 17

5 . # Prag ma tm pdata [ sec ti on-na me] .................................................................................... 26

6 . #pragma varlocate bank variable-name v #pragma varlocate "sect ion-

name" variable-name ........................................................................Error! Bookmark not defined.

7. #pragma conf ig........................................................................................................................ 31

8 . P roces so r-Spec if i c Hea der F il e s ....................................................................................... 33

9. Processor-Specific Register Definitions Files ............................................................................. 37

Phn II: Lp trnh PIC18 bng MPLAB C18 ....................................................................38

1. S dng MPLAB ...................................................................................................................... 381.1. Qun l Project ................................................................................................................. 38

1.2. Cc bc to ra fi le.hex ............................................................................................... 40

1.3. Ca s t in ch s dng trong MPLAB .................................................................. 54

2. V d lp trnh Pic18 bng C18 ........................................................................................ 55

2.1. I/O c bn v delay........................................................................................................ 56

2.2. RESET................................................................................................................................. 63

2.3. Sleep..................................................................................................................................... 70


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Phn I: Ngn NgC18Ngn ng ny c xy dng trn nn ngn ng C c s . Chnh v

vy i vi nhng ai quen cu lnh lp trnh C ri th vic nm bt

v s dng n s tr nn n gin hn rt nhiu.

1. Kiu d liu v cc gii hn

Ging nh ngn ng lp trnh C c s v cc ngn ng lp trnh

khc kiu d liu l c strong lp trnh. C18 c cc kiu d liu sau:

Kiu s nguyn: bng sau trnh by cc kiu s nguyn ( tn,

rng, gii hn max-min )s dng trong C18

Kiu char l kiu mc nh trong C18 nu ta ko khai bo kiu d liu

pha trc.

Hnh 1.1


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Kiu du phy ng

C18 h tr khai bo 2 kiu du phy ng l float v double vi chi

tit v ng, gii hn min-max ( hnh 1.2)

V d: ta khai bo

Char var1; // rng 8 bit

Float var2 // rng 32bit

C18 lu dliu kiu endianness

Endianness l khi nim c bn trong in t m ta lm quen

trong cu trc my tnh: n c ngha l lu nhng byte t quan trng

nht vn g a ch thp nht, v ngc li nhng byte quan trng nht

th vng cao nht.

V d: trong trnh dch C18 t a c on m sau

Hnh 1.2

Hnh 1.3


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Ta c th thy rng bin l c byte DD thp nht th c lu vo

trong vng nh thp nht, byte AA cao nht th c lu vo vng nh

cao nht

Cc lp ca vng lu tr

MPLAB C18 h tr cc lp lu tr chun ANSI nh auto, extern,

register, static v typedef. Chng ra nhc li 1 cht v cc chun lu

tr ny:

- Auto: l bin trong 1 hm, tc l n ch xut hin trong hm,

khi 1 hm thc thi xong n s mt

- Extern: l kiu bin dng chung cho nhng file khc nhau, tc

l bin c khai bo kiu extern trong file1.* c th s dng

trong file2.* khi trong file2.* c lnh #include

V d:

File1.c:

extern int x ; // bin x kiu ex tern

char c;

function(int m)

{ int var; // bin auto

}

File2.c

#include


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.

x=1234; // s dng x m ko cn khai bo li

- Register: khai bo ny s bo cho trnh d ch bit bin c s

dng nhiu v v th bin c lu trong thanh ghi vi mc

ch lm truy cp d liu nhanh. Khai bo ny ch c s dng

trong bin formal ca hm v bin auto, nu khai bo bin extern

dng ny th trnh d ch s b qua v coi nh khng c khai bo

register

register int x; / / khai bo ny trnh d ch

register char c; // s coi nh ko c khai bo regis ter

function(register unsigned m, register long n) / / khai bo s dng

trong bin formal

{

register int i; // khai bo s dng trong bin auto

...

}

- Static: l loi bin c cp pht tnh. N khc vi bin auto

ch l lifetime (thi gian tn ti) trong ton b thi gian chy

ca chng trnh. Nhng li khc so vi bin extern ch l n

c cp pht tnh (allocated statically) cn bin extern c

cp pht ng (allocated dynamically).

Khi nim cp pht tnh v cp pht ng ging vi khi nim

trong cu trc my tnh. Ti xin ni qua bn d hn h d ung : Cp

pht tnh c ngha l bin c lu trong b nh stack (ko phi b

nh heap) v n c cp pht vng nh trong khi bin d ch chng
mailto:[email protected]://en.wikipedia.org/wiki/Static_memory_allocationhttp://en.wikipedia.org/wiki/Static_memory_allocationhttp://en.wikipedia.org/wiki/Static_memory_allocationhttp://en.wikipedia.org/wiki/Static_memory_allocationhttp://en.wikipedia.org/wiki/Dynamic_memory_allocationhttp://en.wikipedia.org/wiki/Dynamic_memory_allocationhttp://en.wikipedia.org/wiki/Dynamic_memory_allocationhttp://en.wikipedia.org/wiki/Static_memory_allocationmailto:[email protected]


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trnh, tc l bin c cp pht vng nh trc khi chng tr nh

ca ta c chy. Cn ngc li, cp pht ng th bin c cp pht

b nh trong khi thc hin chng trnh. trc quan ta xem v d:

#include

void func() {

static int x = 0; // x is initialized only once across three calls

of func()

printf("%d\n", x); // outputs the value of x

x = x + 1;

}

int main(int argc, char * const argv[]) {

func(); // prints 0

func(); // prints 1

func(); // prints 2

return 0;

/* nu bin ta khai bo x ko phi l bin static th s hin th

ln mn hnh l 0 0 0 ch ko phi l 0 1 2 nh trn. Ch n gin

vy thi. Ta kt thc vn ny y*/

}

Cc bn mun chi tit thm v cc khai bo v ngha vng lu tr

ny c th xem trong cc sch lp trnh C. Ti thy cun sch C

Programming Language ca tc gi W.Kernighan & M.Ritchie vit rt

hay, cc bn c th download trn mng hoc ti y.

Ngoi cc nh ngha vng lu tr chun t rn MPLAB cn cungcp thm 1 khai bo lu tr na l overlay . Kiu ny ch p dng khi

trnh dch hot ng trong ch Non-extended v ch p dng cho

bin a phng (bin auto). Nh trn ti trnh by phn bin static,

vn gp phi ca bin x l khi gi li hm bin x gi li gi tr
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c tnh ton (tc l ko khi to li gi tr =0 khi gi hm) nhng i

khi ta khng mun iu , v th bin kiu overlay chnh l gii quyt

vn ny. Tm li bin kiu overlay l bin cp pht tnh nhng khi

gi hm th n s c khi to li . Ta xem v d d i s hiu r:

void f (void)

{

overlay int x = 5;

x++;

/* y bin x c cp pht tnh nh bin x v d trn nhng s c

khi to li bng 5 khi gi li h m ch ko gi li gi tr. Kh d hi u,

chng ta kt thc vn ny y */

}

Ta cng c section ( on d liu lu trong b nh) c th khai

bo c tnh kiu overlay . Tc dng ca khai bo ny nh th no ti

s nhc li pha di.

i s ca hm

i s ca hm trong C18 c th l lp auto hoc static . Mc

nh l auto. Nu l tham s static th trnh dch phi hot ng trong

ch Non-extended

Qualifiers vng lu tr

MPLAB C18 gii thiu cc qualifier far, near, rom, ram. Phm vi v

vng nh da trn Qualifiers theo bng sau:

Rom Ram

Far Mi ni trong b nhMi ni trong b nh dliu (mc nh)

NearTrong b nh chng tr nh vi a

ch nh h n 64k

Trong b nh c th truy

cp


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V d:

Nu ta khai bo:

near ram charvar_mta // c ngha l bin var-mta lu trong bnh ram c th truy cp c.

Ti y li xut hin khi nim mi v nh th no l b nh c th

cp c v khng th. hiu r khi nim ny cc bn c th c

trong cunPICmicro Mid-Range MCU Family Reference Manual . C

th download ti y.

2. S m rng ca C18

C18 h tr cc cu trc nc danh bn trong cc union.

1 cu trc nc danh c dng:

1 cu trc nc danh nh ngha 1 i tng khng tn. Tn ca cc

thnh vin cu trc phi c phn bit t nhng tn khc nhau trong

phm vi cu trc c khai bo. Cc thnh vin c s dng trc tip

trong phm vi khng c c php truy cp cho cc thnh vin thng

thng

Tm li: ta c th hiu iu ny ging nh lp trnh C thng

thng ta c struct lng vo trong union nhng s khc bit l

struct y c th nc danh ( tc l ko tn). Vic truy cp ti

cc bin trong union nh cu trc C thng thng. Th hin v

d sau:
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Nhng code assembly vo trong chng trnh

MPLAB C18 cung cp trnh dch assembler s dng c php ging vi

trnh dch assembler MPASM. s dng on m assem ta phi khai

bo nh sau:

_asm

[label:] [ [arg1[, arg2[, arg3]]]]

_endasm

Tuy nhin do l m assembly nhng trong C cho nn n c nhng im

khc vi trnh d ch MPASM v ging vi code C:

Cc comment phi ging trong C: comment phi sau // ch ko

phi l ;

Ko c mc nh ton hng m chng phi ghi r trong lnh, nu

ko khi dch chng trnh s bo li

H s mc nh l c s 10

S dng cc k hiu ca C. v d: s hexa phi c vit l

0x1234 ch ko phi l H 1234 nh assem thng thng

Sau label c du :


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C php nh a ch theo ch s khng c h tr y (ngha

l khng c dng []) m phi ch r bit truy cp. V d nh

assem thng ta vit CLRF[2] nhng giphi vit CLRF 2,0

C php v tt c cc lut nhng code assem trong code C v a trnh

by t rn c th hin v d sau:

_asm

/* User assembly code */

MOVLW 10 // Move decimal 10 to count

MOVWF count, 0

/* Loop until count is 0 */

start:

DECFSZ count, 1, 0

GOTO done

BRA start

done:

_endasm

3. #pragma sectiontype

C php:

# pragma udata [attribute-list] [section-name [=address]]

| # pragma idata [attribute-list] [section-name [=address]]

| # pragma romdata [overlay] [section-name [=address]]

| # pragma code [overlay] [section-name [=address]]

Trong :

[attribute-list] : l thuc tnh ca section ti s ni r phn di

section-name : tn ca section ( do ngi lp trnh t)

[=address]: a ch u tin ca section

Tt c thuc tnh, tn, a ch ca section c th c hoc ko (t

trong du ngoc vung), nu khi lp trnh khng ch r (specified) th


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trnh dch s t ng lm thay. T i s trnh by chi tit tng phn

di

Khai bo ny s gn c tnh v a ch cho sect ion (on). Trong

phn ny ti xin c gi nguyn thut ng section (ch v l do d ch

sang on nghe hi chui ) . 1 sect ion l 1 phn ca ng dng t ti

a ch b nh no . 1 section c th cha code hoc data v c th

c t trong b nh chng tr nh hoc b nh d liu. C 2 kiu

section cho mi kiu b nh:

B nh chng t r nh

- code: cha cc lnh c th thc thi

- romdata : cha cc bin v hng ( cc bin c khai bo vi

qualifier rom)

B nh d liu

- udata: cha cc bin user cp pht tnh, ko c khi to

- idata: cha cc bin user cp pht tnh v c khi to

1 section absolute l section c a ch r rng thng qua khai bo

=address .

1 section assigned c gn l sec tion c trng vi khai bo

SECTION

1 sect ion unassigned khng phi l sect ion absolute v assigned

Nghe c v kh hiu. V d sau th hin cc i tng c t

trong b nh nh th no bn c th hiu c s khc nhau ca

cc on d liu:


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rom int ri; // r rng bin ri phi c lu trong vng nh rom. C

th romdata //v n ko phi l code c th chy. tng

t ta c bng di

rom char rc = 'A';

int ui;

char uc;

int ii = 0;

char ic = 'A';

void foobar (void)

{

static rom int foobar_ri;

static rom char foobar_rc = 'Z';

...

}

void foo (void)

{

static int foo_ui;

static char foo_uc;

...

}

void bar (void)

{

static int bar_ii = 5;

static char bar_ic = 'Z';

...

}

Vi on chng trnh trn th cc bin c lu trong b nh nh

th no . Ta c bng cc i tng (cc bin, bin hm..) c lu tr

trong b nh tng ng:

i tng Vng nh i tng Vng nh

ri romdata ui udata

rc romdata uc udata

roobar_ri romdata foo_ui udata

roobar_rc romdata foo_uc udata


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ii idata bar_ic idata

ic idata foo code

bar_ii idata bar code

Ti y ta c th hiu c cc kiu b nh ca Pic18 m ta c th

ch ng lu t r d liu vo trong qua cc khai bo nh trn.

Kh l mt khi ta phi nm chc c nhng iu ny, vi nhng

chng trnh nh i khi iu l khng cn thit nhng thc

hin nhng project ln th iu l cn thit v nht l nm

c nhng iu ny mi hiu c cc on m gc m

Microchip cung cp cho chng ta v th mi s dng c tt.

OK, lets go

Cc section mc nh

trn phn khai bo #pragma ti c ni tn section c th ko c

khai bo bi ngi lp trnh. Nu iu xy ra trnh d ch s t ngt tn cho section ph thuc vo l kiu section no theo bng

sau:

Kiu section Tn mc nh

code .code_filename

romdata .romdata_filename

udata .udata_filename

idata .idata_filename

filename: l tn file ca ta

V d: nu tn file chng trnh ca ta l first_pro v kiu section l

code th on mc inh s c tn l .code_first_pro


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Thuc t nh (attribute) ca section

Thuc tnh ca section gm c access v overlay

access : bo cho trnh dch bit rng section c t trong vng c th

truy cp ca b nh d liu ( xem chi tit v nh th no l b nh c

th truy cp trong PIC 18C MCU Family Reference Manual ). Bin t

trong access section phi c khai bo vi t kha near. V d:

#pragma udata access my_access

/* all accesses to these will be unbanked */

near unsigned char av1, av2;

overlay: l thuc tnh cho php section khc c t ti cng a ch

vt l. Thuc tnh ny c th s dng cng vi thuc tnh access .

C 4 iu kin phi tha mn c th overlay:

1. Mi section phi c t trong file ngun khc nhau

2. C 2 section phi c tn ging nhau

3. Nu on 1 c khai bo c thuc tnh access th on

2 cng phi khai bo thuc tnh ny

4. Nu gn a ch tuyt i cho 1 section, th section cn

li cng phi gn a ch tuyt i

V d:

f i le1.c:

#pragma code overlay my_overlay_scn=0x1000

void f (void)

{

...
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}

f i le2.c:

#pragma code overlay my_overlay_scn=0x1000

void g (void)

{

...

}

Hoc n cng s dng cho nhiu bin m ko bao gi c kch hot

ng thi:

f i le1.c:

#pragma udata overlay my_overlay_data=0x1fc/* 2 bytes will be located at 0x1fc and 0x1fe */

int int_var1, int_var2;

f i le2.c:

#pragma udata overlay my_overlay_data=0x1fc

/* 4 bytes will be located at 0x1fc * /

long long_var;

c thm thng tin v iu khin section overlay bn c th xem

thm trong MPASM Assembler, MPLINK Object Linker, MPLIB Object

Librarian Users Guide (DS33014) . (nhng thc s l kh khoai)

address ca section

a ch c gn s l ni lu tr on m.

#pragma code my_code=0x2000

/* on m ny s c lu a ch 0x2000 cho t i khi gp t in x l b n d i

*/

#pragma code
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4. #Pragma interruptlow v #Pragma interrupt

Ngt l 1 phn quan trng trong vi iu khin (VK) gip cho

chng trnh ca chng ta r nhnh v thc hin cc cng vic khc

nhau, khi xy ra ngt VK con tr chng trnh s tr ti a ch ca

chng trnh ngt tng ng ( a ch ca chng trnh ngt ty thuc

vo loi ngt v loi VK, khi thc hin lp trnh vi VK no th ta

xem datasheet ca n l bit) v thc hin chng trnh ngt c lu

, khi thc hin chng trnh ngt xong n s tr li thc hin

chng trnh ma in() ti a ch lc n dng li ( a ch ny c lu

trong stack). Vy ta s xem xt cch khai bo, khai bo mc u v

thc hin chng trnh ngt trong C18 nh th no, go on.

#Pragma interrupt fname: khai bo hm phc v ngt mc u tin

cao (high-priority ISR)

a ch xyra ngt

start

a chvector ngt

kt thc ngt

end

Lu thc hin ngt


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#Pragma interruptlow fname: khai bo chng trnh phc v ngt

mc u tin thp(low-priority ISR)

C php khai bo:

# pragma interrupt function-name [tmp-section-name ][save=save-

list][nosave=nosave-list]

| # pragma interruptlow function-name [tmp-section-

name][save=savelist][nosave=nosave-list]

Trong :

function-name : l tn hm phc v ngt

[tmp-section-name]: tn section trong cha cc bin kiu

temporary ca ISR

[save=save-list] : S dng lu cc bin, cc section. Trong

save-list l danh sch cc bin, cc section c lu.

[nosave=nosave-list] : s dng ch rng compiler ko cn lu cc

bin, cc section. nosave-list l danh sch cc bin, cc section ko cnlu

Ta s tm hiu dn dn chi tit tng i tng pha d i .

Vi khai bo ny trnh d ch s to ra bin kiu temporary (th no

l bin, section kiu temporaty ti s ch r pha di ) trong udata

section c tn l fname_tmp . V d:

void foo(void);

...

#pragma interrupt foo

void foo(void)

{

/* perform interrupt function here */


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}

Vi chng trnh ny cc bin ginh cho chng trnh ngt s c

t trong udata section c tn l foo_tmp .

Vector ngt

MPLAB C18 ko t ng t ISR ti vector ngt. Thng thng l dng

lnh Goto t ti vector ngt gi ISR. V d:

#include

void low_isr(void); // khai bo chng trnh phc v ngt

void high_isr(void); // nh chng trnh bnh thng

/*

Gi s ta lm vic vi loai Pic18 m loi ngt c a ch vector

ngt l 0x18. Nh ti ni phn trn, vector ngt ny ty vo

loi ngt v loi VK, v th khi lm vic vi VK no bn tra

trong datasheet

*/

#pragma code low_vector=0x18

void interrupt_at_low_vector(void)

{

_asm GOTO low_isr _endasm

}

#pragma code /* tr li code section mc nh */

#pragma interruptlow low_isr

void low_isr (void)

{

/* ... */

}

/*

Gi s ta lm vic vi loai Pic18 m loi ngt c a ch vector

ngt l 0x08 */

#pragma code high_vector=0x08

void interrupt_at_high_vector(void)

{

_asm GOTO high_isr _endasm

}

#pragma code /* tr li code section mc nh */


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#pragma interrupt high_isr

void high_isr (void)

{

/* ... */

}

Nh ti ni trn bin, section kiu temporary (nht thi) tc l

n ch xut hin nht thi trong qu trnh thc hin chng trnh. V

d vi chng trnh sau:

Section kiu temporary l dng lu li cc bin trung gian trong

qu trnh tnh ton, thc hin chng trnh v cc bin tmp_1, tmp_2trong chng trnh l bin kiu temporary. V section kiu temporary

l section c th dng chung gia cc hm vi nhau ( theo thut ng

ca C18 chnh l section kiu overlay m ti trnh by trn).


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ISR Context Saving (lu trng thi chng trnh ngt) s dng

[save=save-list]

C php:

#pragma interrupt isr save=myint, section("mydata") // lnh ny s lubin myint v section c tn l mydata.

Ok, cu hi t ra cho chng ta l ti sao li phi lu trng thi

chng trnh ngt? V cu hi u tin s l trng thi chng trnh

ngt l g?

Trong khoa hc my tnh, context ng ngha vi trng thi (state) cachng trnh. Nhiu ngi cn cho rng n l ti nguyn ca CPU mchng trnh ang s dng ti 1 thi im. Ti nguyn ny c th lcc thanh ghi , b nh v ngoi vi.

Ti sao phi lu trng thi chng trnh ngt???

Trong thc hin chng trnh c cc ti nguy n c c tnh

vulnerable (tnh d b tn thng, hay ni cch khc l n d b thay

i gi tr . y ti xin c gi nguyn thut ng vulnerable m ko

dch ra ting vit) . Ti nguyn ny l loi ti nguyn m thng dng

chung gia ISR v code chng trnh chnh. Bi vy nu ta ko tin

hnh lu li cc ti nguyn ny trc khi thc hin code ca ISR th

sau khi thc hin chng trnh n s th ay i v nhng d liu b thay

i ny li c code ca chng trnh chnh thc hin v nh vy

chng trnh chng ta sau khi thc hin ngt s chy sai.

V d: ti nguyn c tn l WREG c chc nng lu nhng tnh ton

trung gian. Gi s khi ang thc hin chng trnh chnh m xy ra

ngt m ta ko tin hnh lu l i WREG th chng trnh ngt s thay i

gi tr trong ti nguyn ny. Vy khi thc hin xong chng trnh ngt


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m tr li thc hin chng trnh main th khi chng trnh main c

cc d liu trong ny ra thc hin tnh ton tip s l nhng d liu

sai. Do vy kt qu cui cng l chng trnh ca chng ta thc hin

sai.

Vy cch gii quyt cho vn ny l nh th no?

Ta c th ngay rng mun chng trnh ngt ISR khng lm thay

i gi tr cc section .tmpdata gc ca chng trnh chnh th ta phi

c section .tmpdata ring cho n. M nh ti trnh by trn khai

bo #pragma interrupt s t ng to ra section .tmpdata cho ring

n.

Bi vy nn ta phi tin hnh lu trng thi chng trnh ngt

Ti nguyn c tnh vulnerability trong thu t ng ca C18 chnh l

ti nguyn qun l bi trnh dch (compiler managed resource). C

ngha rng l cc ti nguyn ny d b thay i trong khi thc hin

chng trnh ngt lm sai chng trnh chnh v th cn phi qun l

(vi ngha nh vy theo ti cc loi ti nguyn ny c th gi l ti

nguyn c che bi trnh d ch compiler masked sources). Bng

di l danh sch cc ti nguyn qun l bi trnh d ch:


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7 thanh ghi u tin c gi l vital c ngha rng n mc nh

c lu li trc khi thc hin ngt, nay ni cch khc chng trnhthc hin ngt chc chn s t ha y i gi tr 7 thanh ghi ny.

Tip theo l cc thanh ghi TBLPTR v TABLAT ( cc thanh ghic s dng truy cp b nh chng t r nh). Nu bn bit rng ISRko truy cp d liu rom th bn c th bo v trnh dch ko lu ccthanh ghi ny (pha di ti s trnh by cch lm th no ko lucc d liu nu ko cn thit phi lu).

Ging nh vy, nu bn bit ISR ko s dng con tr hm, bn cth ko lu cc thanh ghi PCLATH v PCLATU

MATHDATA l 1 section c bit c s dng bi th vic math,ngoi ra n c s dng trong ch truyn thng thc thi nhnggiao din hm. Section ny nh v th ng bn ko cn lo lng v n.


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Cui cng l section .tmpdata cha nhng gi tr trung gian cho

nhng tnh ton phc tp m ti trnh by nh th no l sec tion

temporary (.tmpdata) phn trn. Sect ion loi ny ln ln trong qu

trnh thc hin chng trnh m chng ta khng kim sot c s ln

ln ca n trong tng thi im.

Ta thy rng ti sao phi lu trng thi chng trnh ngt.

Nhng vn i km vi lu trng thi ngt s l thi gian phc v

ngt b t ng ln . Bi v trc khi thc hin code ngt th phi lu li

trng thi v sau khi thc hin ngt li phi tin hnh khi phc trng

thi lu li . Cng vic ny tn kh nhiu thi gian nu d liu

cn lu ln. c bit l trnh d ch v3.0 v phin bn cao hn , trnh

dch nhn dng ti nguyn vulnerable 1 cch d dt(conservative), c

ngha l nu n ko chng mnh c ti nguyn l ti nguyn

vulnerable hay ko th n s lu ti nguyn . Ta xem v d sau:


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ISR u tin ko gi hm khc. Bi vy trnh dch c th phn tchhm isr v nhn ra cc ti nguyn c sa l cc thanh ghi WREG,BSR, STATUS, TBLPTR v TABLAT . V th trnh dch s t ng lucc thanh ghi ny v cng ch lu cc thanh ghi ny.

Trong chng trnh th 2, c gi hm khc v th trnh dch khng

bit rng n ang v s sa ci g trong hm foo. Trong thc t hm

foo c th l module ring r. Bi vy trnh dch lu tt c ti nguyn

qun l bi trnh d ch (compiler managed resources). Vi c ch hotng ny th nu section kiu .tmpdata c d liu ln th s tn nhiu

thi gian lu v khi phc v nh ti ch ra trn rng section kiu

ny tng ln trong qu trnh thc hin chng trnh v ta ko kim sot

c iu ny.


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Vy nhim v tip theo ca ta chnh l phi ti u qu trnh lu d

liu, tc l lu nhng d liu cn thit cn nhng d liu ko cn thit

th ko lu. N c thc hin bng [nosave=nosave-list]

Ch r bin v d liu ko cn lu trong trng thi ngt bng

[nosave=nosave-list]

Nh ti trnh by trn khai bo ny s ch ra rng cc bin v

section trong nosave-list s ko c lu.

#pragma interrupt foo nosave=TBLPTR, TABLAT // khai bo ny s ko lu2 thanh ghi TBLPTR, TABLAT, bi v 2 thanh ghi ny ko c s dng trong chngtrnh main() v n ch s dng trong chng trnh ngt v th ko cn lu li (kocn bo v)

Vi ngt mc u tin cao (khai bo bng #pragma interrupt) cc v tr

ti nguyn c th khng cn lu bo v l: FSR0, TBLPTR, TBLPTRU, TABLAT,

PCLATH, PCLATU, PROD, section(".tmpdata"), or section("MATH_DATA").

Vi ngt mc u tin thp (khai bo bng #pragma interruptlow) cc

v tr ti nguyn c th l khng cn lu bo v l nhng ti nguyn

va k trn v thm WREG, BSR, or STATUS.

Vn tip theo l ta xc nh section hoc thanh ghi no b thay

i, hoc ko b thay i c th save hoc nosave. Chng nh ta li

phi c m my m trnh dch to ra xc nh xem section no b

thay i. Nu bt buc phi lm cng vic th chc chn rng ta

mun ti u ti nguyn th phi mt nhiu thi gian, cng sc, v nh

vy c l chng ai s dng C18 lp trnh. Vy cch gii quyt s l

nh th no. Ta tm hiu vn ny tip sau:

5. #Pragma tmpdata [section-name]


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Cu lnh ny s th ay i section thnh section lo i d liu .tmpdata

C php:

#pragma tmpdata [section-name]

[section-name] tn ca section d liu m trnh d ch to cc bin

temporary

V d:

#pragma tmpdata user_tmp

// cu lnh bn trong s to ra cc bin dng .tmpdata lu trong section c tn luser_tmp

#pragma tmpdata

Ta xem xt xem vn ti va gi l lm th no xc nh

section no ko thay i khng cn phi lu. Ta xt v d sau:


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Lnh #pragma tmpdata setporttmp.#pragma tmpdata : s to

thm 1 section kiu . tmpdata lu tr d liu trung gian khi thc

hin hm SetPort().

lnh tip theo #pragma interruptlow low_isr nonsave(.tmpdata)

to ra section .tmpdata cho chng trnh ngt v bo v section c tn

l setPorttmp bi chnh v th m hm setPort() c th c dng

cho c chng tr nh chnh m ko b li khi thc hin. Hay ni cch

khc section setPorttmp c dng chung cho c chng tr nh ngt

v chng trnh chnh

Vic tn dng ti nguyn mi ni trong chng trnh l vn

kh quan trng gip chng thc hin c cc Project ln m khng

tn nhiu tin chi cho ti nguyn ( Ti nguyn ti mun ni ti chnh

l b nh v tc x l). Di y ta xem xt cch ti u s dng ti

nguyn nh th no..

Tit kim ti nguyn khi x l nhiu ngt mc u tin cao

Trong chng trnh c nhiu ngt u tin cao (#pragma interrupt), v cc

chng trnh ngt mc u tin cao th ch c th kch hot 1 thi

im nn c th dng chung cc section kiu .tmpdata

V d:

void increment (int counter);

void isr1 (void);void isr2 (void);

#pragma interrupt isr1 isr_tmp nosave=section(".tmpdata")

void isr1 (void)

{

static int foo = 0;

...

increment (foo);

...

}

#pragma interrupt isr2 isr_tmp nosave=section(".tmpdata")


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void isr2 (void)

{

static int foo = 0;

...

increment (foo);

...

}

#pragma tmpdata isr_tmpvoid increment (int counter)

{

...

}

#pragma tmpdata

Trong chng trnh v d trn ta thy 2 chng trnh ngt mc u

tin cao dng chung section .tpmdata tn l isr_tmp. Bi v cc

chng trnh ngt mc u t in cao 1 thi im ch c th kch hot 1

chng trnh. Ta tng tng rng nu ko c c tnh ny khi ngt

isr1 xy ra v chng trnh phc v ngt ca n ang thc hin,

chng trnh isr1() chy vn cha xong th ngt 2 s c kch hot

th section isr_tmp b thay i. Nh th sau khi thc hin xong isr2()

chng trnh quay li thc hin isr1( ) v s dng cc gi tr trong

section isr_tmp b thay i

chng trnh isr1() thc hin khngchnh xc.

Vy vi ngt c mc u tin khc nhau trong cng 1 chng trnh

m chng trnh ngt mc u tin thp hn th chng ta phi x l

nh th n o m bo chng trnh vn tn dng c ti nguyn v

chc nng chng trnh vn c m bo chnh xc.

Ngt lng nhau (Nested Interrupts)

Ta xt v phn tch v d sau:

void increment (int counter);

void isr1 (void);

void isr2 (void);


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#pragma interrupt isr1 isr_tmp save=section("isr_tmp")

nosave=section(".tmpdata")

void isr1 (void)

{

static int foo = 0;

...

increment (foo);

...

}

#pragma interruptlow isr2 isr_tmp save=section("isr_tmp")

nosave=section(".tmpdata")

void isr2 (void)

{

static int foo = 0;

INTCONbits.GIE = 1;

...

increment (foo);

...

}

#pragma tmpdata isr_tmp

void increment (int counter){

...

}

#pragma tmpdata

Ta thy rng section isr_tmp phi c lu li trc khi thc hin

chng trnh ngt v ngt isr2 l loi ngt c mc u tin thp nn

trong khi thc hin chng trnh ngt isr2() n c th b ngt on.

n y chc cc bn c th t phn t ch c ti sao li phi khai

bo chng trnh nh th, ti ko phn tch r chng trnh ny, cc

bn t phn tch nh v d trn ti va phn tch s thy v hiu r.

Tip: ti y bn t t cu hi ti sao li phi lng nhng nh

vy. Vic qun l ti nguyn sao ko trnh dch t lm. Nh t i

phn tch trn rng hiu r c nhng iu ti va trnh

by s tn dng c ti a ti nguyn. Gi s ta thc hin 1

Project th phi lm sao tn dng ti a ti nguyn ta c, tc l

lm sao m ti nguyn nh nht ta dng gii quyt c bi

ton . Nh ti ni trn ti nguyn y l dung lng b


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nh v tc x l chng t r nh. Nu ta ko hiu r v ko thc

hin c nhng khai bo tn dng ti a th c th ta s phi

dng VK c ti nguyn ln hn, v nh th tn tin, v i khi

thm ch l nhiu khi c tin cng ko mua c.

6. #pragma config

Khai bo ny ci t cu hnh s dng trong cc ng dng khc

nhau. V c th s dng nhiu khai bo cu hnh cho thit b

C php:

# pragma config setting-list

setting-list:

setting

| setting-list, setting

setting:

setting-name = value-name

setting-name = value-name : ng vi tng thit b, tra chng ta s

dng ti liu PIC18 Configuration Settings online help . Bn c th

dowload ti liu ti y.

V d vi PIC18F2220 tra trong ti liu ta c:
mailto:[email protected]://sites.google.com/site/drocket42/Document/hlpPIC18ConfigSet.rar?attredirects=0&d=1https://sites.google.com/site/drocket42/Document/hlpPIC18ConfigSet.rar?attredirects=0&d=1https://sites.google.com/site/drocket42/Document/hlpPIC18ConfigSet.rar?attredirects=0&d=1mailto:[email protected]


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Da vo ta cu hnh cho PIC18F2220 nh sau:


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#pragma config WDT = ON, WDTPS = 128

#pragma config OSC = HS

/* cu hnh ny enable Watchdog Timer, thit lp postcaler

Watchdog l 1:128 v oscillator HS*/

void main (void)

{

...

}

7. Processor-Specific Header Files

L loi file cha nhng khai bo cho nhng thanh ghi chc nng

c bit .

V d, trong file header ca PIC18C452, PORTA c khai bo:

extern volatile near unsigned char PORTA;

extern volatile near union {

struct {

unsigned RA0:1;

unsigned RA1:1;

unsigned RA2:1;

unsigned RA3:1;

unsigned RA4:1;

unsigned RA5:1;

unsigned RA6:1;

} ;

struct {

unsigned AN0:1;

unsigned AN1:1;

unsigned AN2:1;


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unsigned AN3:1;

unsigned T0CKI:1;

unsigned SS:1;

unsigned OSC2:1;

} ;

struct {

unsigned :2;

unsigned VREFM:1;

unsigned VREFP:1;

unsigned :1;

unsigned AN4:1;

unsigned CLKOUT:1;

} ;

struct {

unsigned :5;

unsigned LVDIN:1;

} ;

} PORTAbits ;

Khai bo u tin ngha rng PORTA l 1 byte ( kiu unsigned

char). Modiffer extern cn thit khi gi file header trong file khc

th bin mi c hiu lc, nearc ngha l bin PORTA c t trong

b nh RAM c th truy cp. Dng khai bo ny thit lp gi tr

PortA.

V d:PORTA = 0x34; /* gn gi tr 0x34 ti cng A */

Tip theo l khai bo th 2 l cu trc nc danh m ti trnh by

trn, vy ta hiu khai bo ny nh th no. Bn c th thy cc nhn

RA0, RA1.; AN0, AN1ging vi nhn m trong datasheet ghi. T c

l dng khai bo ny chng ta c th truy cp tng bit trong portA.

V d:


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PORTAbits.AN0 = 1; /* Sets chn c k hiu AN0 pin */PORTAbits.RA0 = 1; /* Sets chn c k hiu RA0 pin, c tcdng ging vi lnh trn v AN0 v RA0 cng l k hi u ca1 chn*/

Cc file header ny Microchip cung cp cho chng ta hu nh

y cc dng Pic18 sau khi ta ci t C18 trn my. xem cc

file header ny ta c th vo th mc C:\Program

Files\Microchip\mplabc18\v3.38\h . Cng vic ca ta ch l dng n,

dng n trong chng trnh ta dng lnh:

#include // trong xxxx l ch s VK tng ng

ta dng

V d khi lp trnh cho pic18f4550 ta khai bo :

#include

Ngoi vic s dng tn trc tip khai bo ta c th s dng lnh

#include kt hp vi lnh p option s dng file

header ca VK tng ng

Trong cc file header cn nh ngha sn cho chng ta cc Macro

assembly v ta sn s dng chng trong lp trnh. Danh sch cc

Macro v chc nng ca chng ti lit k di bng sau:

Macro Chc nng

Nop()

Khng thc hin g, ch l delay 1 chu k dao

ng thch anh, thng s dng trong vit hm

delay

ClrWdt() Clear watchdog timer

Sleep() Thc thi lnh SLEEP

Reset() RESET thit b


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Rlcf(var, dest, acces) Quay tri gi tr var qua bit mang

Rlncf(var, dest, acces) Quay tri gi tr var ko qua bit mang

Rrcf(var, dest, acces) Quay phi gi tr var qua bit mang

Rrncf(var, dest, acces) Quay phi gi tr var ko qua bit mang

swapf(var, dest , acces) i v tr nibble ca gi tr var

- Nu s dng Macro qu nhiu s nh h ng ti qu trnh ti u

cc chc nng m Macro m nhim

- Var : phi l 8 bit v ko c t trong stack

- Nu dest =0, kt qu c t trong WREG, nu dest=1 kt qu

c t trong var. Nu access =0 th bank c th truy cp cchn, ghi gi tr BSR, nu access=1 th bank s c chn

da trn gi tr ca BSR

V d:

var=0b11110000; // gi tr 8bit

Rlcf(va r, 1 , 0) / / gi tr v ar =1 11 00 00 1 c l u trong bank c th

truy cp, bit mang=1

Hnh biu th thc hin lnh Rlcf()

1 1 1 1 0 0 0 0

Cc lnh khc qu trnh thc hin tng t nh vy.

1

1 1 1 0 0 0 0 1

Gi tr gc

Bit mang

Gi tr ch


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8. Processor-Specific Register Definitions Files

Cc file nh ngha thanh ghi ca VK l file assembly cha cc

nh ngha v cc thanh ghi. Cc khai bo ny chnh l vic dn nhn

cho cc thanh ghi ta sn s dng m ko cn khai bo.

V d: PortA ca VK Pic18C452 c nh ngha trong file l:

SFR_UNBANKED0 UDATA_ACS H'f80'

PORTA

PORTAbits RES 1 ; 0xf80

nh ngha ny c ngha l PortA c 1 nhn l PORTA v PORTAbits

v c 2 u c tham chiu ti v t r c a ch 0xf80 (y chnh l

a ch ca thanh ghi PortA trong VK Pic18c452)

Ta c th xem cc nh ngha ny trong th mc: C:\Program

Files\Microchip\mplabc18\v3.38\src\extended\proc


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Phn II: Lp trnh PIC18 bng MPLAB C18

Dowload phn mm MPLAB v C18 trn internet ri tin hnh ci

t chng trn my tnh ca bn. C 1 lu cc loi phn mm u cphin bn ca n v tng ng vi loi phin bn ca MPLAB bn

phi xem n h tr C18 ti phin bn no. V nu khng tng thch

gia 2 ci ny khi thc hin dch chng trnh s bo li v bn chng

bit li ch no.

Download MPLAB:

http://ww1.microchip.com/downloads/en/DeviceDoc/MPLAB_IDE_8_7

6.zip

Download C18:

http://ww1.microchip.com/downloads/en/DeviceDoc/mplabc18_v3.40_

windows_lite.exe

Bn download chng v my ri tin hnh ci t nh chng trnh

bnh thng. Ti khng i su v vn ny.

1. S dng MPLAB

1.1. Qun l Project

Cng nh bt k trnh d ch no khc MPLAB cng c assembler,

compiler, linkerVy ta xem MPLAB dng chng nh th no to

ra file chy. Tin trnh to file chy c th hin hnh 2.1 (hnh

di):
mailto:[email protected]://ww1.microchip.com/downloads/en/DeviceDoc/MPLAB_IDE_8_76.ziphttp://ww1.microchip.com/downloads/en/DeviceDoc/MPLAB_IDE_8_76.ziphttp://ww1.microchip.com/downloads/en/DeviceDoc/mplabc18_v3.40_windows_lite.exehttp://ww1.microchip.com/downloads/en/DeviceDoc/mplabc18_v3.40_windows_lite.exehttp://ww1.microchip.com/downloads/en/DeviceDoc/mplabc18_v3.40_windows_lite.exehttp://ww1.microchip.com/downloads/en/DeviceDoc/mplabc18_v3.40_windows_lite.exehttp://ww1.microchip.com/downloads/en/DeviceDoc/MPLAB_IDE_8_76.ziphttp://ww1.microchip.com/downloads/en/DeviceDoc/MPLAB_IDE_8_76.zipmailto:[email protected]


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T file ngun (source file) c vit theo c php assembly hoc c

php compile (trong ti liu ny ta nghin cu C18 m ti trnh by

phn 1), kt hp vi cc option build, cc assembler v compiler s

dch ra m my (hnh 2.2). Tip theo l ti cng vic ca Linker s

lin kt file do cc trnh d ch to ra + th vin file object + linker

script (tp link, l tp ch r b tr b nh vi tng VK khc nhau)

to ra file c th thc thi (file.hex) v file ginh cho debug.

Hnh 2.1


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1.2. Cc bc to ra f ile.hex

Di y ta i tng bc cch t u ti cui cch to fil e.hex ( l

file np vo VK chy)

B1: chn thit b

y l bc chn thit b m ta tin hnh lp trnh cho n. Chon

thit b c th tin hnh sau v trc khi d ch chng trnh. Nhng

theo khuyn co th nn thc hin bc ny trc khi bt u 1

project. ta c th tin hnh la chn li thit b nh s au: Configure/

select Device .

Hnh 2.2


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41

B2: To project:

B2.1: M mi tr ng pht trin tch hp MPLAB: start/all

program/Microchip/ MPLAB IDE v8.70/ MPLAB IDE

Hnh 2.3


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42

B2.2: to 1 file: file/New hoc n ctrl+N

Hnh 2.4

Hnh 2.5


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43

y l ca s ta vit code lp trnh. File s c dng add vo

project khi bn tin hnh lm 1project (bc 3)

Sau khi vit xong code tin hnh lu li file/save as hoc n ctrl+s .

Chn th mc bn mun lu file. Lu tn file bn phi c phn m

rng .* sau tn. V d: file ca bn tn l sample th khi lu bn phi

ch r l .c, .h hoc .asm

B2.3: to project: project/project wizard

n next ti ca s la chn thit b . y ta cn phi la chn thit

b m mnh mun pht trin. Nh hnh di:

Hnh 2.6


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Ti y, cu hi t ra l, nu ti mun thay i thit b pht trin

trong project th phi lm project li t u. Cng vic tht mt

cng v thiu t nh chuyn nghip, ta c th tin hnh la chn li

thit b nh sau: Configure/ select Device. Ta c:

Hnh 2.7


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Sau tin hnh la chn thit b trong phn Device m ti khoanh

trn.

phn ny ta cng c th thy rng MPLAB s bo cho ta bit rng

thit b m ta chn c h tr ti u. Biu tng mu xanh tc l c

h tr v ngc li mu l khng h tr. V d vi pic18f4550 h

tr hu ht cc chng trnh np ch c PICkit1 l khng

Tip theo bn n next. Ta c ca s la chn ngn ng lp trnh:

Hnh 2.8


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46

La chn ngn ng lp trnh trong phn Active Toolsuite. Nu ta s

dng C18 th la chn nh trn, hoc ta c th la chn loi ngn ng

khc. Trong phn Toolsuite Contents ta c th kch chut vo tng

phn v xem v t r ci t cc phn di Location xem c ging

th mc ta ci khng. Nu khng ging ta c th chn li bng n

Browse. Nhng theo ti iu ny l khng cn thit cho lm. v

thng l phn mm s t cp nht th mc ci t chng trnh

Sau ny, sau khi to xong project ta cng c th kim tra v sa li

ng dn ca chng bng cch: project/set language Tool locations

Hnh 2.9


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Tip theo n next ta s c ca s chn th mc lu project v

nhp tn project ca ta vo:

Hnh 2.10


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48

Chn th mc lu project bng Browse > nhp tn file, n Save.

sau n next:

Hnh 2.10


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y ta c th Add fi le to ra b c 1 hoc ta cng c th Add

sau khi to xong project. Nu Add file y, ta t in hnh chn file

phn tree_box bn tri, chn vo file cn add sau n Add, hoc ta

cng c th xa b file add xong bng cch chn vo file bn phiri n Remove.

1file ta ch cn phi add l file .lkr. file ny c tc dng bo

cho trnh dch bit t chc b nh ca loi vi iu khin ta s dng.

Vi mi thit b c 1 f ile . lkr tng ng. Ta chn file trong phn th

mc: C:\ProgramFiles\Microchip\mplabc18\v3.38\bin\LKR

Sau n next ta c ca s hon thnh to project:

Hnh 2.11


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50

n finish hon thnh to project.

Chng ta va hon thnh xong cch to 1 pro ject . Ok, t gi c ththoi mi lm cc iu m mnh mun. Thoi mi th hin kh nng

lp trnh ca mnh nh!!!

Test code bng simulator

Chng trnh ca chng ta b li, hoc ta mun kim sot tng phn

chng trnh Ta c th s dng cng c debug gii quyt vn

ny.MPLAB c th tch hp c Debugger trong n. Tin hnh debugger

c th thc hin trn phn cng hoc phn mm. Mnh thng s dng

debug bng phn mm v l do ti tin..hjhj

Hnh 2.11


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51

tin hnh chn cng c debugger: debugger/select Tool . Ta s

c 1 lot cc cng c la chn cho debugger tng ng vi loi m ta

c. V d ta c mch debugger pickit3 th sau khi cm mch picket3

vo my tnh ta chn cng c debug l pickit3(debugger/select Tool/

picket3), MPLAB s t kt ni vi phn cng v t a c th thc hin

debugNu ta khng c mch phn cng s dng cho debugger th ta

chn debug bng phn mm bng cch chn debugger/select Tool

/MPLAB SIM.

Tin hnh debug bng phn mm tng t nh vi debug cc trnh

dch khc vi cc thao tc nh l set breakpoint, step over, step in,step out.Sau khi chn debugger/select Tool /MPLAB SIM ta c

ca s (hnh 2.12):

Ta c thanh cng c ginh cho debug vi cc chc nng sau (hnh

2.13):

Hnh 2.12


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chy tng dng lnh ta n step into (F7)

quan st c cc gi tr thanh ghi v cc bin c trong chng

trnh ra dng ca s watch: View/Watch (hnh 2.14) . Cch s dng ca

s ny ti trnh by trong phn cc ca s m rng bn di.

Mong mun ca ta trong khi debug chng trnh l kim tra tng

on chng trnh. thc hin iu ny ta dng cc Breakpoint. Khi

ta n Run th chng trnh chy ti dng c breakpoint s dng li.

set cc Breakpoint ta click chut phi vo dng lnh ri chnset breakpoint (hnh 2.15) hoc double-click vo dng

Hnh 2.13

Hnh 2.14


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53

Vn gp phi tip theo l khi ta chy tng dng lnh bng step

into m trong chng trnh c vng lp delay ( thc hin chc nng

delay) th ta s phi n rt nhiu ln cho ti khi kt thc vng lp .

iu thc s l bt tin v th cng. Vy ta thy c cng c

step out s gii quyt vn ny. Khi ta trong vng lp delay th

ta n step out s thot khi vng lp ny.

M rng:

Hnh 2.15


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MPLAB l mi trng pht trin tch hp. Chnh v th ta cng c

th pht trin cc ng dng bng cc trnh d ch khc trn nn ca

mi trng ny. Cng vic pht trin bng ngn ng khc ch khc

so vi phn to project trn trong phn la chn ngn ng lp

trnh trnh by.

Ta c th la chn ngn ng lp trnh khc. Nh v d trn ti pht

trin bng CCS. Bn cng c th tin hnh bng trnh dch khc m

bn quen thuc.

Lu : Tt nhin rng trnh dch m bn mun ph t t rin trongmi trng MPLAB phi c ci t trn my ca bn ri

1.3. Ca s tin ch s dng trong MPLAB

Mi trng lp trnh tch hp MPLAB cung cp cho chng ta nhiu

window kim sot vic thc hin chng trnh, quan st qu trnh


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thc hin chng trnh v nht l khi thc hin debug ta c th dng

cc window ny quan st gi tr cc bin, cc thanh ghi.

Ca s disassembly listing

Ca s hardware stack

2. V d lp trnh Pic18 bng C18

Phn ny mnh s trnh by cc v d n gin s dng C18 t rn

mi trng MPLAB thc hin cc chng trnh c bn s dng cc

module trong vi iu khin Pic18. Mc ch gip hiu v cch lm

vic trn MPLAB, s dng C18 v iu khin cc module trong Pic18

m Microchip tch hp sn.

Ti gi s rng bn c kin thc c bn v phn cng v th

khng di dng mt thi gian v sai mc ch ca ti liu ny ti s

khng ni ti phn cng.

Nu cha c kin thc v phn cng VK Pic18 th bn download

ti y.

Tip: xem chng trnh c thc hin ng nh mnh mong munhay khng ti s dng m phng bng Proteus. Chng trnh ny

l chng trnh dng m phng thit k mch ph bin v khng

kh s dng. Bn tin hnh download v vi ci t trong my.

Nu c phn cng thc th cng tt, nhng theo ti l khng cn

thit lm.


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56

2.1. I/O c bn v delay

2.1.1. I/O

y l chc nng c bn nht ca cc loi vi iu khin.

s dng cc k hiu gi nh cng ta phi khai bo:

#include (trong xxx l tn loi vi iu khin ta s

dng. v d nu ta s dng loi vi iu khin p18f4550 th khai bo

#include). Hoc c th khai bo cch khc nh sau:

defined(__18F4550)

#include

Thit lp pin l in hay out: vi iu khin VK Pic ging nh

tt c cc loi VK khc. pin no c cu hnh 0 th l

pin out. Ngc li pin no c cu hnh 1 th l pin in.

Loi port K hiu tng ng

PortA TRISA

PortB TRISB

PortC TRISC

V d: ta cu hnh in/out cho PortA

TRISA=0; //A l cng out

TRISA=0xf0 (hoc TRISA=0b11110000) //pinA0,..,A3 l out,

pinA4,..,A7 l in

Tng t thit lp cu hnh in/out vi cc Port khc Xut d liu trn cc Port

Bng 2.1


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xut d liu trn cc cng ta phi cu hnh cng l out v gn

cc gi tr ti cc k h iu cng tng ng:

Loi port K hiu tng ng

PortA PORTA

PortB PORTB

PortC PORTC

c d liu trn cc cng

c d liu trn cc cng th tng ng cng ta ph i cu hnh l

cng vo v c gi tr tng ng vi k hiu cng

V d c th v xut nhp d liu trn cc cng ti khng lmtrc tip y. tng minh hn ti s c trnh by chi tit

phn v d pha d i.

2.1.2. Delay

Trong C18 h tr cc hm sn cc hm delay. s dng cc hm ny

ta phi khai bo #include

Hm Delay1TCY() = Nop() : hm ny delay 1 chu k dao ng

thch anh. Ty theo thch anh tn s bao nhiu m delay by

nhiu. V d ta s dng thch anh tn s f=4Mhz th hm ny s

delay 1/(4.10^6)=0.25s Hm Delay10TCY() : hm ny delay 10 chu k dao ng thch

anh

Hm Delay10TCYx(unsigned char): hm ny delay bi s ca 10

chu k dao ng thch anh

Bng 2.2


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V d: Delay10TCYx(5) : delay 5*10*(1/f) = 10/f (giy)

unsigned char: nm trong khong [0,255]

Delay100TCYx(unsigned char): hm ny delay bi s ca 100chu k dao ng thch anh

unsigned char : nm trong di [0,255]

Delay1KTCYx(unsigned char): hm ny delay bi s ca 1000

chu k dao ng thch anh


Delay10KTCYx(unsigned char): hm ny delay bi s ca

10.000 chu k dao ng thch anh


Tt c cc hm delay u tr v gi tr Void

y l phn u tin v th ti s trnh ny chi tit cch to project,

add file, dch chng trnh v np chng trnh m phng trn

proteus. T phn sau cc bc tin hnh tng t .

2.1.3. V d

Ti s dng pic18f4550 lm v d v m phng trn proteus:


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59

Bn to file mi, sau nhp on m sau vo

#include

#include

void main()

{

TRISB=0x00; //cau hinh PortB l cong out

PORTB=0x88; //xuat d lieu PortB

while(1)

{

PORTB=0X00; //xuat gia tri ra ngoai

Delay100TCYx(250); //delay 0.25ms

PORTB=0X01;

Delay100TCYx(250);

PORTB=0X02;


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Delay100TCYx(250); //delay 0.25ms

PORTB=0X03;

Delay100TCYx(250);

}

}

Ri tin hnh lu vo th mc m bn mun trn my tnh ca

mnh vi tn io.c

To project nh ti trnh by trn vi tn ty . y ti

ly tn l io

Trong phn add file bn phi add file io.c va mi to trn v file

18f4550_g.lkr (xem li phn add file trang 9). c nh sau:


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61

Sau tin hnh dch chng trnh. Ta c file io.hex.

Np file ny vo trnh m phng protues

Double-click vo vi iu khin trn proteus. Xut hin ca s np

file io.hex


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Sau click vo phn ti khoanh trong dn ti th mc bn lu

project v MPLAB dch ra f ile io.hex v lu .

Sau khi np file xong bn n nt m phng nh bnh thng.

V d rt n gin c nhim v cu hnh PortB v xut d liu,delay sau 1 khong thi gi an , xut d liu

Cc bn c th download chng trnh full y:https://sites.google.com/site/drocket42/home
mailto:[email protected]://sites.google.com/site/drocket42/homehttps://sites.google.com/site/drocket42/homemailto:[email protected]


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63

2.2. RESET

2.2.1. C bn v RESET trong PIC18

PIC18fxxx c cc loi RESET sau:

Reset Power-on (POR)

Mch reset bt ngun nh hnh di:

Xung bt ngun c chip to ra bt c khi no VDD tng vt mc

ngng. iu ny s cho php chip bt u ch khi to khi VDD

p ng cc yu cu hot ng ( ngha l m bo cc tham s v

in p, tn s, nhit ), nu iu kin ko m bo hot ng th

reset ny s gi cho ti khi cc tham s ca iu kin hot ng c

m bo.

Khi c ngt ny xy ra th bit ORP c set thnh 0 v n s ko b

thay i v cc ngt phn cng khc, chnh v th thot khi ngt

ny th user phi reset bng phn mm i km vi ngt ny

Reset MCLR trong khi hot ng bnh thng

- Mch ny chcn khi ngun thp. diode gip tx nhanh khi ngun xung thp- R=1 gii hn dng vo tt C ko nh hng chn ny


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Vi iu khin c chn reset MCLR , nu ra mun reset loi ny th

phi gi chn ny mc low. ( m bo chng nhiu, tc l khng

reset khi c xung mc low m ko phi do ngi dng to ra Microchip

tch hp sn module chng nhiu cho chn ny)

Ta cng c th disable ngt ny bng cch set bit MCLRE=0 , khi

chn ny b disable n s tr thnh u vo s

Reset MCLR trong ch qun l ngun

Reset Watchdog timer (WDT)

Reset programmable Brown-out (BOR)

PIC18 cung cp 1 mch BOR gip chng ta c th tit kim ngun.

BOR c iu khin bng BORV1:BORV0 v BOREN1:BOREN0. Ta

cu hnh cho BOR theo bng sau:

Cu hnh BOR Trng thi

ca

SBOREN

(RCON)

Hot ng BORBOREN1 BOREN0

0 0 Unavailable

BOR disable; cho php BOR

bng bng lp trnh li cc bit

cu hnh

0 1 Available

BOR cho php bng phn mm;

hot ng BOR c iu khinbng SBOREN

1 0 Unavailable

BOR cho php bng phn cng

chy trong ch run v idle,

disable trong ch sleep


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65

1 1 Unavailable

BOR cho php bng phn cng;

phi c disable bng lp trnh

li cc bit cu hnh

Reset bng lnh RESET

Reset khi ngn xp y

Rest khi ngn xp underflow

2.2.2. V d

V d ny ti gii thiu v x l RESET power-up v RESET bng

chn MCLR. V y l 2 lo i RESET c dng ph bin

* LED ch th:

1 blink ---------->RESET bt ngun


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66

2 blinks ------->RESET MCLR

3 blinks ------------> Brown out reset (BOR)

4 blinks ------------> RESET WDT ( watch dog timer time out)

Trong v d m phng bng proteus ti ch m phng RESET bt

ngun v RESET MCLR. Khi bt u chy m phng n ch th s

sng 1 ln (1 blink) c ngha l RESET bt ngun. Khi n RESET

MCLR n ch th s nhy sng 2 ln.

Code nh sau:

/* FileName: reset_source.c

* Dependencies: Header ( .h) fi les i f appl icable, see below

* Processor: PIC18F

* Compiler: MCC18 v3.30 or higher

* Writer: Rocket42 */ #include

#include "reset.h"

/*Configuration settings:

* Oscillator is configured as INTRC

* watch dog timer is disabled or enabled (comment outrespective line)

* Extended instruction mode is disabled

* Low voltage programming is disabled

*/


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#pragma config XINST = OFF, LVP = OFF

#pragma WDT = OFF

//#pragma WDT = ON, WDTPS = 1024

#define RESET 1

//Function Prototypes

void user_main(void);

void Blink_LED(unsigned int number_of_blink);

void Delay(void);

//Reset flags

unsigned char R_POR, R_MCLR, R_BOR, R_WDT;

//main function

void main(void){

// Clear Reset flags

R_POR = 0;

R_MCLR = 0;

R_BOR = 0;

R_WDT = 0;

// Configure PORTB as output

LATB = 0x00;

TRISB = 0x00;

if(isPOR() == RESET){ //Reset source is POR

Blink_LED(1);

R_POR = 1;

}

if(isMCLR() == RESET){ //Reset source is MCLR

Blink_LED(2);

R_MCLR = 1;


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}

#if def ined(BOR_ENABLED)

if(isBOR() == RESET){ //Reset source is BOR

Blink_LED(3);

R_BOR = 1;

}

#endif

#if defined(WDT_ENABLED)

if(isWDTTO() == RESET){ //Reset source is WatchDeog

timer time out

Blink_LED(4);

R_WDT = 1;

}

#endif

StatusReset(); //Clear the Reset status

user_main(); //call the "user_main" -- The User

application program

}

void user_main(void)

{

while(1); //Any user application to be executed and wait untillreset happens

}

void Blink_LED(unsigned int number_of_blink)

{


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unsigned int n=0;

// ************ BLIN K LED *******************************

for(n = 0; n < number_of_blink; n++){

Delay(); // Turn on

LATB = 1;

Delay(); // Turn off

LATB = 0;

}

}

void Delay(void){

unsigned int delay = 8000; // If faster oscillator is used, make

this larger

while(delay--);

}

Tip:

- Ti s dng m phng bng PIC18f4550, nu bn s dng loi

Pic18 khc th ch cn chn li thit b trong trnh dch MPLAB

nh sau: configure/select device


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Tin hnh la chn thit b mnh mun s dng trong m phng

phn ti khoanh trn. Ri nhp OK th l hon thnh

- Cc bn c th download chng trnh full y:

https://sites.google.com/site/drocket42/home

2.3. Sleep
mailto:[email protected]://sites.google.com/site/drocket42/homehttps://sites.google.com/site/drocket42/homemailto:[email protected]

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Ngôn Ngữ Lập Trình MPLAB C18