8/10/2019 NUC130-140

1/1

Core

ARM Cortex-M0 core running up to 50 MHz

One 24-bit system mer

Low-power sleep mode

Single-cycle 32-bit hardware mulplier

NVIC for 32 interrupt inputs, each with 4-levels of priority

Serial Wire Debug (SWD) interface and 2 watchpoints/4 breakpoints

Memory 32K/64K/128K bytes program memory (APROM)

4K bytes loader memory (LDROM)

Configurable data flash address and size for 128K bytes system, fixed

4K bytes data flash (DataFlash) for the 32K bytes and 64K bytes system

4K/8K/16K bytes embedded SRAM

PDMA mode

Clock Control

Flexible selecon from different clock source

22.1184 MHz internal oscillator (trimmed to 1%) for system operaon,

and 10 kHz internal low-power oscillator for Watchdog

mer and Wake-up operaon One PLL, up to 50 MHz, for high performance system operaon

4 ~ 24 MHz external crystal input for precise ming operaon

32.768 kHz external crystal input for RTC funcon and low-power

system operaon

Timers

4 sets of 32-bit mers with 24-bit up-mer and one 8-bit pre-scale

counter

Independent clock source for each mer

One-shot, periodic, toggle and connuous counng operaon modes

Event counng funcon

Input capture funcon

PWM

Four 16-bit PWM generators with eight PWM outputs

or four complementary paired PWM outputs

Each PWM generator equipped with one clock source selector, one

clock divider, one 8-bit pre-scale and one Dead-Zone generator for

complementary paired PWM

Up to eight 16-bit digital capture mers (shared with PWM mers)

with eight rising/falling capture inputs

Capture interrupt

ADC 12-bit SAR ADC with 700 Ksps

Up to 8-ch single-end input or 4-ch differenal input

Single scan/single cycle scan/connuous scan

Each channel with individual result register

Threshold voltage detecon

Conversion start by soware programming or external input

PDMA mode

Communicaon Interface

3 UARTs, up to 1 Mbps with flow control

4 SPIs, clock up to 32 MHz (Masterat 5V), 10 MHz (Slave at 5V)

2 I2Cs

IrDA (SIR) and RS485

I2S

Interface with external audio CODEC

Operate as either Master or Slave mode

Capable of handling 8-, 16-, 24- and 32-bit word sizes

Mono and stereo audio data

USB 2.0 Full-Speed Device(NUC140 only)

One set of USB 2.0 FS Device 12 Mbps

On-chip USB Transceiver

1 interrupt source with 4 interrupt events

Control, Bulk, Interrupt and Isochronous transfers

6 programmable endpoints

512 bytes internal SRAM as USB buffer included

Remote wake-up capability

CAN 2.0

CAN protocol version 2.0 part A and B

Bit rates up to 1 Mbps

32 Message Objects

Each message object has its own idenfier mask

Programmable FIFO mode (concatenaon of Message Object)

Maskable interrupt

Disabled Automac Re-transmission mode for Time Triggered CAN

applicaons

Power down wake-up funcon

Analog Comparator

Up to 2 analog comparators

External input or internal band-gap voltage selectable at negave node

Interrupt when compare result change

Power down wake-up

RTC

Soware compensaon by seng frequency compensate register (FCR)

RTC counter (second, minute, hour) and calendar counter (day, month, year)

Alarm registers (second, minute, hour, day, month, year)

EBI Bus (100-pin and 64-pin package only) Accessible space: 64K bytes in 8-bit mode or 128K bytes in 16-bit mode

8-/16-bit data width

Byte write in 16-bit data width mode

Brown-out Detector

With 4 levels: 4.5V / 3.8V / 2.7V / 2.2V

Brown-out interrupt and reset opon

GPIOs

Up to 80 general-purpose I/O (GPIO) pins

Four I/O modes:

Quasi bi-direcon

Push-Pull output

Open-Drain output

Input only with high impendence

TTL/Schmi trigger input selectable

All GPIO pins can be configured as interrupt source with edge/level seng

Wide Operang Voltage Range

2.5V to 5.5V

Operang Temperature

- 40C ~85C

Packages (RoHS)

LQFP48 (7x7mm)

LQFP64 (10x10mm)

LQFP100 (14x14mm)

Features of NUC130/140 series