output, inputt dan interrup komputer

7/29/2019 output, inputt dan interrup komputer

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IKI10230Pengantar Organisasi KomputerBab 4.1: Input/Output & Interrupt

19 Maret 2003

Bobby Nazief ([email protected])Qonita Shahab ([email protected])

bahan kuliah: http://www.cs.ui.ac.id/kuliah/iki10230/

Sumber:1. Hamacher. Computer Organization, ed-5.2. Materi kuliah CS152/1997, UCB.


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Input/Output: Gerbang Ke Dunia Luar

Processor(active)

Computer

Control(brain)

Datapath(brawn)

Memory(passive)

(whereprograms,datalive whenrunning)

Devices

Input

Output

Keyboard,Mouse

Display,Printer

Disk(whereprograms,datalive whennot running)


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Motivation for Input/Output

I/O is how humans interact with

computers

I/O lets computers do amazing things: Read pressure of synthetic hand and control

synthetic arm and hand of fireman

Control propellers, fins, communicatein BOB (Breathable Observable Bubble)

Read bar codes of items in refrigerator

Computer without I/O like a car withoutwheels; great technology, but wont getyou anywhere


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I/O Device Examples and Speed

I/O Speed: bytes transferred per second(from mouse to display: million-to-1)

Device Behavior Partner Data Rate(Kbytes/sec)

Keyboard Input Human 0.01

Mouse Input Human 0.02

Line Printer Output Human 1.00

Floppy disk Storage Machine 50.00

Laser Printer Output Human 100.00

Magnetic Disk Storage Machine 10,000.00

Network-LAN I or O Machine 10,000.00

Graphics Display Output Human 30,000.00


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What do we need to make I/O work?

A way to connect many types ofdevices to the Proc-Mem

A way to control these devices,respond to them, and transferdata

A way to present them to user

programs so they are useful

Proc Mem

PCI Bus

SCSI Bus

cmd reg.

data reg.

Operating System

WindowsFiles


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Organisasi I/O

Prosesor Memori

Control Lines

Address Lines

Data Lines

AddressDecoder

ControlCircuits

Data & StatusRegisters

Input Device

I/O Interface

BUS


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A Bus is:

shared communication link

single set of wires used to connect multiplesubsystems

Control

Datapath

Memory

Processor

Input

Output


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Review: Organisasi Input/Output

Prosesor

Bus

SOUT

DATAOUT

Display

SIN

DATAIN

Keyboard

I/O Device biasanya memiliki 2 register: 1 register menyatakan kesiapan untuk menerima/mengirim data

(I/O ready), sering disebut Status/Control RegisterSIN, SOUT

1 register berisi data, sering disebut Data RegisterDATAIN, DATAOUT

Prosesor membaca isi Status Register terus-menerus, menungguI/O device men-set Bit Ready di Status Register (0 1)

Prosesor kemudian menulis atau membaca data ke/dari DataRegister

tulis/baca ini akan me-reset Bit Ready (1 0) di Status Register


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Review: Contoh Program Input/Output

Input: Read from keyboard

Move #LOC,R0 ; Initialize memoryREAD: TestBit #3,INSTATUS ; Keyboard (IN) ready?Branch=0 READ ; Wait for key-in

Move DATAIN,(R0) ; Read character

Output: Write to displayECHO: TestBit #3,OUTSTATUS; Display (OUT) ready?

Branch=0 ECHO ; Wait for itMove (R0),DATAOUT; Write character

Compare #CR,(R0)+ ; Is it CR?; Meanwhile, stores itBranch0 READ ; No, get moreCall Process ; Do something


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Memory-mapped-I/O vs. I/O-mapped-I/O

Status & Data Registers are treated as memorylocations:

Called Memory Mapped Input/Output

A portion of the address space dedicated to communicationpaths to Input or Output devices (no memory there)

The registers are accessed by Load/Store instructions, just likememory

Some machines have special input and outputinstructions that read-from and write-to DeviceAddress Space:

Called I/O Mapped Input/Output IN Rx,Device-Address ; Processor Device

; Rx Rdevice-Address

OUT Device-Address,Rx ; Device Processor; Rdevice-Address Rx


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Contoh Program Input/Output (I/O-mapped-I/O)

Input: Read from keyboard

Move #LOC,R0 ; Initialize memoryREAD: In INSTATUS,R1 ; Read statusTestBit #3,R1 ; Keyboard (IN) ready?Branch=0 READ ; Wait for key-inIn DATAIN,R1 ; Read character

Move R1,(R0) ; Store in memory

Output: Write to displayECHO: In OUTSTATUS,R1; Read status

TestBit #3,R1 ; Display (OUT) ready?Branch=0 ECHO ; Wait for it

Move (R0),R1 ; Get the characterOut R1,DATAOUT ; Write itCompare #CR,(R0)+ ; Is it CR?

; Meanwhile, stores itBranch0 READ ; No, get moreCall Process ; Do something


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Polling


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Processor-I/O Speed Mismatch

500 MHz microprocessor can execute 500 millionload or store instructions per second, or 2,000,000KB/s data rate

I/O devices from 0.01 KB/s to 30,000 KB/s

Input: device may not be ready to send data as fastas the processor loads it

Also, might be waiting for human to act

Output: device may not be ready to accept data asfast as processor stores it

What to do?


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Program-Controlled I/O: Polling

Input: Read from keyboardMove R1,#line ; Initialize memory

WAITK: TestBit STATUS,#0 ; Keyboard (IN) ready?Branch=0 WAITK ; Wait for key-inMove R0,DATAIN ; Read character

Output: Write to displayWAITD: TestBit STATUS,#1 ; Display (OUT) ready?

Branch=0 WAITD ; Wait for it

Move DATAOUT,R0 ; Write characterMove (R1)+,R0 ; Store & advanceCompare R0,#$0D ; Is it CR?Branch0 WAITK ; No, get moreCall Process ; Do something

Processor waiting for I/O called Polling

OUT IN

STATUS DATAIN

DATAOUT


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Cost of Polling?

Assume for a processor with a 500-MHz clock it takes400 clock cycles for a polling operation (call polling

routine, accessing the device, and returning).Determine % of processor time for polling Mouse: polled 30 times/sec so as not to miss user movement

Floppy disk: transfers data in 2-byte units and has a data rate of 50KB/second.No data transfer can be missed.

Hard disk: transfers data in 16-byte chunks and can transfer at 8MB/second. Again, no transfer can be missed.


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% Processor time to poll mouse, floppy

Times Mouse Polling/sec

= 30 polls/sec

Mouse Polling Clocks/sec= 30 * 400 = 12000 clocks/sec

% Processor for polling:

12*103/500*106 = 0.002%

Polling mouse little impact on processor

Times Polling Floppy/sec

= 50 KB/s /2B = 25K polls/sec

Floppy Polling Clocks/sec

= 25K * 400 = 10,000,000 clocks/sec

% Processor for polling:

10*106/500*106 = 2%

OK if not too many I/O devices


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% Processor time to hard disk

Times Polling Disk/sec= 8 MB/s /16B = 500K polls/sec

Disk Polling Clocks/sec= 500K * 400 = 200,000,000 clocks/sec

% Processor for polling:200*106/500*106 = 40%

Unacceptable


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Interrupt


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What is the alternative to polling?

Wasteful to have processor spend most of its time

spin-waiting for I/O to be ready Wish we could have an unplanned procedure call

that would be invoked only when I/O device isready

Solution: use interrupt mechanism to help I/O.Interrupt program when I/O ready, return whendone with data transfer


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I/O Interrupt

An I/O interrupt is like a subroutine call except: An I/O interrupt is asynchronous

More information needs to be conveyed

An I/O interrupt is asynchronous with respect toinstruction execution:

I/O interrupt is not associated with any instruction, but it can

happen in the middle of any given instruction I/O interrupt does not prevent any instruction from completion


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Interrupt Driven Data Transfer

(1) I/Ointerrupt

(2) save PC

(3) interruptservice addr

Memory

addsuband

or

userprogram

readstore...jr

interruptserviceroutine

(4)

(5)


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Interrupt Service Routine (Interrupt Handler)

Main Program

Move #Line,PNTR ; Initialize buffer pointer.

Clear EOL ; Clear end-of-line indicator.

BitSet #2,CONTROL ;Enable keyboard interrupts.

BitSet #9,PS ;Set interrupt-enable bit in the PS.

Interrupt Service Routine

Read:MoveMultiple RO-R1,-(SP) ;Save R0 & R1 on stack.

Move PNTR,R0 ; Load buffer pointer.

MoveByte DATAIN,R1 ; Get input character and

MoveByte R1,(R0)+ ; store it in the buffer.

Move R0,PNTR ; Update buffer pointer.

CompareByte #$0D,R1 ; Check if Carriage ReturnBranch0 RTRN

Move #1,EOL ; Indicate end-of-line.

BitClear #2,CONTROL ;Disable keyboard interrupts.

RTRN:

MoveMultiple (SP)+,RO-R1 ;Restore R0 & R1.

Return-from-interrupt


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Benefit of Interrupt-Driven I/O

400 clock cycle overhead for each transfer, includinginterrupt. Find the % of processor consumed if the

hard disk is only active 5% of the time. Interrupt rate = polling rate

Disk Interrupts/sec = 8 MB/s /16B= 500K interrupts/sec

Disk Transfer Clocks/sec = 500K * 400

= 200,000,000 clocks/sec

% Processor for during transfer: 250*106/500*106= 40%

Disk active 5% 5% * 40% 2% busy

Determined by disks activity, whereas in Polling-driven I/O the Processor will be busy polling 40% ofthe time even if the disk is not active


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Instruction Set Support for I/O Interrupt

Save the PC for return To enable the proper return when the interrupt has been served

AVR uses the stacks

Where to go when interrupt occurs? To allow proper branch to the service routine

AVR defines:

- Locations 0x000 0x002 for external interrupts

- Locations 0x003 0x00C for internal interrupts

Determine cause of interrupt? To guarantee proper service routine serving proper interrupt

AVR uses vectored interrupt, which associates the location of theinterrupt service routine (see above) with the device that causes it


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Interrupt Hardware


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Interrupt Request

Processor

INTR1

I/O Devices interrupt processor through a singleline known as Interrupt Request signal (INTR)

To serve n devices, the line uses wired-or

connection that allows any interrupting device toactivate the signal any INTRi is switched on, INTR will become TRUE

INTRnINTR2

Vdd

INTR


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Sequence of Events during Interrupt

1. The device activates interrupt request signal.

2. The processor interrupts the program currentlybeing executed.

3. Interrupts are disabled by changing the controlbits in the PS.

4. The device is informed that its request has beenrecognized, and in response, it deactivates theinterrupt request signal.

5. The action requested by the interrupt isperformed by the interrupt service routine.

6. Interrupts are enabled and execution of theinterrupted program is resumed.


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Multiple Devices/Interrupts

How to handle simultaneous interrupt requests? Need to have priority scheme

Which I/O device caused exception? Need to convey the identity of the device generating the interrupt

Can processor avoid interrupts during the interruptroutine?

In general, interrupts are disabled whenever one is being serviced;interrupts will be enabled after the service is completed

However, occasionally a more important interrupt may occur whilethis interrupt being served

Who keeps track of status of all the devices, handleerrors, know where to put/supply the I/O data? In general, these is one of the tasks of Operating System


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Device Identification

CPU

Device 1Device NDevice 2

INTR1

The Interrupting Device may provide its identitythrough:

Interrupt-Request (IRQ) bit in its Status Register, which will beevaluated one-by-one by the processor (polling)

Sending special code the the processor over the bus (vectoredinterrupt)

INTRnINTR2

wired-OR


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Prioritized Interrupt: Daisy Chain Scheme

Advantage: simple

Disadvantages: Cannot assure fairness:

A low-priority device may be locked out indefinitely

CPU

Device 1

HighestPriority

Device N

LowestPriority

Device 2

INTA

Release

INTR

wired-OR


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Prioritized Interrupt: Priority Groups

CPU

Device 1Device NDevice 2

INTA1

INTR1

Interrupt Nesting: an Interrupt Service Routine may

be interrupted by other, higher-priority interrupt

INTA2INTR2


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Exceptions


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Exceptions

Interrupt is only a subset of Exception

Exception: signal marking that something out of the ordinaryhas happened and needs to be handled

Interrupt: asynchronous exception Unrelated with instruction being executed

Trap: synchronous exception Related with instruction being executed

To recover from errors: Illegal Instruction, Divide By Zero,

To debug a program

To provide privilege (for Operating System)


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I/O & Operating System

The I/O system is shared by multiple programs using theprocessor

OS guarantees that users program accesses only the portionsof I/O device to which user has rights (e.g., file access)

Low-level control of I/O device is complex because requiresmanaging a set of concurrent events and becauserequirements for correct device control are often very detailed

OS provides abstractions for accessing devices by supplying

routines that handle low-level device operations

I/O systems often use interrupts to communicate informationabout I/O operations

OS handles the exceptions generated by I/O devices (andarithmetic exceptions generated by a program)

Would like I/O services for all user programs under safecontrol

OS tries to provide equitable access to the shared I/O resources,as well as schedule accesses in order to enhance systemperformance


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I/O OSUsers Program

I/O Device

UsersProgram

I/O

Services

Device

Driver

OS

getchar(); System.in.readLine();putchar(); System.out.println();

Device

Driver

Device

Driver


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OS Interrupt Services

OSINIT Set interrupt vectorsTime-slice clock SCHEDULERTrap OSSERVICESVDT interrupts IODATA

OSSERVICES Examine stack to determine requested operationCall appropriate routine

SCHEDULER Save current contextSelect a runnable processRestore saved context of new processPush new values for PS and PC on stack

Return from interrupt

SCHEDULER

OSSERVICES

IODATA

PC


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I/O ROUTINES & DEVICE DRIVER

IOINIT Set process status to BlockedInitialize memory buffer address pointerCall device driver to initialize device & enable

interrupts in the device interface (VDTINIT)Return from subroutine

IODATA Poll devices to determine source of interruptCall appropriate device driver (VDTDATA)If END = 1, then set process status to Runnable

Return from interrupt

VDTINIT Initialize device interfaceEnable interruptsReturn from subroutine

VDTDATA Check device statusIf ready, then transfer characterIf character = CR, then set END = 1;

else set END = 0Return from subroutine


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Contoh: Main Program

.cseg

.org INT0addr

rjmp ext_int0 ;External interrupt handler

.org OVF0addr

rjmp tim0_ovf ;Timer0 overflow handler

main:

Do some initializationsrcall uart_init ;Init UART

sei ;Enable interrupts

idle:

sbrs u_status,RDR ;Wait for Character

rjmp idle

Do the work

wait:

sbrc u_status,TD ;Wait until data is sent

rjmp wait

Wrap it up


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Contoh: Interrupt Handler

ext_int0:

ldi u_status,1

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output, inputt dan interrup komputer