Routing Interfaces Quickly and Efficiently on PCBs

1 © 2014 Cadence Design Systems, Inc. www.cb-distribution.nl [email protected]

Routing Interfaces Quickly and Efficiently on PCBs

Erik Nijeboer

CB Distribution


• Cadence Channel Partner Netherlands, Belgium, Luxembourg, Spain and Portugal

• Located in Hengelo (Netherlands) and Tres Cantos – Madrid (Spain)

• Sales and Support of– Cadence

– IC Design, PCB- and Packaging-Tools– Virtuoso / Encounter– Allegro / OrCAD

– EMA-EDA– CIP interface to Farnell and Digikey libraries for OrCAD Capture CIS

– WISE– GerbTool

– Nextra three-dimensional PCB design– Downstream Technology

– CAM350– Blueprint

– Dassault– Enovia DDM/PLM environment– Reqtify

CB Distribution BV


Why don’t current Auto-Routers handle Today’s Complexities?

• Optimized for random-logic

• Consider only a single connection at a time – Order awareness is critical to a successful convergence

• Do not understand– Interrelationships of multiple elements and constraints– Logic hierarchy and/or grouping

• Can not– Humans ability to efficiently plan critical interconnect– Properly determine route feasibility

• All begin at the “detail” stage

• Without significant manual control, the results are often undesirable


Routing high-speed interfaces such as DDRx, PCIe, SATA, SFP+ faster

• Interface Aware Design (Interconnect Flow Planning)

– Graphical capturing (bundling) & planning design intent

– Flows drive global route engine

• Unique Auto-interactive technologies– Putting Designer in the driver seat

– Intelligence provided by embedded route engine

– Power of the route engine driven by experience of the Designer

Best of both worlds

• Interactive editing capabilities– Improvements made to address customer needs to route standards based interfaces

• Automatic Router– Allegro PCB Routing Option: Proven, Robust, constraint-driven router used by many customers for over a

decade

Allegro PCB Routing TechnologiesShorten time to route high speed designs significantly


Allegro Interface Aware Design


Net-groups – CreationDefining The DDR3 System Using Net-Groups


• Create the Initial “DDR3” Electrical Net-Groups

• Represents the Interface Better


CO

NT

RO

L

CLO

CK

S

DIMM or On-Board

AD

DR

/CM

D

MC

Results in 4 Net Group Polygons

This View Does NOT Show Enough “Detail”

DATA DATA


• Breaking the Data Group Even More

• Gets us to A Byte-Lane View


CO

NT

RO

L

CLO

CK

S

DIMM or On-Board

AD

DR

/CM

D

MC

BY

TE

LAN

E

BY

TE

LAN

E

BY

TE

LAN

E

BY

TE

LAN

E

BY

TE

LAN

E

Results in 9 Data Group Polygons

This View Provides A More FULL View of the Memory

Interface

BY

TE

LAN

E

BY

TE

LAN

E

BY

TE

LAN

E

BY

TE

LAN

E


• The Container Gives You a Way to Visualize –– The overall “Routing Domain” of the Interface– Visual Placement Checks Let You See Parts “Out-of-Place”

– The Polygon envelops ALL the Pins of Nets In the Net-Group

Net-Groups & PlacementUse the Polygon to “Verify” Your Placement

TERMINATOR IS OUT OF PLACE

TERMINATION BELONGS HERE


PlanNetgroup routing:


RouteNetgroup routing:


OptimizeNetgroup routing:


Demo Movie


• Auto Interactive Breakout (AiBT)

• Auto Interactive Delay Tune (AiDT)

• Auto Interactive Phase Tune (AiPT)

• General routing (scribble)

Auto-Interactive routing capabilities


Breakout“It’s All In The Sequencing”


Manual breakout one side of the bus

Common practice today


Manual breakout one side of the busRoute bus to edge of other component




Manual breakout one side of the busRoute bus to edge of other componentFinish connections based on rats, redo routing and breakout on both side


Auto-interactive Break-out TechnologyFaster routing with bundle rat order and layer control


Auto-interactive Break-out TechnologySplit view to see both ends


Demo Movie


Delay“Visualization to Solve The Timing Problem”


Routing MethodologiesFinding Delay and Phase Issues

It’s Not Here How Do I Find It Here?


• Most PCB Designers use two monitors– Design canvas in one, Constraint Manager in another

• Heads-up display provides dynamic feedback on net being edited

• Constraint Manager provides feedback on current DRC status of signals

Current interactive etch editing environment


Allegro PCB Editor Timing Vision Going beyond basic information to accelerate timing closure

Green is good; Red is short; Yellow is long; Stripes is the target net

• Allow users to see beyond their physical routing

• Customized Canvas based system– HUD variation– Custom data tips– Color coded timing and phase

information

• Reduce cross-probing to CM

• Provides SMART targets and real-time feedback on the entire matched group

• Coupled with Auto-interactive technology accelerates timing closure significantly


• Select a set of routed signals, AiDT adjusts timing of signals to meet the constraints!

– Accordion, Trombone, Miter size and amplitude controls, Multi-Layer support

– Gives user varying levels of efficiency over single segment edits

• Shortens time to tune high-speed signals by 50% or more

Auto-interactive Delay Tune (AiDT)


After

Before

Options

Routing MethodologiesAuto-Interactive Delay Tuning (AiDT)

Frame/Window Select These Nets


Timing Vision - Static Phase CalculationTwo Pin Net Example

Out-of-Phase

In-Phase


Auto-interactive Phase Tuning (AiPT)

• Meet differential pair phase requirements easily

• Static and dynamic phase compensation

• User driven controlled compensation techniques

Out of Phase

Phase Adjustment

Phase BumpsAdded


Demo Movie


Auto-Interactive Delay Tune (AiDT)Case Study by a customer

Case Tuning method Time

Case 1 AiDT 1 hours

manual editing after AiDT 4 hours

Case 2 AiDT 0.8 hours

manual editing after AiDT 3 hours

Case ( AiDT + modify) / manual Reduce Ratio %

Server Board (1+4) / 15 67%

Tablet PC 3.8 / 12 68%

Case Tuning method Time

Case 1 manual 15 hours

Case 2 manual 12 hours


General Routing“Connecting The Dots”


New Manual Route Technology“Scribble”

User “Scribbled” PathRouter Follows Your “Scribble”


Demo Movie


• Wide spectrum of technologies to apply to any kind of routing challenge on high-speed PCB designs

• New Auto-interactive Breakout Tuning accelerates time to breakout and connect interfaces

• Innovative new capabilities shorten timing closure and routing time of high-speed interfaces up to 70%– Timing Vision coupled with Auto-interactive Phase, Delay tuning

• The auto-interactive approach allows designers to use it without changing methodologies

• Route and optimize interconnects significantly faster utilizing automation and interactive utilities

Summary: Allegro PCB Routing Technologies


CB Distribution bvwww.cb-distribution.nl

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Routing Interfaces Quickly and Efficiently on PCBs