[SOLVED] 74LS74 D Flip Flop State Changing Automatically

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74LS74Dflipflopstatechangingautomatically

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3rdApril2014,17:27


Hello,

IhaveacascadedDflipflopcircuit.Schematicattached.IamsendingthedataandclockpulsefromaPICmicrocontroller.

What

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happensis,whenthedataandclockpulsesaresenttheledsglowproperlyasexpected.Butafteraminuteortwo,theflipflopstatesgetchangedautomaticallyandtheledsalsoglowsaccordingly.

Iamnotsendinganydataclockpulseafterthefirstone.Butstilltheflipflopsgetschang



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Pleasehelp!

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3rdApril2014,18:05

Re:74LS74Dflipflopstatechangingautomatically

Noisepulses(egESD)onlongwiresontheoutputorgroundcanfeedbackinternally.Decouplingcapsonchipsareessential,sometimesabuffer,althoughthetransistoroughttoactasabuffer.SoMy

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guessisconductedorradiatednoiseonlongwires.

Thebest

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abetteranswer.

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[solved]Ifyoudon't,whatdoesthatsay

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3rdApril2014,19:15


#3


Feb2013India420/05775




Yes,Iamusinglongwires,about4incheslong,fordataandclock.ActuallymyPICisonanEVKandtheflipflopsareonabreadboard.

SodoyousuggestthatIputallthethingsonaPCBandthentry?Whataboutdecouplingcaps?ShouldIusethem?WhereshouldIconnectthem?

Thanks



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3rdApril2014,19:22


atleastoneceramic0.01to0.1uFistypical.closetochipsfromacleansupply,thenbewareoftransientenvironmentalnoiselikeweldersorlinenoiseortriacdimmers.IFthereisradiatednoise,twistedpairhelpsreduc

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edifferentialnoise,but4"isfairlyshort.ISthisbatteryoperated?

Whenindoubt,alogicprobeorscopeprobewithashortgroundleadandmanualtriggerissometimesneededtofindthesourceofspuriousnoise.Bewareofsourceimpedancesandstraycouplingofmagneticorelectricfieldimpulsesordyna



micloads.

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3rdApril2014,19:22

3rdApril2014,19:40

Re:74LS74Dflipflop

#5

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statechangingautomatically

Noitisnotbatteryoperated.Iamusingatransformerbasedlinearpowersupply.Iwilladdthecapsandcheckwhathappens.

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4thApril2014,11:45


HelloSunnySkyguy,

Itriedwithceramiccapsof0.1uF.Iconne

#6


Feb2013India420/05775




ctedthecapsbetweenVCCandGNDlinesandtoeachflipflop'sdatagnd,andclockgndpins.Buttheproblemstillexists.

WheneverIswitchONorOFFanelectricalconnection(FanorLight)inmyroom,theflipflopchangesstates.Anyideahowtofixthis?

Thanks

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4thApril2014,19:01


PerhapstheLEDsaretheantennapickinguplargeelectricfieldtransient.

Withoutbigpictureofyourlayoutandconnections,Icanonlyguesshowtobestprotectit.

Ifeverythingisfloatingwithrespecttoground,addingaground

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connectioncanoftensuppressstraynoise.ALsousingatorroidalcommonmodechokewiththelongwirestoLEDswrappedwithafewturnsaroundthetorroidorsomeCMchoke.

Atleastyouhaverulesoutconductednoiseandidentifiedthesourceasradiatednoise.

Anothertrick



istoputasmallcaponoutputQtoidentifyifthenoiseisgettinginthere,(Qhasinternalinputconnections)

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5thApril2014,05:10 #8




Maybethisisnotrelatedwiththeanomalyyoudescribe,buttakeintoaccountthattheQouputsoftheflipflopsareseriouslyloadedinyourcircuit.CurrentcapabilityofLSTTL'sinHighstateislowandvoltagecanbebad,then"H"levelcanbe


Sep2001Argentina1,074336/3369,58323

zorroAdvancedMemberlevel4



insufficientfortheDinput.IwouldchangetheoutputcircuitthatlightstheLED.AneasypossibilityisputtheLEDinthecolectorcircuitandincreasetheRsfrom100ohmsto10k.Betterwouldbetousethe/QoutputandaPNPtransistor.Regards

Z

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5thApril2014,05:10



5thApril2014,17:27


Iconsideredtheloadtobemarginal.

Ifitisa74LS,[email protected]

ConsiderVf=2.0VonRedorYellowLED@20mAandassumeVbe=0.7,

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withhFE=100theloadcurrentwillbelimitedbythebasedrivecurrentwithEmitterfollowertransistor.

AlsotheemitterloadcurrentwillriserapidlyaboveVf=2Vorbasevoltage>2.7V,butthedriverimpedanceofLS74risesrapidlyabove2.7VasitsoutputisaDarlington,emitterfollowerfor



Voh,whichhas100Rcollectorcurrentlimiting,internally.

AssuminghFEof100forthe2N2222,ifVoh=2.7Vitcansupply400uAx100=40mAtotheemitter,andthebaseresistanceof100Ronlydrops0.1k*0.4mA=0.04V.Whichisnotmuch...toworryabout,soloadingisnotexcessive.

LED



currentcouldbeanythingfrom5to40mA,duetoVfjunctionvoltagetolerances.

20xmorecurrentonlowstatetheninvertwithCommonemitterlowsidedrivetoLEDcathodewithcurrentlimitingRoncollector.

Thereisanoisesusceptibilityissuehereandoneneedstoidentifyif



interferenceisconductedorradiatedthendeterminewherethemarginisleastforingressandfixthat.Sofarthereisinsufficientinformationtotrackthisdown.

Mylastguesswasradiatednoisefromsomewherepickedupmylong(?)LEDlinesthanconductedbackintoQtotogglestateevery



fewminutes,butwedon'tknowhowinterferencestarts.

LasteditedbySunnySkyguy5thApril2014at17:32.

Thebest

questiondeserves

abetteranswer.

Toshow

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aboutyou?

...TonyStewart

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14thJune2014,14:07

Re:

#10





Sorryforsuchalatereply.Iwasstuckupwithadifferentproject.

Ihavesetuptheentirecircuitonavero/stripboard.Mynewcircuitisattached.

NowIhavearelayattheoutputoftheDflipflop.Ialsohaveasmalldelaycircuitinbetweentherelayand


Feb2013India420/05775



theDFFoutput.Itisjustarequirementofmyapplication.AttheoutputoftherelayIhaveconnecteda230V,60Wattlightbulb.

Normallyeverythinghappensasexpected.WhenIgivenecessarypulsetotheDFF,therelayturnsON/OFFineffectturningthelightbulbON/OFF.Butsometimeswhentherelayisturnedoff,



theDFF(74LS74)turnsONautomaticallyjustafterbeingturnedOFF,i.e.itstaysOFFmomentarilyandthentheflipflopoutput'Q'togglesitsstate.

IhaveseenontheoscilloscopethatwhentherelayisgettingturnedOFF,anoisespikeisgeneratedontheDCside.Ihaveattachedaphotoofit.Herethe



redlineistheVCCandtheyellowlineistheGND.ThisnoiseisseenonallthepinsoftheDFF(i.e.data,clockandQ).Thisspikeisreachingvoltagesupto30Vsometimes,anditlastsaboutmax.100to150us.

WhatIunderstandisbecauseofthisnoisespiketheflipflopischangingstate.



Iwanttoknow,whatarethepossiblemethods/circuits,whichIshouldaddtoeliminatethisnoisespike,sothattheflipflopdoesnotchangestate?

ThisnoiseisalsoreachingmyPICmicrocontroller'sVCC,GNDanddatapins.CanitdamagetheIC?

Thanksforreading..pleasehelp!



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14thJune2014,14:07

14thJune2014,15:57


Thefirstthingyoushoulddoistoaddaresistorfrombasetoemitter(Vcc)ontherelaydriverPNPtransistor.Thisdrivergetamarginalbasecurrent(voltage)andno

#11


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GorgonFullMemberlevel5



definedoffsignal,onlyafloatingoff.ThismaycauserelaybouncebothatONandOFF.The'delaycircuit'andthezenerdiodeintheemittercircuitisveryiffy.Ithinkthisisdonetomakeanincreaseddelayontheoutput,buttheresultisassaidiffyatthebest.Whydoyouneedthisdelay?Togetthebestperfor



manceoftherelayyoushoulddriveitproperly.SinceyoudrivethePNPtransistorwithonly1.5Vanda10kbaseresistor,thebleederresistortoemitterneedtoberelativehighinvalue.

TorectifythisIwouldhavereducedthebaseresistor(R13)to680ohm,andaddeda1kbleederresistorfrom



theNPNs(Q4)collectortoVCC.ThisresistorwillturnthePNPtransistor(Q5)OFFproperly.

IsupposeyouunderstandthatyourdelaycircuitisworkingbothatON,andOFF,makingtheflanksiffy.

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14thJune2014,17:19


Ineedthedelay

#12


Feb2013India420/05775




circuitbecauseIamcascadingmanyoftheseflipflopstogetheranddrivingthemfromonesource,i.e.dataandclocksignal.HereifIdonotaddthedelaytheoutputofeachflipflopwillflickerifIwanttochangeonlythenthflipflopstate.

IrequirethedelaytohappeninbothON



andOFFstate.

IwillchangetheR13andadda1KfromtheNPN'scollectortoVCCandtryasyousay.Whatabouthenoise?

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14thJune2014,17:43


Ifthisismadeasabreadboardwithmanylongwires,youmayhaveaproblemanywa

#13


Nov2005Norway27759/593,15613




y.

But,howisyouractualcircuitasyouhavebuiltit?Describethedecouplingcapacitorsyouhaveused,andwhereyouhaveplacedtheminthecircuit.

Normallythenoiseiscomingfromwiresactingasantennas,and/orcapacitivecouplingbetweenelements,likeinsidetherelay.Thenoise



willcomefromthesparksgeneratedintherelaycontacts,andtheinductivespikesfromtherelaycoil.

Thatiswhyitisimportanttomakethepowersupplyasstiffaspossible,orwithaslowimpedanceaspossible,usingcapacitors,oftherighttypeandvalue,placedattheoptimalplacesinthecircuit.



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16thJune2014,14:37


Hi,

Ihavemadethechangeinmycircuit.Insteadofthe680ohmIhaveputa1kasIdidn'thavethe680ohmwithme.AndIhavealsoaddeda1kbleederresistorfromtheNPNs(Q4)collectortoVCC.

#14


Feb2013India420/05775




Myentiresetupisonveroboard.Ihavethreedifferentveroboardseachhavingthesameflipflopsandrelaycircuit.Theflipflopsarecascadedandtheveroboardsareconnectedviaconnectors.IsendthedataandclockpulsefromaPIC.

Ihaveput0.1uFceramiccapsonthevccgndterminalsof



eachflipflops.Ihaveconnecteda230V,60Wlightbulbonlytothefirstboard.

Whathappensnowis,whentherelaywithlightbulbisturnedOFFittogglesthestateoftheotherflipflopscascadedtoit.Thisdoesnothappeneverytime.Also,thishappensonlywhenthe230Vlightbulbisconnected,when



Iremovethebulb,everythingworksfine.

Iamsuremypowersupplyisprettystable.

Soitseemsthatitisthenoisefromtherelaythatismakingtheproblem.CanyoupleasetellwhatotheroptionsshouldItryout?Isitaveroboardlayoutissue?ShouldIusesomeadditionalcircuitrytohandlethe



noise?

Thanks..

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16thJune2014,15:44


Couldyoumakeacompleteschematicsofthecircuityouareusing,exactlyasyouhavebuiltit,andifpossibleaddapictureofthemockupcircuittoo.Itisimportanttoincludeallcomponentsyou

#15


Nov2005Norway27759/593,15613




use.

HowdoyoucontroltheFFs,fromamicrocontrollerormanually?

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17thJune2014,00:03


Yes,anupdateofyourschematicwouldbenice.Aftersomanyposts,yourcircuitshouldlookverydifferentfromwhenitgotstarted.

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Allen

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17thJune2014,18:15


EMIissuesarebasedonphysicsofinductionandcapacitivecouplingandconductionnoisespikes.

Averoboardcangetprettymessywithinductivegrounds,signalsandcouplingtothehighcurrentbulb,

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whicharcswhencontactsareopenedcausingmanyMHzofresonantspikes,whichcoupleeasythrustraycapacitanceorinducelargeinductivevoltagesacrossleadsandpower.

Twomethods.

1.eliminatethenoise.Useazerocrossingswitchtriac,andsnubberRCfilter.Routeallspike



currentswithtwistedpairstoreduceunintentionalradiation,suchas6twistsperinchwithcareonline&neutral.ApplysmallbuthighVratedfilmcapsacrossrelaycontacts.orshieldtherelayorremoveitfarenoughawayfromtheoffendingcircuit.(asincarsinthecornerunderthe



hood)

2.Improvethetargetimmunityfornoiseonpower,groundsandsignalsBeefupwires,uselowimpedancebatteryorpowersources,shieldtheboard,useCOmmonmodechokesonthecontrolsignals(ferrite2holebeads,torroid,clamshellcoreetc)addfeedthrucapacitive



filtersforin/outsignalsinthebox.

3.Measuretransientsmoreaccuratelywithzerolengthprobegroundusingthebarrelandtip.OrusetwoprobesinAminusBforremotesignalandgroundandwrapbothidenticalprobesastwistedpairswithidenticalshortgroundclips.Whenindoubt



connectprobetiptogroundtoensureflatline,samewith2probesinABconnectedtosamesignal,thennostraynoiseshouldbeobservedifdoneright.

Thebest

questiondeserves

abetteranswer.

Toshow

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helpedme&


aboutyou?

...TonyStewart



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19thJune2014,12:22


Ihaveattachedmyschematicandphotooftheveroboard.Thephotoscontaintheassemblycircuitalsowhere2RelayFFboardsareconnectedtogetherwiththecontrollerboard.

Iamusingthesamepower(vcc)

#18


Feb2013India420/05775




andgndlinefortherelayandtheothercircuit.HereVCC=5V.Couldthisbeaproblem?Pleasecheckandcomment.

Updated

OriginallyPostedbySunnySkyguy

1.el



iminatethenoise.Useazerocrossingswitchtriac,andsnubberRCfi



lter.Routeallspikecurrentswithtwistedpairstoreduceunintent



ionalradiation,suchas6twistsperinchwithcareonline&neutral.



ApplysmallbuthighVratedfilmcapsacrossrelaycontacts.orshiel



dtherelayorremoveitfarenoughawayfromtheoffendingcircuit.(a



Yourcommentsareveryinformative,butsometimesgetsdifficultformetounderstand.Itmaysoundsillybut,canyoupleaseexplainhow

sincarsinthecornerunderthehood)



willazerocrossingtriacandaRCsnubberwillhelptoremovenoisespikes?Ihaveverybasicknowledgeabouttriacsanduseditonlyindimmerapplication.

Also,aboutthefilmcaps,Ihave104K400polyestercap.CanIputthisvalueacrosstherelayterminals?

Thanks..



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19thJune2014,12:45


Hi,

cascadingtheSPIoverseveralPCBisnotagoodidea.Atleastyouneedaverysolid(lowohmicandlowinductance)GNDconnection.BestbyGNDplaneonthepcbandmultiplewiresfromboardtoboard.

Theremay

#19

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benoiseontheGNDthatcausesyourproblem.

Myhint:Trytousea20kseriesresistorfromcommonCLKlinetoFFCLKinputandadditionallyconnectan1nFcapacitorfromtheCLKinputtoGND.This"cleans"theclkline.

MindtoconnectallUNUSEDinputsofyourFFtoavalidlogical



state.

Hopethishelps.

Klaus

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19thJune2014,13:13


Sinceyouaredaisychainingseveralmodules,youneedtodecoupleeachboardforitself.

Sinceyouareusingthe5Vfortherelaytoo,youneedtoaddaelectrolytic

#20


Nov2005Norway27759/593,15613




capacitoroneachboard,Iwouldthink2247uFisok.

Inadditionyouneedtoadd0.1uFcapacitorstoeachboard.AruleofthumbisoneforeachIC,directlyoverthesupplypins,orascloseaspossible,andatleastoneextra.Ifyouareexperiencinghighfrequencynoise,youcouldalsoadda0.01uFtothemix.



Runningthesupplylineasyoudowith5V,youneedaverygoodconnection,withlargeenoughareaofthewire.

Apracticalthingtodo,istomaketheinputandtheoutputconnectorsforyour'bus'asclosetogetherasyoucanoneachPCB.Thiswillreducetheeffectofthenoisegeneratedon



othermodules,andthesizeofthe'loop'foryourpowerlines.

Iwouldpersonallyhaveatleasttwoleadsinyour'bus'fortheGNDconnection,tomakethegroundstiffer.

RegardingtheRCsnubbermentioned,youcanuseahighvoltagecapacitorinserieswithalowvalueresist



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or,like0.1uF/47ohm,overtherelaycontact.RemembertouseanX2ratedcapacitorswithhighenoughpeakvoltage.

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[SOLVED] 74LS74 D Flip Flop State Changing Automatically