Institute of Applied Microelectronics and Computer Engineering

College of Computer Science and Electrical Engineering, University of Rostock Slide 1

Spezielle Anwendungen des VLSI – Entwurfs

Applied VLSI design

Course and contest

Results of Phase 3

Andy Schellin

Institute of Applied Microelectronics and Computer Engineering

College of Computer Science and Electrical Engineering, University of Rostock Slide 2

Problems with last design

- 40-Bit ripple carry adder

- One universal csa-array-multiplier for all coefficients

- 24-Bit ripple carry adder

Institute of Applied Microelectronics and Computer Engineering

College of Computer Science and Electrical Engineering, University of Rostock Slide 3

Further design improvements

- Further optimization of coefficients

- Implementation of specific shift-multipliers for every coefficient

- Reduction of the bit width down to 9

Mandatory values for FGPA Before After

Frequency [MHz] 416.667 449.690

Area A [LUT-FF-Pairs] 990 75

# Pipeline Stages 8 2

Metric [kHz/LUT-FF-Pairs] 421 5996

Institute of Applied Microelectronics and Computer Engineering

College of Computer Science and Electrical Engineering, University of Rostock Slide 4

Library comparison

- Preset Values

- Supply Voltage: 1.0V

- Frequency: 1600MHz

LPHVT

LPSVT

Institute of Applied Microelectronics and Computer Engineering

College of Computer Science and Electrical Engineering, University of Rostock Slide 5

Iterative search for best metric

- Preset Values

- Supply Voltage: 1.0V

- Compile_ultra

Institute of Applied Microelectronics and Computer Engineering

College of Computer Science and Electrical Engineering, University of Rostock

Results

Mandatory values for ASICBackanno

tation

Frequency [MHz] 1700

Area 2720

Power [µW] 5615

# Pipeline Stages 2

Metric [MHz²/µW] 514

Slide 6

Institute of Applied Microelectronics and Computer Engineering

College of Computer Science and Electrical Engineering, University of Rostock

Thank you for your attention

Slide 7