TDA7293

120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY

VERY HIGH OPERATING VOLTAGE RANGE(50V)DMOS POWER STAGEHIGH OUTPUT POWER (100W @ THD =10%, RL = 8, VS = 40V)MUTING/STAND-BY FUNCTIONSNO SWITCH ON/OFF NOISEVERY LOW DISTORTIONVERY LOW NOISESHORT CIRCUIT PROTECTIONTHERMAL SHUTDOWNCLIP DETECTORMODULARITY (MORE DEVICES CAN BEEASILY CONNECTED IN PARALLEL TODRIVE VERY LOW IMPEDANCES)

DESCRIPTIONThe TDA7293 is a monolithic integrated circuit inMultiwatt15 package, intended for use as audioclass AB amplifier in Hi-Fi field applications(Home Stereo, self powered loudspeakers, Top-

class TV). Thanks to the wide voltage range andto the high out current capability it is able to sup-ply the highest power into both 4 and 8 loads.The built in muting function with turn on delaysimplifies the remote operation avoiding switchingon-off noises.Parallel mode is made possible by connectingmore device through of pin11. High output powercan be delivered to very low impedance loads, sooptimizing the thermal dissipation of the system.

July 1999

IN- 2R2

680C2

22F

C1 470nFIN+

R1 22K

3

R3 22K

-

+

MUTE

STBY

4

VMUTE

VSTBY

10

9

SGND

MUTE

STBY

R4 22K

THERMALSHUTDOWN

S/CPROTECTION

R5 10K

C3 10F C4 10F

1

STBY-GND

C522F

7 13

14

6

158-Vs -PWVs

BOOTSTRAP

OUT

+PWVs+Vs

C9 100nF C8 1000F

-VsD97AU805A

+VsC7 100nF C6 1000F

BUFFER DRIVER

11

BOOTLOADER12

5VCLIP

CLIP DET

(*)

(*) see Application note(**) for SLAVE function

(**)

Figure 1: Typical Application and Test Circuit

Multiwatt15ORDERING NUMBER: TDA7293V

MULTIPOWER BCD TECHNOLOGY

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ABSOLUTE MAXIMUM RATINGSSymbol Parameter Value Unit

VS Supply Voltage (No Signal) 60 VV1 VSTAND-BY GND Voltage Referred to -VS (pin 8) 90 VV2 Input Voltage (inverting) Referred to -VS 90 VV3 Input Voltage (non inverting) Referred to -VS 90 VV4 Signal GND Voltage Referred to -VS 90 VV5 Clip Detector Voltage Referred to -VS 120 VV6 Bootstrap Voltage Referred to -VS 120 VV9 Stand-by Voltage Referred to -VS 120 VV10 Mute Voltage Referred to -VS 120 VV11 Buffer Voltage Referred to -VS 120 VV12 Bootstrap Loader Voltage Referred to -VS 100 VIO Output Peak Current 10 A

Ptot Power Dissipation Tcase = 70C 50 WTop Operating Ambient Temperature Range 0 to 70 C

Tstg, Tj Storage and Junction Temperature 150 C

1

2

34

5

67

91011

8

BUFFER DRIVERMUTESTAND-BY-VS (SIGNAL)+VS (SIGNAL)BOOTSTRAPCLIP AND SHORT CIRCUIT DETECTORSIGNAL GROUNDNON INVERTING INPUTINVERTING INPUTSTAND-BY GND

TAB CONNECTED TO PIN 8

1314

15

12

-VS (POWER)OUT+VS (POWER)BOOTSTRAP LOADER

D97AU806

PIN CONNECTION (Top view)

QUICK REFERENCE DATASymbol Parameter Test Conditions Min. Typ. Max. Unit

VS Supply Voltage Operating 12 50 VGLOOP Closed Loop Gain 26 40 dB

PtotPower Dissipation VS = 45V; RL = 8; THD = 10% 140 W

VS = 30V; RL = 4; THD = 10% 110 WSVR Supply Voltage Rejection 75 dB

THERMAL DATA

Symbol Description Typ Max UnitRth j-case Thermal Resistance Junction-case 1 1.5 C/W

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ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = 40V, RL = 8, Rg = 50 ; Tamb = 25C, f = 1 kHz; unless otherwise specified.

Symbol Parameter Test Condition Min. Typ. Max. UnitVS Supply Range 12 50 VIq Quiescent Current 30 mAIb Input Bias Current 0.3 1 A

VOS Input Offset Voltage -10 10 mVIOS Input Offset Current 0.2 APO RMS Continuous Output Power d = 1%:

RL = 4; VS = 29V, 8080

W

d = 10% RL = 4 ; VS = 29V

100100

W

d Total Harmonic Distortion (**) PO = 5W; f = 1kHzPO = 0.1 to 50W; f = 20Hz to 15kHz

0.0050.1

%%

ISC Current Limiter Threshold 6.5 ASR Slew Rate 15 V/sGV Open Loop Voltage Gain 80 dBGV Closed Loop Voltage Gain (1) 30 dBeN Total Input Noise A = curve

f = 20Hz to 20kHz12 5

VV

Ri Input Resistance 100 kSVR Supply Voltage Rejection f = 100Hz; Vripple = 0.5Vrms 75 dBTS Thermal Protection DEVICE MUTED 150 C

DEVICE SHUT DOWN 160 CSTAND-BY FUNCTION (Ref: to pin 1)VST on Stand-by on Threshold 1.5 VVST off Stand-by off Threshold 3.5 V

ATTst-by Stand-by Attenuation 70 90 dBIq st-by Quiescent Current @ Stand-by 0.5 mA

MUTE FUNCTION (Ref: to pin 1)VMon Mute on Threshold 1.5 VVMoff Mute off Threshold 3.5 V

ATTmute Mute AttenuatIon 60 80 dBCLIP DETECTOR

IC Average Current ( pin 5) THD = 1% ; RL = 10K to 5V TBD mATHD = 10% ; RL = 10K to 5V

TBD mA

ICLEAK PO = 50W 1 ASLAVE FUNCTION pin 4 (Ref: to pin 8 -VS)VSlave SlaveThreshold 1 VVMaster Master Threshold 3 V

Note (1): GVmin 26dBNote: Pin 11 only for modular connection. Max external load 1M/10 pF, only for test purpose

Note (**): Tested with optimized Application Board (see fig. 2)

TDA7293

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Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)

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APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1)The recommended values of the external components are those shown on the application circuit of Fig-ure 1. Different values can be used; the following table can help the designer.

COMPONENTS SUGGESTED VALUE PURPOSE LARGER THANSUGGESTEDSMALLER THAN

SUGGESTED

R1 (*) 22k INPUT RESISTANCE INCREASE INPUTIMPEDANCE

DECREASE INPUTIMPEDANCE

R2 680 CLOSED LOOP GAINSET TO 30dB (**)

DECREASE OF GAIN INCREASE OF GAIN

R3 (*) 22k INCREASE OF GAIN DECREASE OF GAINR4 22k ST-BY TIME

CONSTANTLARGER ST-BYON/OFF TIME

SMALLER ST-BYON/OFF TIME;

POP NOISE

R5 10k MUTE TIMECONSTANT

LARGER MUTEON/OFF TIME

SMALLER MUTEON/OFF TIME

C1 0.47F INPUT DCDECOUPLING

HIGHER LOWFREQUENCY

CUTOFF

C2 22F FEEDBACK DCDECOUPLING

HIGHER LOWFREQUENCY

CUTOFF

C3 10F MUTE TIMECONSTANT

LARGER MUTEON/OFF TIME

SMALLER MUTEON/OFF TIME

C4 10F ST-BY TIMECONSTANT

LARGER ST-BYON/OFF TIME

SMALLER ST-BYON/OFF TIME;

POP NOISE

C5 22FXN (***) BOOTSTRAPPING SIGNALDEGRADATION ATLOW FREQUENCY

C6, C8 1000F SUPPLY VOLTAGEBYPASS

C7, C9 0.1F SUPPLY VOLTAGEBYPASS

DANGER OFOSCILLATION

(*) R1 = R3 for pop optimization(**) Closed Loop Gain has to be 26dB(***) Multiplay this value for the number of modular part connected

MASTER

UNDEFINED

SLAVE

-VS +3V

-VS +1V

-VSD98AU821

Slave function: pin 4 (Ref to pin 8 -VS) Note:If in the application, the speakers are connectedvia long wires, it is a good rule to add betweenthe output and GND, a Boucherot Cell, in order toavoid dangerous spurious oscillations when thespeakers terminal are shorted.The suggested Boucherot Resistor is 3.9/2Wand the capacitor is 1F.

TDA7293

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INTRODUCTIONIn consumer electronics, an increasing demandhas arisen for very high power monolithic audioamplifiers able to match, with a low cost, the per-formance obtained from the best discrete de-signs.The task of realizing this linear integrated circuitin conventional bipolar technology is made ex-tremely difficult by the occurence of 2nd break-down phoenomenon. It limits the safe operatingarea (SOA) of the power devices, and, as a con-sequence, the maximum attainable output power,especially in presence of highly reactive loads.Moreover, full exploitation of the SOA translatesinto a substantial increase in circuit and layoutcomplexity due to the need of sophisticated pro-tection circuits.To overcome these substantial drawbacks, theuse of power MOS devices, which are immunefrom secondary breakdown is highly desirable. The device described has therefore been devel-oped in a mixed bipolar-MOS high voltage tech-nology called BCDII 100/120.

1) Output StageThe main design task in developping a power op-erational amplifier, independently of the technol-ogy used, is that of realization of the output stage.The solution shown as a principle shematic byFig3 represents the DMOS unity - gain outputbuffer of the TDA7293.This large-signal, high-power buffer must be ca-pable of handling extremely high current and volt-age levels while maintaining acceptably low har-monic distortion and good behaviour over

frequency response; moreover, an accurate con-trol of quiescent current is required.A local linearizing feedback, provided by differen-tial amplifier A, is used to fullfil the above require-ments, allowing a simple and effective quiescentcurrent setting.Proper biasing of the power output transistorsalone is however not enough to guarantee the ab-sence of crossover distortion.While a linearization of the DC transfer charac-teristic of the stage is obtained, the dynamic be-haviour of the system must be taken into account.A significant aid in keeping the distortion contrib-uted by the final stage as low as possible is pro-vided by the compensation scheme, which ex-ploits the direct connection of the Miller capacitorat the amplifiers output to introduce a local ACfeedback path enclosing the output stage itself.

2) ProtectionsIn designing a power IC, particular attention mustbe reserved to the circuits devoted to protectionof the device from short circuit or overload condi-tions. Due to the absence of the 2nd breakdown phe-nomenon, the SOA of the power DMOS transis-tors is delimited only by a maximum dissipationcurve dependent on the duration of the appliedstimulus.In order to fully exploit the capabilities of thepower transistors, the protection scheme imple-mented in this device combines a conventionalSOA protection circuit with a novel local tempera-ture sensing technique which " dynamically" con-trols the maximum dissipation.

Figure 3: Principle Schematic of a DMOS unity-gain buffer.

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In addition to the overload protection describedabove, the device features a thermal shutdowncircuit which initially puts the device into a mutingstate (@ Tj = 150 oC) and then into stand-by (@Tj = 160 oC).Full protection against electrostatic discharges onevery pin is included.

3) Other Features The device is provided with both stand-by and

mute functions, independently driven by twoCMOS logic compatible input pins. The circuits dedicated to the switching on and offof the amplifier have been carefully optimized toavoid any kind of uncontrolled audible transient atthe output.The sequence that we recommend during theON/OFF transients is shown by Figure 4.The application of figure 5 shows the possibility ofusing only one command for both st-by and mutefunctions. On both the pins, the maximum appli-cable range corresponds to the operating supplyvoltage.

APPLICATION INFORMATIONHIGH-EFFICIENCYConstraints of implementing high power solutionsare the power dissipation and the size of thepower supply. These are both due to the low effi-ciency of conventional AB class amplifier ap-proaches.Here below (figure 6) is described a circuit pro-posal for a high efficiency amplifier which can beadopted for both HI-FI and CAR-RADIO applica-tions.

1N4148

10K 30K

20K

10F10F

MUTE STBY

D93AU014

MUTE/ST-BY

Figure 5: Single Signal ST-BY/MUTE ControlCircuit

PLAY

OFF

ST-BY

MUTE MUTE

ST-BY OFF

D98AU817

5V

5V

+Vs(V)+40

-40

VMUTEPIN #10

(V)

VST-BYPIN #9

(V)

-VsVIN(mV)

IQ(mA)

VOUT(V)

Figure 4: Turn ON/OFF Suggested Sequence

TDA7293

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The TDA7293 is a monolithic MOS power ampli-fier which can be operated at 100V supply voltage(120V with no signal applied) while delivering out-put currents up to 6.5 A.This allows the use of this device as a very highpower amplifier (up to 180W as peak power withT.H.D.=10 % and Rl = 4 Ohm); the only drawbackis the power dissipation, hardly manageable inthe above power range.The typical junction-to-case thermal resistance ofthe TDA7293 is 1 oC/W (max= 1.5 oC/W). Toavoid that, in worst case conditions, the chip tem-perature exceedes 150 oC, the thermal resistanceof the heatsink must be 0.038 oC/W (@ max am-bient temperature of 50 oC).As the above value is pratically unreachable; ahigh efficiency system is needed in those caseswhere the continuous RMS output power is higherthan 50-60 W.The TDA7293 was designed to work also inhigher efficiency way.For this reason there are four power supply pins:two intended for the signal part and two for thepower part.T1 and T2 are two power transistors that onlyoperate when the output power reaches a certainthreshold (e.g. 20 W). If the output power in-creases, these transistors are switched on duringthe portion of the signal where more output volt-age swing is needed, thus "bootstrapping" thepower supply pins (#13 and #15).The current generators formed by T4, T7, zenerdiodes Z1, Z2 and resistors R7,R8 define theminimum drop across the power MOS transistorsof the TDA7293. L1, L2, L3 and the snubbers C9,R1 and C10, R2 stabilize the loops formed by the"bootstrap" circuits and the output stage of theTDA7293.By considering again a maximum averageoutput power (music signal) of 20W, in caseof the high efficiency application, the thermalresistance value needed from the heatsink is2.2oC/W (Vs =50 V and Rl= 8 Ohm).All components (TDA7293 and power transis-tors T1 and T2) can be placed on a 1.5oC/Wheatsink, with the power darlingtons electricallyinsulated from the heatsink.Since the total power dissipation is less than thatof a usual class AB amplifier, additional cost sav-ings can be obtained while optimizing the powersupply, even with a high heatsink .

BRIDGE APPLICATIONAnother application suggestion is the BRIDGEconfiguration, where two TDA7293 are used.In this application, the value of the load must notbe lower than 8 Ohm for dissipation and currentcapability reasons.A suitable field of application includes HI-FI/TVsubwoofers realizations.

The main advantages offered by this solution are:- High power performances with limited supply voltage level.- Considerably high output power even with high load values (i.e. 16 Ohm).With Rl= 8 Ohm, Vs = 25V the maximum outputpower obtainable is 150 W, while with Rl=16Ohm, Vs = 40V the maximum Pout is 200 W.

APPLICATION NOTE: (ref. fig. 7)Modular Application (more Devices in Parallel)The use of the modular application lets very highpower be delivered to very low impedance loads.The modular application implies one device to actas a master and the others as slaves.The slave power stages are driven by the masterdevice and work in parallel all together, while theinput and the gain stages of the slave device aredisabled, the figure below shows the connectionsrequired to configure two devices to work to-gether.

The master chip connections are the same asthe normal single ones.The outputs can be connected together with-out the need of any ballast resistance.The slave SGND pin must be tied to the nega-tive supply.The slave ST-BY pin must be connected toST-BY pin.The bootstrap lines must be connected to-gether and the bootstrap capacitor must be in-creased: for N devices the boostrap capacitormust be 22F times N.The slave Mute and IN-pins must be grounded.

THE BOOTSTRAP CAPACITORFor compatibility purpose with the previous de-vices of the family, the boostrap capacitor can beconnected both between the bootstrap pin (6) andthe output pin (14) or between the boostrap pin(6) and the bootstrap loader pin (12).When the bootcap is connected between pin 6and 14, the maximum supply voltage in presenceof output signal is limited to 100V, due the boot-strap capacitor overvoltage.When the bootcap is connected between pins 6and 12 the maximum supply voltage extend to thefull voltage that the technology can stand: 120V.This is accomplished by the clamp introduced atthe bootstrap loader pin (12): this pin follows theoutput voltage up to 100V and remains clampedat 100V for higher output voltages. This featurelets the output voltage swing up to a gate-sourcevoltage from the positive supply (VS -3 to 6V)

TDA7293

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TDA7293

3

1

4

137

8 15

2

14

6

10

R3 680C11 22m F

L3 5m H

R18 270

R1613K

C1522m F

9

R1213K

C13 10m F

R13 20K

C12 330nF

R15 10K

C1410m F

R14 30KD5

1N4148

PLAY

ST-BY

R17 270

L1 1m H

T1BDX53A

T3BC394

D3 1N4148

R4270

R5270

T4BC393

T5BC393

R620K

R73.3K

C161.8nF

R83.3K

C171.8nF

Z2 3.9V

Z1 3.9V

L2 1m H

R19 270

D4 1N4148

D2 BYW98100

R12

R22

C9330nF

C10330nF

T2BDX54A T6

BC393

T7BC394

T8BC394

R9270

R10270

R1120K

OUT

INC7100nF

C51000m F

35V

C8100nF

C61000m F

35V

C11000m F

63V

C21000m F

63V

C3100nF

C4100nF

+50V

+25VD1 BYW98100

GND

-25V

-50VD97AU807C

12

D61N4001

R2020K

R2120K

D71N4001

R2210K

R2310K

Pot

Figure 6: High Efficiency Application Circuit

Figure 6a: PCB and Component Layout of the fig. 6

TDA7293

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IN- 2R2

680C2

22F

C1 470nFIN+

R1 22K

3

R3 22K

-

+

MUTE

STBY

4

10

9

SGND

MUTE

STBY

R4 22K

THERMALSHUTDOWN

S/CPROTECTION

R5 10K

C3 10F

C4 10F

1

STBY-GND

C547F

7 13

14

6

158-Vs -PWVs

BOOTSTRAP

OUT

+PWVs+Vs

C9 100nF C8 1000F

-Vs

D97AU808C

+VsC7 100nF C6 1000F

BUFFERDRIVER

11

BOOTLOADER12

IN- 2

IN+ 3

-

+

MUTESTBY

4

109

SGND

MUTE

THERMALSHUTDOWN

S/CPROTECTION

1

STBY-GND

7 13

14

6

158-Vs -PWVs

BOOTSTRAP

OUT

+PWVs+Vs

C9 100nF C8 1000F

-Vs

+VsC7 100nF C6 1000F

BUFFERDRIVER

11

BOOTLOADER12

5CLIP DET

5

MASTER

SLAVE

C10100nF

R72

VMUTE

VSTBY

STBY

Figure 7: Modular Application Circuit

Figure 6b: PCB - Solder Side of the fig. 6.

TDA7293

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Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE)

Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE)

TDA7293

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Multiwatt15 V

DIM. mm inchMIN. TYP. MAX. MIN. TYP. MAX.

A 5 0.197B 2.65 0.104C 1.6 0.063D 1 0.039E 0.49 0.55 0.019 0.022F 0.66 0.75 0.026 0.030G 1.02 1.27 1.52 0.040 0.050 0.060G1 17.53 17.78 18.03 0.690 0.700 0.710H1 19.6 0.772H2 20.2 0.795L 21.9 22.2 22.5 0.862 0.874 0.886L1 21.7 22.1 22.5 0.854 0.870 0.886L2 17.65 18.1 0.695 0.713L3 17.25 17.5 17.75 0.679 0.689 0.699L4 10.3 10.7 10.9 0.406 0.421 0.429L7 2.65 2.9 0.104 0.114M 4.25 4.55 4.85 0.167 0.179 0.191M1 4.63 5.08 5.53 0.182 0.200 0.218S 1.9 2.6 0.075 0.102S1 1.9 2.6 0.075 0.102

Dia1 3.65 3.85 0.144 0.152

OUTLINE ANDMECHANICAL DATA

TDA7293

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license isgranted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication aresubject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics productsare not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy All Rights Reserved

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