Technology Trend of Ultra-High Data Rate Wireless CMOS ... · Technology Trend of Ultra-High Data Rate Wireless CMOS Transceivers ... 1.8GHz, 4ch BPSK: 1.7 Gbps ... 4-stage CS-CS

2017.07.03

Technology Trend of Ultra-High Data Rate Wireless CMOS Transceivers

Akira Matsuzawa and Kenichi Okada

Tokyo Institute of Technology

1Contents• Demand for high speed data transfer• Developed high data-rate mm Wave transceivers

– ISSCC 2012: 10Gb/s 16QAM– ISSCC 2014: 28Gb/s 4ch 16QAM, 64 QAM– ISSCC 2016: 56Gb/s 68-102 GHz, 16QAM

• High data-rate circuit design– Widely flat frequency characteristics– Low phase noise QVCO

• Conquer the fmax limit of CMOS: 300 GHz Tx• Future prospect of high data-rate wireless systems• Summary

2017.07.03 AWAD A. Matsuzawa, Tokyo Tech.

2


Demand for high speed data transfer

3Progress of data rate in 60 GHz TRX


Developed by our group

Other groups

Dat

a ra

te [G

b/s

]

Published year2007 2008 2009 2010 2011 2012 2013 2014 2015 2016

30

20

10

0

40

50

60

Career frequency is L. T. 100 GHz

4Transfer time vs. Data capacity

2017.07.03

1 10 100 1000 10000

AudioCD

VisualDVD

Magazine

Tran

sfer

tim

e (s

ec)

0.01

0.1

1

10

100

1,000

10,000

0.001

200 Mbps

7 Gbps Millimeterwave

Currentwireless

Data capacity [M Byte]

20 Mbps

1Byte=8bit

Transfer time of big contents can be reduced by increasing the data-rate.Millimeter wave can realize several second transfer of movie film in DVD.

Book

AWAD A. Matsuzawa, Tokyo Tech.

5


Our developed high data-rate mm Wave transceivers

6

0

500

1000

1500

2000

2500

2010 2015 2020 2025 2030

fT

CMOS

GaAsInP

0

500

1000

1500

2000

2500

2010 2015 2020 2025 2030

fmax

CMOS

GaAsInP

Bulk CMOSUltra-Thin-Body Fully-Depleted (UTB FD) SOIMulti-Gate MOSFETs

High freq. operation of semiconductor devices

fT and fmax of CMOS are increased by technology scaling

cffG max

max sgmT

c RRgffNF

3.11min


7

2017.07.03

Ultra-high speed data transfer in 60GHz band

BW: 1.8GHz, 4ch

BPSK: 1.7 GbpsQPSK: 3.5 Gbps16QAM: 7 Gbps64QAM:10.5Gbps

I

Q16QAM

BWNDrate

Wider BW and high # of bits are required


860GHz CMOS transceiver attained 28Gbps

2017.07.03

PA

60GHzQILO

LNA

I Mixer

Q Mixer

LO buf.

RF amp.

I Mixer

Q Mixer

LO buf.60GHzQILO

20GHzPLL

TX Output

I Q

I Q

BB amp.

RX Input

RF amp.

controllogic

*K. Okada, , A. Matsuzawa., ISSCC 2014Direct conversion 60GHz CMOS transceiver


9Chip photo

2017.07.03

PAQ MIXER

I MIXER

LO BUF.

LO BUF.

Q.OSC.

Logic

PLL

LNAI MIXER& RF amp

LO BUF.

LO BUF.

Q.OSC.

RX

BB

outTX

out

RX

inTX BB in

4.2mm

AreaTX 1.03mm2

RX 1.25mm2

PLL 0.90mm2

Logic 0.67mm2

CMOS 65nm, 1Al+11CuTX: 186mWRX: 155mWPLL: 64mW

Q MIXER& RF amp

FUJITSU 65nm CMOS

TX: 186mWRX: 155mWPLL: 64mW


10Measured characteristics

2017.07.03

Channel/Carrier

freq. ch.1

58.32GHz ch.2

60.48GHz ch.3

62.64GHz ch.4

64.80GHz ch.1-ch.4

Channel bond

Modula- tion

64QAM 16QAM

Data rate* 10.56Gb/s 10.56Gb/s 10.56Gb/s 10.56Gb/s 28.16Gb/s

Constella-tion**

Spec- trum**

TX EVM** -27.1dB -27.5dB -28.0dB -28.8dB -20.0dB TX-to-RX EVM*** -24.6dB -23.9dB -24.4dB -26.3dB -17.2dB

-50-40-30-20-10

0

55.82 58.32 60.82-50-40-30-20-10

0

57.98 60.48 62.98-50-40-30-20-10

0

60.14 62.64 65.14-50-40-30-20-10

0

62.30 64.80 67.30-50-40-30-20-10

0

55.56 58.56 61.56 64.56 67.56

World's first 64QAM World’s fastest 28Gbps


11Chip with antenna in package

The 60GHz RF chip are mounted on the antenna in package


12Recent developed 60GHz transceiver set


Small size 60GHz transceiver set has been developed.It attains 6Gbps data transfer.

Smart phone

Gate

13Challenge for Frequency Interleave (FI)

fLO

fLO

28GH

z

3GH

z

fLO1

fLO2

fLO1 fLO2

3GH

z

16GH

z

Conventional

Relaxed BB design Higher SNR Many challenges

This work

3GH

z

16GH

z

ISSCC 2016, K. K. Tokgoz, K. Okada, A, Matsuzawa

14Die Photo of W-Band TRX

65nm CMOS

3mm

2mm

Tripler In34G

Hz

DoublerIn34G

Hz

RX HB Out RX LB OutRX In

TX HB In TX LB InTX Out


15Comparison Table

[4] K. Okada, et al., ISSCC2014 [5] S. Kang, et al., RFIC2014 [6] S.V. Thyagarajan, et al., RFIC2014[7] Y. Yang, et al., RFIC2014 [8] R. Wu, et al., ISSCC2016.13.62017.07.03 AWAD A. Matsuzawa, Tokyo Tech.

Our group

Reference [5, 6] [7] [4] [8] This work

Integration TX, RX TX, RX TX, RX TX, RX TX, RX

Frequency[GHz] 240 155 57-66 57-66 68-102

Data Rate 16Gb/s(QPSK)

20Gb/s(QPSK)

28.16Gb/s(16QAM)

42.2Gb/s(64QAM)

56Gb/s (16QAM)

TRX Architecture

TX: HeterodyneRX: Direct

Conversion

Hetero-dyne

Direct Conversion

DirectConversion+FrequencyInterleave

Heterodyne+FrequencyInterleave

Technology 65nm CMOS

45nm SOI

65nm CMOS

65nm CMOS

65nm CMOS

Power Cons. [mW]

TX: 220RX: 260

TRX: 345

TX: 251RX: 220

TX: 544RX: 432

TX: 260RX: 300

16


High data-rate circuit design

17High data rate techniques

2017.07.03

Shannon’s theory

NSBWDrate 1log2

Wider bandwidth and higher SNR are required to attain higher data rate

Wider bandwidth

Multi-cascaded amplifier

Frequency interleaving

Higher SNR7 bit ADC

Injection locked I/Q oscillator


Passive mixer circuit

18Effect of the gain flatness

2017.07.03

Poor gain flatness makes ISI (Inter Symbol Interference)due to different gain for plus frequency and minus frequency.


19Multi-cascaded RF amplifiers

2017.07.03

4-stage PA MIM TL

to antenna

MIM TLTL

4-stage CS-CS LNA

from antenna

W=1m x40 1m x40 2m x20 2m x20

ESD protection

Multi-cascaded RF amplifier can increase the gain flatnessdue to the distributed resonant frequencies.


20Mixer circuit in TX

2017.07.03

LO+

LO+

LO-

50

To PA BBinput

200

200

Matching

network

Rf

Rf

ZRF

ZRF

RSW

RSW

RSW

RSW

Zin

Zin

LORFSWin ZRZ

Re8//200)( 2

Passive mixer with resistive feedback RF amplifier can realizeWidely flat impedance, rather than LC impedance matching method.


21Measured gain of TX circuit

2017.07.03

05

1015202530

0.00 1.08 2.16 3.24 4.32

Gai

n [d

B]

Frequency [GHz]

The gain flatness of 2 dB is attained for the band width of 4 GHz.


22Required phase noise of IQ-VCO for 16QAM

0

1

2

3

4

5

-100 -98 -96 -94 -92 -90 -88 -86 -84

AM-AM of PA

16QAM8PSK

QPSKR

equi

red

CN

R [d

B]

Phase noise [dBc/Hz] @ 1MHz offset

0

1

2

3

4

5

-100 -98 -96 -94 -92 -90 -88 -86 -84

AM-AM of PA

16QAM8PSK

QPSKR

equi

red

CN

R [d

B]

Phase noise [dBc/Hz] @ 1MHz offset

A phase noise of LT. -90dBc/Hz@1MHz is required for 16QAM systems

K. Scheir, et al., ISSCC, pp. 494-495,Feb. 2009.

A reported phase noise of 60GHz IQ VCO is -76dBc/Hz @1MHz at most


23Q of inductors and capacitor

2017.07.03

Q of capacitor is rapidly degraded with frequency.Q of Less than 10 at 60 GHz at most.Low phase noise 60 GHz VCO is hard to be realized.

0

10

20

30

40

50

60

0.1 1 10 100

Q

Frequency [GHz]

8nH inductor2nH inductor

0.2nH inductor

switched capacitor

Qc < 10 @ 60GHz


24Injection locking technique

OutputINJP

INJN

Injectionsignal

N: Multiple number

t

t

parallel injection

)log(20INJILO NPNPN 9.5dB @ N=3

IIOSC

injoL Q

ff 2

Injection locking technique is a very important circuit techniquefor high frequency signal generation and frequency divider.Phase noise of the oscillator is mandated by the injection.

Phase noise

Locking frequency range


25Injection locked 60GHz I/Q VCO

2017.07.03

Developed the injection locked 60 GHz quadrature VCOThe 60 GHz quadrature VCO is injected by 20 GHz PLL

A. Musa, K. Okada, A. Matsuzawa., in A-SSCCDig. Tech. Papers, pp. 101–102, Nov. 2010.

XtalPLL

20GHzVCO

Injectionpulse

60GHz I

60GHz Q

60GHzIVCO

60GHzQVCO

MdBPNdBPN INJOSC log20)()(


26Low phase noise can be realized

A. Musa, K. Okada, A. Matsuzawa., in A-SSCCDig. Tech. Papers, pp. 101–102, Nov. 2010.

Quadrature injection locked 60GHz oscillator with 20GHz PLLLow phase noise of -96dBc/Hz @1MHz. Previous one is -76dBc/Hz@1MHz

58-63GHz, -96dBc/Hz-1MHz offsetBest phase noise is achieved.


27


Conquer the fmax limit of CMOS

300 GHz Tx

Prof. Fujishima’s group’s work of Hiroshima Univ.

28CMOS 300GHzTransmitter


K. Takano, et al., Hiroshima Univ., ISSCC 2017, S17.9

IF

IF

LO SquareMixer

Balun

RF300 GHz

10 GHz

10 GHz

48 GHz

Tripler

Quasi-SSBMixer

145 GHz3

2LOIF GHz10145

2LOIF

It is almost impossible to amplify the 300 GHz signal by CMOS technology.The 2nd step-up mixer is used and combine the signal in the balun.To increase the RF power. The image suppression is needed.

29Performance comparison


Comparable frequency with compound semiconductor devices.Over 100 Gbps has been attained.

K. Takano, et al., Hiroshima Univ., ISSCC 2017, S17.9

30


Future prospect of high data-rate wireless systems

31Calculations for data rate of TRX

2017.07.03

SNRBWDrate 1log2Shannon’s theory

3

)(3.0

log10 dBSNRBWSNRBWDrate

LOSSLARATOFFTXRX SIGGBPdBP )(

c

cLOSS df

cdfc

dS

4log20

4log20

4log20

NFBWdBmPn log10174)(

Received signal

Spatial loss

d: distancefc: career frequency

Noise

Calculate the data rate as function of career frequency and Tx power


3260GHz Link budget (QPSK)

2017.07.03

6dBm(Pout)-4dB(back-off)=2dBm

-80.6dBm=-174dBm(kT)+93.4dB(2.2GHz-BW)

-74.6dBm+6dB(NF)

-60.5dBm-3dB(loss)

CNR+14.0dB

Tx

Rx

-71.5dB(1.5m loss)+6dBi(Tx)+6dBi(Rx)

Required CNR: 9.8dB

Antenna gain：6dBi


Phase noisePA nonlinearityI/Q mismatchISI

Suppress

33Estimated data rate

2017.07.03

0

50

100

150

0 10 100 1000

Dat

a ra

te (G

bps)

Carrier frequency (GHz)

Pt=20dBm

Pt=10dBmPt=0dBm

BPSK

QPSK

16QAM

64QAM

Dashed line: consider the SNRSolid line: neglect the SNR

Distance：1mAntenna gain：6dBiNF: 6dBBack off： 4dBPower loss： 3dB


Higher data rate can be expected up to the certain frequency,however it is reduced after that frequency.Higher power is required to increase the data rate.

34Future direction

2017.07.03

High frequencyand high power Best, but very difficult !!

High frequencybut low power

High gainantenna

Low gainantenna

Sharp beam

Fixed point only !

Short distance only !

Medium frequencybut high power

Reasonable high data rate

Reasonable long distance

Future direction should be chosen by the usage model


35Summary


Documents

Technology Trend of Ultra-High Data Rate Wireless CMOS ... · Technology Trend of Ultra-High Data Rate Wireless CMOS Transceivers ... 1.8GHz, 4ch BPSK: 1.7 Gbps ... 4-stage CS-CS