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Giáo trình Vi điu khin Các hot động ca vi điu khin MCS-51 Phm Hùng Kim Khánh Trang 57 Chương 3: CÁC HOT ĐỘNG CA VI ĐIU KHIN MCS-51 Chương này gii thiu vcác hot động đặc trưng ca hvi điu khin MCS- 51: định thi, cng ni tiếp, ngt và các cách thc để điu khin các hot động này. 1. Hot động định thi (Timer / Counter) 1.1. Gii thiu AT89C51 có 2 bđịnh thi 16 bit có thhot động các chế độ khác nhau và có khnăng định thi hay đếm skin (Timer 0 và Timer 1). Khi hot động định thi (timer), bTimer / Counter snhn xung đếm tdao động ni còn khi đếm skin (counter), bTimer / Counter nhn xung đếm tbên ngoài. BTimer / Counter bên trong AT89C51 là các bđếm lên 8 bit hay 16 bit tutheo chế độ hot động. Mi bTimer / Counter có 4 chế độ hot động khác nhau và được dùng để: - Đếm skin ti các chân T0 (chân 14) hay T1 (chân 15). - Chmt khong thi gian. - To tc độ cho port ni tiếp. Quá trình điu khin hot động ca Timer / Counter được thc hin thông qua các thanh ghi sau: Bng 3.1 – Các thanh ghi điu khin hot động Timer / Counter Thanh ghi Địa chbyte Địa chbit TCON 88h 88h – 8Fh TMOD 89h Không TL0 90h Không TL1 91h Không TH0 92h Không TH1 93h Không Ngoài ra, trong h8x52 còn có thêm bđịnh thi th3 (Timer 2). 1.2. Hot động Timer / Counter Hot động cơ bn ca Timer / Counter gm có các thanh ghi timer THx và TLx (x = 0, 1) mc liên tng to thành dng thanh ghi 16 bit. Khi set bit TRx trong thanh ghi TCON (xem thêm phn 1.3), timer tương ng shot động và giá trtrong thanh ghi TLx tăng lên 1 sau mi xung đếm. Khi TLx tràn (thay đổi t255 0), giá trca THx tăng lên 1. Khi THx tràn, ctràn tương ng TFx (trong thanh ghi TCON) sđược đưa lên mc 1.

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Text of timer 8051

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 57

    Chng 3: CC HOT NG CA VI IU KHIN MCS-51

    Chng ny gii thiu v cc hot ng c trng ca h vi iu khin MCS-51: nh thi, cng ni tip, ngt v cc cch thc iu khin cc hot ng ny.

    1. Hot ng nh thi (Timer / Counter)

    1.1. Gii thiu AT89C51 c 2 b nh thi 16 bit c th hot ng cc ch khc nhau v

    c kh nng nh thi hay m s kin (Timer 0 v Timer 1). Khi hot ng nh thi (timer), b Timer / Counter s nhn xung m t dao ng ni cn khi m s kin (counter), b Timer / Counter nhn xung m t bn ngoi. B Timer / Counter bn trong AT89C51 l cc b m ln 8 bit hay 16 bit tu theo ch hot ng. Mi b Timer / Counter c 4 ch hot ng khc nhau v c dng :

    - m s kin ti cc chn T0 (chn 14) hay T1 (chn 15). - Ch mt khong thi gian. - To tc cho port ni tip.

    Qu trnh iu khin hot ng ca Timer / Counter c thc hin thng qua cc thanh ghi sau:

    Bng 3.1 Cc thanh ghi iu khin hot ng Timer / Counter

    Thanh ghi a ch byte a ch bit

    TCON 88h 88h 8Fh TMOD 89h Khng

    TL0 90h Khng TL1 91h Khng TH0 92h Khng TH1 93h Khng

    Ngoi ra, trong h 8x52 cn c thm b nh thi th 3 (Timer 2).

    1.2. Hot ng Timer / Counter Hot ng c bn ca Timer / Counter gm c cc thanh ghi timer THx v TLx

    (x = 0, 1) mc lin tng to thnh dng thanh ghi 16 bit. Khi set bit TRx trong thanh ghi TCON (xem thm phn 1.3), timer tng ng s hot ng v gi tr trong thanh ghi TLx tng ln 1 sau mi xung m. Khi TLx trn (thay i t 255 0), gi tr ca THx tng ln 1. Khi THx trn, c trn tng ng TFx (trong thanh ghi TCON) s c a ln mc 1.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 58

    Tu theo ni dung ca bit C/T (xem thm thanh ghi TMOD, phn 1.3), xung m c th ly t dao ng ni (C/T = 0) hay t cc chn Tx bn ngoi (C/T = 1). Lu rng phi xo bit TRx khi thay i ch hot ng ca Timer.

    Khi xung m ly t dao ng ni, tc m = fOSC/12 hay fOSC/2 trong ch X2(ngha l nu fOSC = 12 MHz th tc xung m l 1 MHz hay c 1 s th c 1 xung m trong ch d chun) hay tc m = fPER/6 (fPER: tn s xung ngoi vi peripheral clock).

    Khi ly xung m t bn ngoi (cc chn Tx),b m s tng ln 1 khi ng vo Tx mc 1 trong 1 chu k v xung mc 0 trong chu k k tip. Do , tn s xung ti a ti cc chn Tx l fOSC/24 trong ch thng hay fOSC/12 trong ch X2 (=fPER/12).

    1.3. Cc thanh ghi iu khin hot ng

    1.3.1. Thanh ghi iu khin timer (TCON Timer/Counter Control Register)

    TCON cha cc bit trng thi v cc bit iu khin cho Timer 1, Timer 0.

    Bng 3.2 Ni dung thanh ghi TCON

    TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

    Bit K

    hiu a ch

    M t

    TCON.7 TF1 8Fh C bo trn timer 1 (Timer 1 overflow Flag). c xo bi phn cng khi chuyn n chng trnh con x l ngt hay xo bng phn mm. t bng phn cng khi Timer 1 trn

    TCON.6 TR1 8Eh iu khin Timer 1 chy (Timer 1 Run Control Bit). Cho php Timer 1 hot ng (= 1) hay ngng (= 0).

    TCON.5 TF0 8Dh Timer 0 overflow Flag TCON.4 TR0 8Ch Timer 0 Run Control Bit TCON.3 IE1 8Bh

    Dng cho ngt ngoi 0 v 1 (s xt trong phn 3 x l ngt)

    TCON.2 IT1 8Ah TCON.1 IE0 89h TCON.0 IT0 88h

    Gi tr khi reset: TCON = 00h

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 59

    1.3.2. Thanh ghi ch timer (TMOD Timer/Counter Mode) Thanh ghi TMOD cha hai nhm 4 bit dng t ch lm vic cho Timer

    0, v Timer 1. Lu rng khi lp trnh cho AT89C51, thng thng thanh ghi TMOD ch c gn mt ln u chng trnh.

    Bng 3.3 Ni dung thanh ghi TMOD

    GATE1 C/T 1 M11 M01 GATE0 C/T 0 M10 M00

    Bit Tn Timer M t Timer 7 GATE1 1 Timer 1 Gating Control Bit

    GATE = 0: timer hot ng bnh thng GATE = 1: timer ch hot ng khi chn 1INT = 1

    Dng cho Timer 1

    6 C/T1 1 Timer 1 Timer/Counter Select Bit = 1: m bng xung ngoi ti chn T1 (chn 15) = 0: m bng xung dao ng bn trong

    5 M11 1 Timer 1 Mode Select Bit M11 M01 Ch 0 0 13 bit 0 1 8 bit t ng np li 1 0 16 bit 1 1 Khng dng Timer 1

    4 M01 1

    3 GATE0 0 Timer 0 Gating Control Bit

    Dng cho Timer 0

    2 C/T0 0 Timer 0 Timer/Counter Select Bit 1 M10 0 Timer 0 Mode Select Bit

    Cc ch ging nh timer 1 trong ch 3 dng TH0 v TL0 lm 2 gi tr m ca timer 0 v timer 1 (xem thm phn 1.4)

    0 M00 0

    Gi tr khi reset: TMOD = 00h

    Ngoi ra, Timer cn cc thanh ghi cha gi tr m: TH0, TL0 (Timer 0) v TH1, TL1 (Timer 1), mi thanh ghi c kch thc 8 bit. Gi tr cc thanh ghi ny khi reset cng l 00h.

    1.4. Cc ch hot ng Cc ch ca timer c xc nh bng 4 bit trong thanh ghi TMOD, trong

    4 bit thp iu khin timer 0 v 4 bit cao iu khin timer 1, m t nh sau:

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 60

    1.4.1. Ch 0 Ch 0 l ch 13 bit bao gm 8 bit ca thanh ghi THx v 5 bit ca thanh

    ghi TLx cn 3 bit cao ca thanh ghi TLx khng s dng. Mi ln c xung m, gi tr trong thanh ghi 13 bit tng ln 1. Khi gi tr ny thay i t 1 1111 1111 1111b n 0 th b m trn lm cho TFx c t ln mc 1.

    Do ch 0 s dng 13 bit nn gi tr m ti a l 213 = 8192. Ch ny c cung cp nhm mc ch to kh nng tng thch vi 8048 v thng khng c s dng hin nay.

    Hnh 3.1 Ch 0 ca Timer/Counter

    1.4.2. Ch 1 Ch 1 ging nh ch 0 nhng s dng 16 bit bao gm 8 bit ca THx v 8

    bit ca TLx nn gi tr m ti a l 216 = 65536. Nh vy, ch 0 v ch 1 ging nhau nhng ch khc s bit m nn thng thng ch 0 khng s dng m ch dng ch 1.

    Khi b m trn (gi tr trong cp thanh ghi THx_TLx thay i t 1111 1111 1111 1111b n 0), c trn TFx c set ln mc 1. Lu rng, khi timer trn, gi tr ca cc thanh ghi m l 0 (THx = 0 v TLx = 0) nn nu mun timer hot ng tip th phi np li gi tr cho cc thanh ghi THx v TLx.

    Hnh 3.2 Ch 1 ca Timer/Counter

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 61

    1.4.3. Ch 2 Ch 2 l ch 8 bit trong s dng thanh ghi TLx cha gi tr m

    cn thanh ghi THx cha gi tr np li (do ch ny c gi l ch t ng np li autoreload).

    Trong ch 2, mi khi gi tr trong thanh ghi TLx thay i t 1111 1111b n 0 th c TFx c set ln mc 1 ng thi gi tr trong thanh ghi THx c chuyn vo thanh ghi TLx. Nh vy, gi tr m trong TLx v THx ch c np mt ln khi khi ng timer (c th khng cn np cho TLx nhng khi chu k hot ng u tin ca timer s sai).

    Ch 2 s dng 8 bit m trong thanh ghi TLx nn gi tr m ti a l 28 = 256.

    Hnh 3.3 Ch 2 ca Timer/Counter

    1.4.4. Ch 3

    Hnh 3.4 Ch 3 ca Timer/Counter

    Ch 3 s dng cc thanh ghi TL0 v TH0 nh cc b nh thi c lp trong TL0 iu khin bng cc thanh ghi ca timer 0 v TH0 iu khin bng cc thanh ghi ca tmer 1. Khi TL0 chuyn t gi tr 1111 1111b n 0 th TF0 c t ln mc 1 cn TH0 chuyn t 1111 1111b n 0 th TF1 c t ln mc 1. Lu rng trong ch 3 (ch c trong Timer 0), Timer 1 khng tc ng n c TF1 nn thng c

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 62

    dng to tc baud cho port ni tip (xem thm phn 2 cng ni tip) hay dng cho mc ch khc.

    Ch ny ch cho php tc ng n c trn TF1 thng qua xung m ca dao ng ni m khng m bng dao ng ngoi ti chn T1 ng thi bit GATE1 (TMOD.7) khng tc ng n qu trnh m ti TH0.

    1.5. Timer 2 Timer 2 l b nh thi 16 bit (ch c trong h 8x52). Gi tr m ca timer 2

    cha trong cc thanh ghi TH2 v TL2. Ging nh timer 0 v timer1, timer 2 cng hot ng nh b nh thi (timer) hay m s kin (counter). Ch nh thi m bng dao ng ni, ch m s kin m bng xung ngoi ti chn T2 (P1.0) v chn ch bng bit C/T 2 ca thanh ghi T2CON. Cc thanh ghi iu khin timer 2 bao gm: T2CON, T2MOD, RCAP2H, RCAP2L, TH2 v TL2.

    Timer 2 c 3 ch hot ng: capture (gi), autoreload (t ng np li) v to tc baud (chn ch trong thanh ghi T2CON). Cc bit chn ch c m t nh bng 3.4.

    Bng 3.4 Chn ch trong Timer 2 RCLK TCLK CP/ RL 2 TR2 Ch

    0 0 0 1 T ng np li 16 bit 0 0 1 1 Gi 16 bit X 1 X 1 To tc baud 1 X X 1X X X 0 Ngng

    1.5.1. Cc thanh ghi iu khin Timer 2 Thanh ghi T2CON:

    Bng 3.5 Ni dung thanh ghi T2CON

    TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T 2 CP/ RL 2

    Bit Tn M t 7 TF2 Timer 2 overflow Flag

    TF2 khng c tc ng khi RCLK hay TCLK = 1. TF2 phi c xo bng phn mm v c t bng phn cng khi Timer trn

    6 EXF2 Timer 2 External Flag c t khi EXEN2 = 1 v xy ra ch np li hay gi do c cnh m ti chn T2EX (P1.1) (chuyn t 1 xung 0). Khi EXF2 = 1 v cho php ngt ti Timer 2 th chng trnh s chuyn n chng trnh phc v ngt ca Timer 2. EXF2 phi c xo bng phn mm

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 63

    5 RCLK Receive Clock Bit (ch dng cho port ni tip ch 1 v 3) RCLK = 0: dng timer 1 lm xung clock thu cho port ni tip RCLK = 1: dng timer 2 lm xung clock thu cho port ni tip

    4 TCLK Transmit Clock Bit Ging nh RCLK nhng dng cho xung clock pht

    3 EXEN2 Timer 2 External Enable Bit = 0: b qua tc ng ti chn T2EX (P1.1) = 1: xy ra ch np li hay gi do c cnh m ti chn T2EX (P1.1) (chuyn t 1 xung 0)

    2 TR2 Timer 2 Run Control Bit = 0: cm timer 2 = 1: chy timer 2

    1 C/T 2 Timer / Counter 2 Select Bit = 0: nh thi (m bng dao ng ni) = 1: m s kin (m bng xung ti T2 (P1.0))

    0 CP/ RL2

    Timer 2 Capture / Reload Bit Nu RCLK = 1 hay TCLK = 1: b qua Nu RCLK = 0 v TCLK = 0: chn ch gi ( = 1) hay np li (= 0) khi xut hin xung m ti T2EX (P1.1) v EXEN2 = 1

    Gi tr khi reset: T2CON = 00h, T2CON cho php nh v bit

    Thanh ghi T2MOD: Bng 3.6 Ni dung thanh ghi T2MOD

    - - - - - - T2OE DCEN

    Bit Tn M t 7 - 6 - 5 - 4 - 3 - 2 - 1 T2OE Timer 2 Output Enable Bit

    = 0: T2 (P1.0) l ng vo clock hay I/O port = 1: T2 l ng ra clock

    0 DCEN Down Counter Enable Bit = 0: cm timer 2 l b m ln / xung = 1: cho php timer 2 l b m ln / xung

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 64

    Gi tr khi reset: T2MOD = xxxx xx00b, MOD khng cho php nh v bit

    Cc thanh ghi TH2, TL2, RCAP2H v RCAP2L khng cho php nh v bit v gi tr khi reset l 00h. Cc ch hot ng ca Timer 2 m t trong phn sau.

    1.5.2. Ch capture

    Hnh 3.5 Ch gi ca Timer 2

    Ch gi ca Timer 2 c 2 trng hp xy ra:

    - Nu EXEN2 = 0: Timer 2 hot ng ging nh Timer 0 v 1, ngha l khi gi tr m trn (TH2_TL2 thay i t FFFFh n 0) th c trn TF2 c t ln mc 1 v to ngt ti Timer 2 (nu cho php ngt).

    - Nu EXEN2 = 1: vn hot ng nh trn nhng thm mt tnh cht na l: khi xut hin cnh m ti chn T2EX (P1.1), gi tr hin ti ca TH2 v TL2 c chuyn vo cp thanh ghi RCAP2H, RCAP2L (qu trnh gi (capture) xy ra); ng thi, bit EXF2 = 1 (s to ngt nu cho php ngt ti Timer 2).

    1.5.3. Ch t ng np li Ch t ng np li cng c 2 trng hp ging nh ch gi:

    - Nu EXEN2 = 0: khi Timer trn, c trn TF2 c t ln 1 v np li gi tr cho TH2, TL2 (t cp thanh ghi RCAP2H, RCAP2L) ng thi to ngt ti timer 2 nu cho php ngt.

    - Nu EXEN2 = 1: hot ng ging nh trn nhng khi c xung m ti chn T2EX th cng np li gi tr cho TH2, TL2 v t c EXF2 ln 1.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 65

    Ch t ng np li cng cho php thc hin m ln hay xung (iu khin bng bit DCEN trong thanh ghi T2MOD). Khi DCEN c t ln 1 v chn T2EX mc cao th timer 2 s m ln; cn nu T2EX mc thp th timer 2 m xung.

    Khi m ln, tmer trn ti gi tr m 0FFFFh. Khi trn, c TF2 c t ln mc 1 v gi tr trong cp thanh ghi RCAP2H, RCAP2L chuyn vo cp thanh ghi TH2, TL2.

    Khi m xung, timer trn khi gi tr trong cp thanh ghi TH2, TL2 bng gi tr trong cp thanh ghi RCAP2H, RCAP2L. Khi trn, c TF2 c t ln 1 v gi tr 0FFFFh c np vo cp thanh ghi TH2, TL2.

    Trong ch ny, khi timer trn, gi tr trong c EXF2 s chuyn mc v khng to ngt (c th dng thm EXF2 to gi tr m 17 bit).

    Hnh 3.6 Ch t ng np li

    1.5.4. Ch to xung clock Trong ch ny, timer to ra mt xung clock c chu k bn phn (duty cycle)

    50%. Khi timer trn, ni dung ca thanh ghi RCAP2H, RCAP2L c np vo cp thanh ghi TH2, TL2 v timer tip tc m. Tn s xung clock ti chn T2 c xc nh theo cng thc sau:

    =

    L2RCAPH2RCAP655362

    2xff

    2XOSC

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 66

    X2: bit nm trong thanh ghi CKCON. Trong ch X2: fOSC = fthch anh, ngc li th fOSC = fthch anh/2.

    timer 2 hot ng ch to xung clock, cn thc hin cc bc sau:

    - t bit T2OE trong thanh ghi T2MOD = 1.

    - Xo bit C/T 2 trong thanh ghi T2CON = 0 (do ch ny khng cho php m bng dao ng ngoi m ch m bng dao ng ni).

    - Xc nh gi tr ca cp thanh ghi RCAP2H v RCAP2L theo tn s xung clock cn to.

    - Khi ng gi tr cho cp thanh ghi TH2, TL2 (c th khng cn thit tu theo ng dng).

    - t bit TR2 trong thanh ghi T2CON = 1 cho php timer chy.

    Hnh 3.7 Ch to xung clock

    1.5.5. Ch to tc baud Khi cc bit TCLK v RCLK trong thanh ghi T2CON c t ln mc 1, timer

    2 s dng to tc baud cho cng ni tip. Ch ny cng hot ng nh timer 0 v timer 1 (s kho st c th ti phn 2 cng ni tip).

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 67

    1.6. Cc v d iu khin hot ng ca timer, cn thc hin:

    - Np gi tr cho thanh ghi TMOD xc nh ch hot ng (thng thng ch dng ch 1 16 bit v ch 2 8 bit t ng np li).

    - Np gi tr m trong cc thanh ghi THx, TLx (thng thng s dng timer 0 v timer 1 nn qu trnh m l m ln).

    - t cc bit TR0, TR1 = 1 (cho php timer hot ng) hay xo cc bit ny v 0 (cm timer).

    - Trong qu trnh timer chy, thc hin kim tra cc bit TF0, TF1 xc nh timer trn hay cha.

    - Sau khi timer trn, nu thc hin kim tra trn bng phn mm (khng dng ngt) th phi thc hin xo TF0 hay TF1 c th tip tc hot ng.

    V d 1: Vit chng trnh to sng vung tn s 10 KHz ti chn P1.0 dng timer 0 (tn s thch anh l fOSC = 12MHz).

    Gii

    Do fOSC = 12MHz nn chu k my = 1 s.

    f = 10 KHz T = 1/f = 0.1 ms = 100 s mt chu k sng vung chim khong thi gian 100 chu k my thi gian tr hon cn thit l 50 chu k my.

    Do gi tr m l 50 (ng vi 50 chu k my) nn ch cn dng ch 8 bit (c th m t 1 n 256) cho timer 0 (ch 2).

    - Ni dung thanh ghi TMOD:

    GATE1 C/T1 M11 M10 GATE0 C/T0 M01 M000 0 0 0 0 0 1 0

    Timer 1 khng dng Khng dng INT0

    m bng dao ng ni

    Ch 8 bit

    TMOD = 0000 0010b (02h)

    T = 100 chu k my

    Tr hon 50 chu k my

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 68

    - Gi tr m l 50 v do timer 0 m ln nn gi tr cn np cho TH0 l -50 (c th khng cn np cho TL0 nhng lc chu k u tin ca xung s sai).

    Chng trnh thc hin nh sau:

    MOV TMOD,#02h MOV TH0,#(-50) MOV TL0,#(-50) SETB TR0 ; Cho php timer 0 chy

    Lap: JNB TF0,Lap ; Nu Timer cha trn th ch CLR TF0 CPL P1.0 ; o bit P1.0 to xung vung SJMP Lap END

    V d 2: Vit chng trnh to xung vung tn s f = 1 KHz ti P1.1 dng timer 1(tn s thch anh l fOSC = 12MHz).

    Gii

    Do fOSC = 12MHz nn chu k my = 1 s.

    f = 1 KHz T = 1/f = 1 ms = 1000 s mt chu k sng vung chim khong thi gian 1000 chu k my thi gian tr hon cn thit l 500 chu k my.

    Gi tr m l 500 vt qu phm vi ca ch 8 bit nn phi s dng timer 1 ch 16 bit (ch 1). i vi ch 16 bit, do khng c gi tr np li nn mi khi timer trn, cn phi np li gi tr cho thanh ghi TH1 v TL1.

    - Ni dung thanh ghi TMOD:

    GATE1 C/T1 M11 M10 GATE0 C/T0 M01 M000 0 0 1 0 0 0 0

    Khng dng INT1

    m bng dao ng ni

    Ch 16 bit

    Timer 0 khng dng

    TMOD = 0001 0000b (10h)

    - Gi tr m l 500 nn gi tr cn np cho cp thanh ghi TH0_TL0 l -500 (dng cc lnh gi HIGH v LOW).

    Chng trnh thc hin nh sau:

    MOV TMOD,#10h Batdau:

    MOV TH1,#HIGH(-500) MOV TL1,#LOW(-500) SETB TR1 ; Cho php timer 1 chy

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 69

    Lap: JNB TF1,Lap ; Nu Timer cha trn th ch CLR TF1 CPL P1.1 ; o bit P1.1 to xung vung CLR TR1 SJMP Batdau ; Quay li np gi tr cho TH0_TL0 END V d 3: Vit chng trnh to xung vung tn s f = 10KHz ti P1.0 dng

    timer 0 v xung vung tn s f = 1 KHz ti P1.1 dng timer 1.

    Gii

    Phn tch cho cc thanh ghi ging nh phn v d 1 v 2 nhng lu rng qu trnh kim tra timer trn s khc: thc hin kim tra timer 0, nu cha trn th kim tra timer 1 v kim tra tng t cho timer 1.

    Chng trnh thc hin nh sau:

    MOV TMOD,#12h MOV TH1,#HIGH(-500) MOV TL1,#LOW(-500) MOV TH0,#(-50) MOV TL0,#(-50) SETB TR0 SETB TR1

    KtrT0: JNB TF0,KtrT1 CLR TF0 CPL P1.0

    KtrT1: JNB TF1,KtrT0

    CLR TF1 CPL P1.1 MOV TH1,#HIGH(-500) MOV TL1,#LOW(-500) SJMP KtrT0 END Lu rng, xung vung to bng cch nh trn c th khng chnh xc khi 2

    timer trn cng lc.

    V d 4: Vit chng trnh to xung vung tn s f = 1 Hz ti P1.2 dng timer1.

    Gii

    f = 1 Hz T = 1/f = 1 s = 1 000 000 s mt chu k sng vung chim khong thi gian 500 000 chu k my thi gian tr hon cn thit l 500 000 chu k my.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 70

    Gi tr m l 500 000, vt qu kh nng ca timer (ti a ch m c 65536 chu k) nn phi thc hin to vng lp m nhiu ln cho n khi t n gi tr 500 000 (c th m mi ln 50 000 v thc hin vng lp 10 ln).

    Chng trnh thc hin nh sau:

    MOV TMOD,#10h Batdau:

    MOV R7,#10 ; Lp 10 ln Lap:

    MOV TH1,#HIGH(-50000) MOV TL1,#LOW(-50000) SETB TR1

    KtrT1: JNB TF1,KtrT1

    CLR TF1 CLR TR0 DJNZ R7,Lap ; Nu R7 0 th lp li CPL P1.2 ; o bit to xung SJMP Batdau END

    V d 5: Vit chng trnh con to thi gian tr hon 1s dng timer 0.

    Gii

    Do chng trnh yu cu to thi gian tr hon nn s chu k m l 1 000 000.

    Chng trnh nh sau:

    MOV TMOD,#01h ;--- CHNG TRNH CHNH ;---

    Delay1s: MOV R7,#20 ; Lp 20 ln

    Lap: MOV TH0,#HIGH(-50000) ; Mi ln tr hon 50 000 s MOV TL0,#LOW(-50000) SETB TR0

    Lap1: JNB TF0,Lap1 CLR TF0 CLR TR0 DJNZ R7,Lap ; Lp 20 ln th thot RET

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 71

    Lu rng khi vit chng trnh tr hon nh trn th chng trnh ca AT89C51 xem nh dng li, khng lm g c (c th gii quyt bng cch s dng ngt xem thm phn 3).

    2. Cng ni tip (Serial port) Cng ni tip trong 89C51 c kh nng hot ng ch ng b v bt

    ng b dng 2 chn TxD (P3.1) v RxD (P3.0). Chc nng ca port ni tip l thc hin chuyn i song song sang ni tip i vi d liu xut, v chuyn i ni tip sang song song i vi d liu nhp.

    Khi hot ng ch truyn / nhn bt ng b (UART Universal Asynchronous Receiver / Transmitter), cng ni tip c 3 ch song cng (1, 2 v 3). Qu trnh c / ghi cng ni tip dng thanh ghi SBUF (Serial Buffer), thc cht l 2 thanh ghi khc nhau: mt thanh ghi truyn v mt thanh ghi nhn.

    Cng ni tip c tt c 4 ch khc nhau:

    Ch 0: d liu truyn / nhn thng qua chn RxD v xung clock dch bit thng qua TxD vi tc baud bng fthch anh/12.

    Ch 1: truyn / nhn 10 bit: 1 bit start (lun = 1), 8 bit d liu v 1 bit stop (lun = 0), tc baud c th thay i c v khi nhn, bit stop a vo RB8 ca thanh ghi SCON.

    Ch 2: truyn / nhn 11 bit: 1 bit start, 8 bit d liu, bit th 9 v 1 bit stop. Khi truyn, bit 9 l bit TB8 v khi nhn, bit 9 l bit RB8 trong thanh ghi SCON. Tc baud c nh l 1/32 hay 1/64 tn s thch anh.

    Ch 3: ging ch 2 nhng tc baud c th thay i c.

    Trong 4 ch trn, thng s dng ch 1 hay 3 truyn d liu. Trong trng hp truyn d liu gia cc vi iu khin AT89C51 vi nhau, c th dng ch 2. Ngoi ra, cng ni tip cn c cc ch nng cao: kim tra li khung v nhn dng a ch t ng.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 72

    2.1. Cc thanh ghi iu khin hot ng

    2.1.1. Thanh ghi SCON (Serial port controller) Bng 3.7 Ni dung thanh ghi SCON

    FE/SM0 SM1 SM2 REN TB8 RB8 TI RI

    Bit K hiu

    a ch

    M t

    SCON.7 FE

    9Fh

    Framing Error kim tra li khung c t ln 1 khi pht hin li ti bit stop v phi xo bng phn mm. Bit FE ch truy xut c khi bit SMOD0 = 1 (trong thanh ghi PCON).

    SM0 Serial port Mode bit 0 - Xc nh ch cho cng ni tip

    SCON.6 SM1 9Eh Serial port Mode bit 1 SM0 SM1 M t Tc baud

    0 0 Thanh ghi dch fOSC/12 0 1 UART 8 bit Thay i 1 0 UART 9 bit fOSC/32 hay fOSC/64 1 1 UART 9 bit Thay i

    SCON.5 SM2 9Dh Serial port Mode bit 2 Ch a x l = 0: bnh thng = 1: cho php truyn thng a x l trong ch 2 v 3

    SCON.4 REN 9Ch Reception Enable bit Cho php thu = 0: cm thu = 1: cho php thu ti cng ni tip

    SCON.3 TB8 9Bh Transmitter Bit Bit truyn th 9 trong ch 2 v 3

    SCON.2 RB8 9Ah Receiver Bit Bit nhn th 9 trong ch 2 v 3. Trong ch 1, nu SM2 = 0 th RB8 = stop bit.

    SCON.1 TI 99h Transmit Interrupt flag C ngt pht c t bng 1 khi kt thc qu trnh truyn v xo bng phn mm.

    SCON.0 RI 99h Receive Interrupt flag C ngt thu c t bng 1 khi nhn xong d liu v xo bng phn mm.

    Gi tr khi reset: 00h, cho php nh a ch bit

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 73

    2.1.2. Thanh ghi BDRCON (Baud Rate Control Register) Bng 3.8 Ni dung thanh ghi BDRCON

    - - - BRR TBCK RBCK SPD SRC

    Bit K hiu

    M t

    7 - 6 - 5 - 4 BRR Baud Rate Run control bit Cho php hot ng

    = 0: cm b to tc baud ni (internal baud rate generator) hot ng = 1: cho php

    3 TBCK Transmission Baud rate generator selection bit for UART Chn b to tc baud truyn l b to tc ni (= 1) hay bng timer (= 0)

    2 RBCK Reception Baud rate generator selection bit for UART Chn b to tc baud nhn l b to tc ni (= 1) hay bng timer (= 0)

    1 SPD Baud Rate Speed control bit for UART Chn tc baud l nhanh (= 1) hay chm (= 0)

    0 SRC Baud Rate Source select bit in Mode 0 for UART Chn tc baud trong ch 0 t dao ng thch anh (= 0) hay t b to tc baud ni (= 1)

    Gi tr khi reset: 00h, khng cho php nh a ch bit

    Ngoi ra cn c cc thanh ghi SBUF (Serial Buffer), BRL (Baud Rate Reload), SADEN (Slave Address Mark), SADDR (Slave Address).

    Lu rng cc thanh ghi BDRCON, BRL, SADEN v SADDR ch c trong cc phin bn mi ca MCS-51.

    2.2. To tc baud - Ch 0: tc baud c nh = 1/12 tn s thch anh.

    - Ch 2: tc baud = 1/32 tn s thch anh khi SMOD = 1 hay 1/64 khi SMOD = 0 (SMOD: nm trong thanh ghi PCON).

    - Ch 1 v 3: tc baud xc nh bng tc trn ca timer 1. Trong h 89x52, c th dng timer 2 to tc baud cn trong cc phin bn mi, c th dng b to tc ni (INT_BRG Internal Baud Rate Generator). Vic xc nh ngun to tc baud m t nh hnh 3.8 v bng 3.9.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 74

    Hnh 3.8 La chn tc baud

    Bng 3.9 La chn tc baud TCLK RCLK TBCK RBCK Clock pht Clock thu

    0 0 0 0 Timer 1 Timer 1 1 0 0 0 Timer 2 Timer 1 0 1 0 0 Timer 1 Timer 2 1 1 0 0 Timer 2 Timer 2 X 0 1 0 INT_BRG Timer 1 X 1 1 0 INT_BRG Timer 2 0 X 0 1 Timer 1 INT_BRG 1 X 0 1 Timer 2 INT_BRG X X 1 1 INT_BRG INT_BRG

    2.2.1. To tc baud bng Timer 1 Khi dng timer 1 to tc baud, thng thng cn thit lp timer 1 hot

    ng ch 8 bit t np li v gi tr np ban u ca timer 1 (cha trong thanh ghi TH1) ph thuc vo tc baud cn to theo cng thc sau:

    Gi tr np = rate_baud3212

    2f SMODOSC

    V d: Gi s tn s thch anh l fOSC = 11.0592 MHz, gi tr np khi to tc baud 4800 bps l:

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 75

    Nu SMOD = 0: gi tr np = 648003212

    2100592.11 06 = TH1 = -6 hay TH1

    = FAh

    Nu SMOD = 1: gi tr np = 1248003212

    2100592.11 16 = TH1 = -12 hay

    TH1 = F4h

    V d: Gi s tn s thch anh l fOSC = 12 MHz, gi tr np khi to tc baud 4800 bps l:

    Nu SMOD = 0: gi tr np = 51.648003212

    21012 06 = chn gi tr np l -6

    hay -7. Nu chn gi tr np = -6 th tc baud = 5208 bps cn nu chn -7 th tc baud l 4464 bps.

    Nu SMOD = 1: gi tr np = 02.1348003212

    2100592.11 16 = chn gi tr np

    l -13 tc baud l 4807 bps. Nh vy, khi dng tn s thch anh l 12 MHz th tc baud s c sai s ch dng khi kt ni nhiu vi iu khin MCS-51 vi nhau cn khi kt ni vi cc thit b khc (nh my tnh chng hn) th nn s dng tn s thch anh 11.0592 MHz.

    Cc gi tr np thng dng cho MCS-51 m t nh sau:

    Bng 3.10 Cc gi tr np thng dng Tc [bps] fOSC[MHz] SMOD Gi tr np Tc thc [bps] Sai s

    1200 11.059 0 -12 1200 0 4800 11.059 0 -6 4800 0 9600 11.059 0 -3 9600 0 1200 11.059 1 -24 1200 0 19200 11.059 1 -3 19200 0 1200 12 0 -26 1201.9 2.17%2400 12 0 -13 2403.8 0.16%4800 12 0 -6 5208.3 8.5% 9600 12 0 -3 10416.7 8.5%

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 76

    2.2.2. To tc baud bng Timer 2

    Hnh 3.9 To tc baud bng timer 2

    Timer 2 c dng to tc baud khi t cc bit TCLK, RCLK ln 1 (trong thanh ghi T2CON). Cng thc lin quan gia tc baud v gi tr np nh sau (lu rng gi tr np cha trong cp thanh ghi RCAP2H_RCAP2L):

    Gi tr np = rate_baud162

    f OSC

    Khi dng Timer 2 to tc baud, xung clock thu v pht c th tch ring bng cch ch dng TCLK hay RCLK. Lc , xung clock cn li c xc nh theo Timer 1. Ngoi ra, cng c th to ngt cho Timer 2 bng cch t bit EXEN2 = 1 v ngt to ra khi xut hin cnh m ti chn T2EX.

    V d: Gi s tn s thch anh l fOSC = 11.0592 MHz, gi tr np khi to tc baud 4800 bps l:

    Gi tr np = 724800162

    100592.11 6 = FFB8h

    RCAP2H = FFh, RCAP2L = B8h

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 77

    2.2.3. B to tc baud ni (INT_BRG Internal Baud Rate Generator)

    Hnh 3.10 B to tc baud ni

    Gi tr np trong b to tc ni cha trong thanh ghi BRL v c xc nh theo cng thc sau:

    Gi tr np = rate_baud6322

    2fSPD1

    1SMODOSC

    Trong SMOD1 nm trong thanh ghi PCON v SPD nm trong thanh ghi BDRCON.

    2.3. Truyn thng a x l Ch 2 v 3 ca MCS-51 cho php thc hin kt ni nhiu vi iu khin

    ch master slave. M hnh thc hin ca qu trnh truyn thng m t nh hnh v sau:

    Hnh 3.11 Truyn thng a x l

    Qu trnh truyn d liu m t nh sau:

    - Khi khi ng, cc vi iu khin slave c bit SM2 = 1 (trong thanh ghi SCON) v hot ng ch UART 9 bit. Nh vy, slave ch nhn c d liu khi bit truyn th 9 (TB8 ca master) l 1.

    Master Slave 1

    Slave 2

    Slave 5

    Slave 4

    Slave 3

    RxD TxD RxD TxD RxD TxD

    RxD TxD RxD TxD RxD TxD

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 78

    - Mi slave c gn trc mt a ch. Khi cn trao i thng tin vi slave no, master s gi d liu 9 bit gm 8 bit a ch ca slave v bit 9 = 1. D liu ny s c tt c cc slave nhn v (do bit 9 = 1). Chng trnh trong slave s kim tra gi tr a ch tng ng, nu trng vi a ch ci t sn th o bit SM2 (= 0), nu khc th b qua.

    - Tip tc, master s gi d liu n slave nhng lc ny bit 9 = 0. Khi , ch c slave no c bit SM2 = 0 mi nhn c d liu.

    - Sau khi truyn xong d liu, master gi li 8 bit a ch v bit 9 = 1. Slave nhn c s o bit SM2 ln na khi phc trng thi ban u.

    Nh vy, trong qu trnh truyn thng a x l, c 2 loi thng tin gi: byte a ch nu bit 9 = 1 v byte d liu nu bit 9 = 0.

    2.4. Nhn dng a ch t ng Trong cc phin bn mi ca MCS-51, a ch ca cc slave c th nhn dng

    bng cc thanh ghi SADDR v thanh ghi mt n SADEN (cc bit khng quan tm trong thanh ghi a ch SADDR s tng ng vi cc bit 0 trong thanh ghi SADEN).

    Xt h thng c 1 master v 3 slave:

    Slave 1: SADDR = 1111 0001b, SADEN = 1111 1010b

    Slave 2: SADDR = 1111 0011b, SADEN = 1111 1001b

    Slave 3: SADDR = 1111 0001b, SADEN = 1111 1010b

    1111 0001b

    1111 1010b

    1111 0x0xb

    1111 0011b

    1111 1001b

    1111 0xx1b

    1111 1011b

    1111 0101b

    1111 x0x1b

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 79

    Nu ch cn gi d liu cho slave 1, a ch cn s dng c bit 0 = 0 (do a ch ca slave 2 v slave 3 c bit 0 = 1 cn a ch ca slave 1 c bit 0 tu ), gi s l 1111 0000b.

    Nu cn gi cho slave 2 v slave 3 m khng gi cho slave 1 th a ch cn dng c bit 1 = 1 (do a ch ca slave 1 c bit 1 = 0 cn slave 2 v 3 th tu ), gi s nh 1111 0011b.

    a ch broadcast a ch broadcast to thnh t php ton OR gia cc thanh ghi SADDR v

    SADEN trong cc bit 0 xc nh l cc bit khng quan tm.

    Gi s SADDR = 0101 0000b v SADEN = 1111 1101b th

    a ch broadcast l 1111 11x1b.

    2.5. Kim tra li khung Ch kim tra li khung ch c trong cc ch 1, 2 v 3 c thc hin

    bng cch t bit SMOD0 ln 1 (trong thanh ghi PCON). Khi SMOD0 = 1, b thu s kim tra bit stop mi khi c d liu n. Nu bit stop khng hp l, bit FE s c t ln 1 (trong thanh ghi SCON).

    Phn mm sau khi c byte d liu s kim tra bit FE xc nh c li ng truyn hay khng. Lu rng bit FE ch xo bng phn mm hay khi reset h thng m khng b xo khi nhn bit stop hp l.

    2.6. Cc v d iu khin hot ng ca cng ni tip, cn thc hin cc bc sau:

    - Khi ng gi tr ca thanh ghi SCON xc nh ch hot ng.

    - Chn b to tc baud (mc nh l timer 1) v xc nh cc thng s cn thit theo tc baud yu cu.

    - Kim tra cc bit TI v RI xc nh cho php truyn hay nhn d liu khng.

    - Nu cn truyn d liu th kim tra TI v chuyn ni dung truyn vo thanh ghi SBUF.

    0101 0000b

    OR 1111 1101b

    1111 1101b

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 80

    - Nu cn nhn d liu th kim tra RI v c ni dung t SBUF vo thanh ghi A.

    V d 1: Khi ng cng ni tip ch UART 8 bit vi tc baud 9600 bps, dng timer 1 l b to tc baud (gi s tn s thch anh l 11.0592 MHz).

    Gii

    - Ni dung thanh ghi SCON:

    SM0 SM1 SM2 REN TB8 RB8 TI RI0 1 0 1 0 0 1 0

    UART 8 bit

    Khng ch a x l

    Cho php thu

    Cho php truyn

    SCON = 0101 0010b (52h)

    - Ni dung thanh ghi TMOD:

    GATE1 C/T1 M11 M10 GATE0 C/T0 M01 M000 0 1 0 0 0 0 0

    Khng dng INT1

    m bng dao ng ni

    Ch 8 bit

    Timer 0 khng dng

    TMOD = 0010 0000b (20h)

    - Gi tr m (theo bng 3.10): TH1 = -3

    on chng trnh khi ng nh sau:

    MOV SCON,#52h MOV TMOD, #20h MOV TH1,#-3 SETB TR1

    V d 2: Vit chng trnh xut lin tc cc k t t A n Z ra cng ni tip vi tc baud 4800 bps (gi s tn s thch anh l 11.0592 MHz).

    Gii

    Tc = 4800 bps gi tr m: TH1 = -6 Chng trnh thc hin nh sau:

    MOV SCON,#52h MOV TMOD,#20h MOV TH1,#-6 SETB TR1

    Batdau: MOV A,#A

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 81

    Truyen: JNB TI,$ ; Nu cha cho php truyn th ch CLR TI ; Xo TI khng cho php truyn, sau khi ; truyn xong th mi c th truyn tip MOV SBUF,A ; Truyn d liu INC A ; Qua k t k CJNE A,#Z+1,Truyen; Nu truyn xong t A SJMP Batdau ; n Z th lp li qu trnh

    V d 3: Vit chng trnh nhn k t t cng ni tip vi tc baud 19200bps (gi s tn s thch anh l 11.0592 MHz).

    Gii

    Tc = 1900 bps gi tr m: TH1 = -3 v SMOD = 1 Chng trnh thc hin nh sau:

    MOV SCON,#52h MOV TMOD,#20h MOV A,PCON ; Gn bit SMOD = 1 (do PCON khng cho SETB ACC.7 ; php nh a ch bit nn phi thc MOV PCON,A ; hin thng qua thanh ghi A) MOV TH1,#-3 SETB TR1

    Nhan: JNB RI,$ ; Nu cha c k t n th ch CLR RI ; Xo RI khng cho php nhn, sau khi ; c k t tip theo th mi nhn MOV A,SBUF ; Nhn d liu SJMP Nhan

    Lu rng, i vi cc v d trn, khi truyn hay nhn d liu th MCS-51 phi ch, khng c thc hin cng vic khc. Vn ny c th gii quyt bng cch s dng ngt (xem thm phn 3).

    3. Ngt (Interrupt) Ngt l qu trnh dng chng trnh ang thc thi phc v cho mt chng

    trnh khc khi xy ra mt s kin. Chng trnh x l s kin ngt gi l chng trnh phc v ngt (ISR Interrupt Service Routine).

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 82

    H MCS-51 c tng cng 5 ngun ngt khc nhau (khng k reset cng c th xem nh l mt ngt): ngt ngoi 0, 1 (ti cc chn INT0, INT1), timer 0, 1 (khi timer tng ng trn), cng ni tip (khi c k t n hay khi truyn k t i). i vi h 89x52 s c thm ngt timer 2.

    3.1. Cc thanh ghi iu khin hot ng

    3.1.1. Thanh ghi IE (Interrupt Enable) Bng 3.11 Ni dung thanh ghi IE

    EA - ET2 ES ET1 EX1 ET0 EX0

    Bit K hiu a ch M t IE.7 EA AFh Enable All

    Cm tt c (= 0) hay cho php ngt IE.6 - IE.5 ET2 ADh Enable Timer 2

    Cho php ngt ti timer 2 (= 1) IE.4 ES ACh Enable serial port

    Cho php ngt ti cng ni tip (= 1) IE.3 ET1 ABh Enable Timer 1

    Cho php ngt ti timer 1 (= 1) IE.2 EX1 AAh Enable External interrupt 1

    Cho php ngt ti ngt ngoi 1 (= 1) IE.1 ET0 A9h Enable Timer 0

    Cho php ngt ti timer 0 (= 1) IE.0 EX0 A8h Enable External interrupt 0

    Cho php ngt ti ngt ngoi 0 (= 1) Gi tr khi reset: 00h, cho php nh a ch bit

    Thanh ghi IE cho php mt ngt c xy ra hay cm ngt ( cho php cn dng 2 bit: bit EA = 1 v bit cho php tng ng tng ngt).

    3.1.2. Thanh ghi IP (Interrupt Priority) Bng 3.12 Ni dung thanh ghi IP

    - - PT2 PS PT1 PX1 PT0 PX0

    Bit K hiu a ch M t IP.7 - IP.6 - IP.5 PT2 BDh Chn mc u tin cao (= 1) hay thp (= 0) ti timer 2 IP.4 PS BCh Chn mc u tin cao (= 1) hay thp (= 0) ti cng ni tip

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 83

    IP.3 PT1 BBh Chn mc u tin cao (= 1) hay thp (= 0) ti timer 1 IP.2 PX1 BAh Chn mc u tin cao (= 1) hay thp (= 0) ti ngt ngoi 1 IP.1 PT0 B9h Chn mc u tin cao (= 1) hay thp (= 0) ti timer 0 IP.0 PX0 B8h Chn mc u tin cao (= 1) hay thp (= 0) ti ngt ngoi 0 Gi tr khi reset: 00h, cho php nh a ch bit

    Thanh ghi IP cho php chn mc u tin cho cc ngt. H MCS-51 c 2 mc u tin: mc cao v mc thp. Qu trnh x l u tin ngt m t nh sau:

    - Nu 2 ngt xy ra ng thi th ngt no c mc u tin cao hn s c phc v trc.

    - Nu 2 ngt xy ra ng thi c cng mc u tin th th t u tin thc hin t cao n thp nh sau: ngt ngoi 0 timer 0 ngt ngoi 1 timer 1 cng ni tip timer 2.

    - Nu ISR ca mt ngt c mc u tin thp ang chy m c ngt khc xy ra vi mc u tin cao th ISR ny s tm dng chy ISR c mc u tin cao (cng c ngha l khng th dng ISR c mc u tin cao).

    3.1.3. Thanh ghi TCON (Timer/Counter Control) Bng 3.13 Ni dung thanh ghi TCON

    TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

    Bit K

    hiu a ch

    M t

    TCON.7 TF1 8Fh

    Xem phn timer TCON.6 TR1 8Eh TCON.5 TF0 8Dh TCON.4 TR0 8Ch TCON.3 IE1 8Bh C ngt ngoi 1

    t bng 1 khi pht hin tc ng ngt ti INT1 Xo bng phn mm hay bng phn cng khi chuyn iu khin n ISR

    TCON.2 IT1 8Ah Interrupt 1 Type control bit = 0: ngt ngoi 1 c tc ng bng mc logic 0 = 1: ngt ngoi 1 c tc ng bng cnh m

    TCON.1 IE0 89h Dng cho ngt ngoi 0 TCON.0 IT0 88h

    Gi tr khi reset: TCON = 00h

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 84

    3.2. X l ngt kim tra khi no ngt xy ra, cc c ngt c ly mu thi gian S5P2

    ca mi chu k my. Cc iu kin ngt c hi vng cho n chu k my k tip xc nh xem c ngt xy ra hay khng. Khi c iu kin ngt, h thng ngt s to ra lnh LCALL gi ISR tng ng nhng lnh ny s khng c thc hin khi tn ti mt trong cc iu kin sau:

    - C mt ngt c mc u tin bng hay cao hn ang c phc v. - Chu k hi vng hin ti khng phi l chu k cui ca mt lnh. - ang thc thi lnh RETI hay bt k lnh no c nh hng n thanh ghi

    IE v IP.

    Khi c ngt xy ra, cc thao tc thc hin ln lt l:

    - Hon tt lnh hin hnh. - Ct ni dung ca thanh ghi PC vo stack. - Lu trng thi ca ngt hin hnh. - a vo thanh ghi PC a ch ca ISR tng ng.

    Sau khi thc hin xong ISR (kt thc bng lnh RETI), thc hin qu trnh: khi phc trng thi ban u ca ngt v ly a ch t stack a vo PC.

    Bng vector ngt Khi xy ra ngt, thanh ghi PC s c np gi tr tng ng vi cc ngt. Cc

    gi tr ny c gi l vector ngt, m t nh sau:

    Bng 3.14 Bng vector ngt Nguyn nhn ngt a chReset 0000h Ngt ngoi 0 0003h Timer 0 000Bh Ngt ngoi 1 0013h Timer 1 001Bh Cng ni tip 0023h Timer 2 002Bh

    Trong cc nguyn nhn ny, reset c th c xem nh mt ngt c vector ngt l 0000h nhng cch x l khi reset khng ging nh ngt: khi ng tt c cc thanh ghi v gi tr mc nh v khng lu ni dung ca PC vo stack.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 85

    Theo bng vector ngt, ISR ca ngt ngoi 0 nm t a ch 0003h n 000Ah (chim tng cng 8 byte) nn khi s dng ISR c kch thc thp hn 9 byte th c th dng trc tip ti a ch 0003h (xem thm phn sau). Tuy nhin, nu kch thc ISR ln hn th phi dng cc lnh nhy ti cc vector ngt. Khi chng trnh s c cu trc nh sau (tn ca cc ISR c th thay i):

    ORG 0000h LJMP main ORG 0003h LJMP Int0_ISR ORG 000Bh LJMP Timer0_ISR ORG 0013h LJMP Int1_ISR ORG 001Bh LJMP Timer1_ISR ORG 0023h LJMP Serial_ISR

    Main:

    Int0_ISR:

    RETI Timer0_ISR:

    RETI Int1_ISR:

    RETI Timer1_ISR:

    RETI Serial_ISR:

    RETI END

    Lu rng nu khng s dng ngt no th khng cn phi khai bo ISR cho ngt .

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 86

    3.3. Ngt do b nh thi MCS-51 c 2 ngun ngt t timer: timer 0 v timer 1 (i vi h 89x52 cn c

    thm timer 2). Khi timer hot ng ch ngt, chng trnh vn hot ng bnh thng cho n khi timer trn th mi chuyn n v tr ca ISR (trong khi , khi timer hot ng khng s dng ngt th chng trnh s dng li xem thm phn v d trong hot ng nh thi).

    Cc ngun ngt ny cho php hay cm bng cc bit trong thanh ghi IE: EA, ET0, ET1 v chn ch u tin bng cc bit trong thanh ghi IP: PT0, PT1. Khi timer trn, c TFx s chuyn ln mc 1. H thng ngt khi pht hin c TFx ln 1 s chuyn n ISR tng ng v t ng xo c TFx.

    Qu trnh iu khin hot ng bng b nh thi c s dng ngt thc hin nh sau:

    - Xc nh ch hot ng ca b nh thi.

    - Np gi tr cho cc thanh ghi THx, TLx.

    - Cho php ngt ti cc b nh thi tng ng (thanh ghi IE).

    - Xc nh mc u tin (thanh ghi IP).

    - Cho php timer chy bng cc bit TRx.

    - Vit ISR cho timer tng ng.

    V d 1: Vit chng trnh to sng vung tn s f = 5 KHz ti P1.0 dng ngt timer 1 (gi s tn s thch anh l 12 MHz).

    Gii

    f = 5 KHz T = 200 s (200 chu k) thi gian tr hon: 100 chu k Gi tr m = 100 dng ch 8 bit TMOD = 0010 0000b (20h)

    - Ni dung thanh ghi IE:

    EA - ET2 ES ET1 EX1 ET0 EX01 0 0 0 1 0 0 0

    IE = 1000 1000b (88h)

    Chng trnh thc hin nh sau:

    ORG 0000h

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 87

    LJMP main ORG 001Bh CPL P1.0 ; o bit RETI ; tr v chng trnh chnh t ISR

    Main: MOV TMOD,#20h MOV IE,#88h ; C th thay th bng 2 lnh sau: ; SETB EA ; SETB ET1 MOV TH1,#(-100) MOV TL1,#(-100) SETB TR1 SJMP $ ; Lp ti ch, ngha l chng trnh ; khng lm g c, ch timer trn (cc ; ng dng thc t c th x l cc ; cng vic khc) END

    Lu rng lnh CPL P1.0 chim 2 byte, lnh RETI chim 1 byte, tng cng ISR cho timer 1 l 3 byte khng vt qu 8 byte nn c th t trc tip ti a ch 001Bh.

    V d 2: Vit chng trnh to xung vung tn s f = 10KHz ti P1.0 dng ngt timer 0 v xung vung tn s f = 1 KHz ti P1.1 dng ngt timer 1.

    Gii

    Gi tr m cho timer 0: 50.

    Gi tr m cho timer 1: 500.

    timer 0: 8 bit, timer 1: 16 bit TMOD = 0001 0010b (12h)

    - Ni dung thanh ghi IE:

    EA - ET2 ES ET1 EX1 ET0 EX01 0 0 0 1 0 1 0

    IE = 1000 1010b (8Ah)

    Chng trnh thc hin nh sau:

    ORG 0000h LJMP main

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 88

    ORG 000Bh CPL P1.0 RETI ORG 001Bh MOV TH1,#HIGH(-500) ; 2 byte MOV TL1,#LOW(-500) ; 2 byte CPL P1.1 ; 2 byte RETI ; 1 byte

    Main: MOV TMOD,#12h MOV IE,#8Ah SETB TR0 SETB TR1 MOV TH1,#HIGH(-500) MOV TL1,#LOW(-500) MOV TH0,#(-50) MOV TL0,#(-50) SJMP $ END

    Trong v d ny, do timer 1 hot ng ch 16 bit nn mi ln timer trn phi thc hin np li gi tr cho timer 1.

    V d 3: Vit chng trnh dng ngt timer 0 sao cho c 1s th tng ni dung ca cc nh 30h, 31h, 32h theo quy lut ng h (30h cha gi, 31h cha pht, 32h cha giy).

    Gii

    Yu cu chng trnh tr hon l 1s trong khi timer 0 cho php tr hon ti a l 65536 s chn gi tr m l 50000 v thc hin lp li 20 ln (20 x 50000 = 1000000 s = 1s).

    TMOD = 0000 0001b (01h)

    IE = 1000 0010b (82h)

    Chng trnh thc hin nh sau:

    Hour EQU 30h ; nh ngha trc cc nh Minute EQU 31h Second EQU 32h ORG 0000h LJMP main

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 89

    ORG 0003h LJMP Timer0_ISR

    Main: MOV TMOD,#01h MOV IE,#82h MOV TH0,#HIGH(-50000) MOV TL0,#LOW(-50000) MOV R7,#20 ; Lp 20 ln SETB TR0 SJMP $

    Timer0_ISR: MOV TH0,#HIGH(-50000) MOV TL0,#LOW(-50000) DJNZ R7,exitTimer0 ; Nu cha 20 ln th thot CALL Inc_clock ; Tng theo quy lut ng h MOV R7,#20

    exitTimer0: RETI

    Inc_clock: INC Second ; Tng giy MOV A,Second CJNE A,#60,exitInc ; Nu giy < 60 th thot MOV Second,#0 ; Ngc li th gn giy = 0 INC Minute ; v tng pht MOV A,Minute CJNE A,#60,exitInc ; Nu pht < 60 thi thot MOV Minute,#0 ; Ngc li th gn pht = 0 INC Hour ; v tng gi MOV A,Hour CJNE A,#24,exitInc ; Nu gi < 24 th thot MOV Hour,#0 ; Ngc li th gn gi = 0

    exitInc: RET END

    3.4. Ngt do cng ni tip MCS-51 c 2 ngun ngt do cng ni tip: ngt pht v ngt thu. Hai ngun

    ngt ny xc nh bng cc bit RI, TI v dng chung mt a ch ISR nn khi chuyn n ISR, cc c ngt khng t ng xo bng phn cng m phi thc hin bng phn mm: kim tra nguyn nhn ngt (RI hay TI) v xo bit c tng ng.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 90

    V d: Vit chng trnh khi ng cng ni tip ch UART 8 bit vi tc truyn 4800 bps. Vit ISR cho cng ni tip theo yu cu: truyn tun t cc k t t A n Z ra cng ni tip ng thi mi ln c k t n cng ni tip th nhn v v xut k t nhn ra P0 (gi s tn s thch anh l 11.0592 MHz).

    Gii

    - Ni dung thanh ghi SCON:

    SM0 SM1 SM2 REN TB8 RB8 TI RI0 1 0 1 0 0 0 0

    UART 8 bit

    Khng ch a x l

    Cho php thu

    Khng cho php truyn

    SCON = 50h

    - Ni dung thanh ghi TMOD:

    GATE1 C/T1 M11 M10 GATE0 C/T0 M01 M000 0 1 0 0 0 0 0

    Khng dng INT1

    m bng dao ng ni

    Ch 8 bit

    Timer 0 khng dng

    TMOD = 0010 0000b (20h)

    - Gi tr m (theo bng 3.10): TH1 = -6

    - Ni dung thanh ghi IE:

    EA - ET2 ES ET1 EX1 ET0 EX01 0 0 1 0 0 0 0

    IE = 1001 0000b (90h)

    Chng trnh thc hin nh sau:

    ORG 0000h LJMP main ORG 0023h ; a ch ISR ca cng ni tip LJMP Serial_ISR

    Main: MOV TMOD,#20h MOV TH1,#(-6) MOV TL1,#(-6) ; Tc 4800 bps SETB TR1 MOV R7,#A ; K t truyn u tin MOV IE,#90h ; Cho php ngt ti cng ni tip SETB TI ;Cho php truyn SJMP $

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 91

    Serial_ISR:

    JNB RI,Transmit ; Nu khng phi ngt do nhn ; k t th truyn CLR RI MOV A,SBUF ; Nhn k t MOV P0,A ; Xut ra Port 0 SJMP exitSerial

    Transmit: ; Truyn k t CLR TI MOV A,R7 MOV SBUF,A ; Truyn k t INC R7 ; Qua k t k CJNE R7,#Z+1,exitSerial ; Nu cha truynZ th ; tip tc truyn, ngc li th MOV R7,#A ; bt u truyn t k t A

    exitSerial: RETI END

    3.5. Ngt ngoi

    MCS-51 c 2 ngun ngt ngoi khc nhau: ngt ngoi 0 v ngt ngoi 1. Ngt ngoi xy ra khi bit IEx chuyn ln mc 1, qu trnh chuyn mc ca bit IEx xy ra khi:

    - Bit ITx = 0 v xut hin mc logic 0 ti chn INTx tng ng (P3.2 cho ngt ngoi 0 hay P3.3 cho ngt ngoi 1).

    - Bit ITx = 1 v xut hin cnh m ti chn INTx.

    Khi c ngt xy ra v cho php ngt (dng thanh ghi IE), chng trnh s c chuyn n a ch ca ISR tng ng (0003h cho ngt ngoi 0 v 0013h cho ngt ngoi 1) v xo c ngt TFx.

    Lu rng cc c ngt c ly mu trong mi chu k nn pht hin ngt, yu cu phi:

    - mc thp ti thiu 1 chu k nu tc ng bng mc logic (ITx = 0).

    - mc cao ti thiu 1 chu k trc khi chuyn xung mc thp v mc thp cng phi tn ti ti thiu 1 chu k (ITx = 1).

    Qu trnh iu khin ngt ngoi m t nh sau:

    - Xc nh yu cu ngt bng cnh m hay bng mc logic.

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 92

    - Cho php ngt ti ngt ngoi tng ng (dng thanh ghi IE).

    - Xc nh mc u tin (thanh ghi IP).

    - Vit ISR cho cc ngt.

    V d: Vit chng trnh sao cho mi khi c mc logic 0 xut hin ti P3.2 (ngt ngoi 0) th to xung 1 KHz ti P1.0. Qu trnh to xung ch dng khi c mc logic 0 xut hin ti P3.3 (ngt ngoi 1).

    Gii

    Chng trnh thc hin c 3 ngt xy ra: ngt ngoi 0 cho php timer chy to xung ti P1.0, ngt ngoi 1 cm timer ngng qu trnh to xung v ngt timrer to xung.

    f = 1 KHz T = 1ms (1000 chu k): gi tr m l 500 (ch 16 bit) - Ni dung thanh ghi TMOD:

    GATE1 C/T1 M11 M10 GATE0 C/T0 M01 M000 0 0 1 0 0 0 0

    Khng dng INT1

    m bng dao ng ni

    Ch 16 bit

    Timer 0 khng dng

    TMOD = 0001 0000b (10h)

    - Ni dung thanh ghi IE:

    EA - ET2 ES ET1 EX1 ET0 EX01 0 0 0 1 1 0 1

    IE = 1000 1101b (8Dh)

    Chng trnh thc hin nh sau:

    ORG 0000h LJMP main ORG 0003h ; a ch ISR ngt ngoi 0 SETB TR1 ; Timer 1 chy RETI ORG 0013h ; a ch ISR ca ngt ngoi 1 CLR TR1 ; Cm timer 1 RETI ORG 001Bh ; a ch ISR timer 1 MOV TH1,#HIGH(-500); Ch 16 bit nn mi ln trn MOV TL1,#LOW(-500); phi np li gi tr CPL P1.0 ; o bit P1.0 to xung RETI

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 93

    Main: MOV TMOD,#10h MOV TH1,#HIGH(-500) MOV TL1,#LOW(-500) MOV IE,#8Dh ; Cho php ngt ti ngt ngoi 0, 1 v SJMP $ ; timer 1 END

  • Gio trnh Vi iu khin Cc hot ng ca vi iu khin MCS-51

    Phm Hng Kim Khnh Trang 94

    BI TP CHNG 3 1. Vit on chng trnh theo yu cu:

    - Khi ng cng ni tip ch UART 8 bit vi tc truyn 4800 bps.

    - nh thi 1s th c d liu t P1, lu vo nh 30h v xut d liu va c ra cng ni tip.

    2. Vit on chng trnh theo yu cu:

    - Khi ng cng ni tip ch UART 9 bit vi tc truyn 9600 bps.

    - Khi c ngt xy ra ti ngt ngoi 0 th xut d liu ti nh 30h ra cng ni tip trong bit truyn th 9 l bit parity.

    - Khi c ngt ti ngt ngoi 1 th c d liu t P0 v lu kt qu vo nh 30h.

    3. Vit on chng trnh theo yu cu:

    - Khi c ngt ti ngt ngoi 0 (tc ng bng cnh) th c d liu ti P2 v lu vo nh 30h ng thi tng gi tr trong nh ln 1.

    - Dng ngt timer 0 nh thi 30s th c gi tr trong nh 30h, xo ni dung trong nh 31h v kim tra gi tr theo yu cu:

    Gi tr Thc hin > 200 t bit P1.0 = 1, xo bit P1.1 = 0 v P1.2 = 0

    To xung f = 1KHz ti P1.3 dng ngt timer 1 < 100 t bit P1.1 = 1, xo bit P1.0 = 0 v P1.2 = 0

    Ngng to xung ti P1.3Khc t bit P1.2 = 1, xo bit P1.0 = 0 v P1.1 = 0