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Digital Device Definitions Physical Basics Diodes BJTs RTL-DTL-TTL ECL MOS transistors NMOS logic CMOS logic Transfer characteristics Power dissipation Delay Fan-out Logic design Logic families Dynamic logic Layout BiCMOS logic Transfer characteristics Power dissipation Delay Fan-out Interfacing Bistable circuits Cover astable and monostable multivibrators Quick review of BiCMOS Final topics Today's Goals

Today's Goals - Bilkent Universitykilyos.ee.bilkent.edu.tr/~eee314/downloads/l20.pdf · Final topics Today's Goals. ... C1 nmid1 nmid2 2e-13 R1 nvdd nmid2 3e7 ... ECL MOS transistors

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Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

● Cover astable and monostable multivibrators

● Quick review of BiCMOS

● Final topics

Today's Goals

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

FinalDue May 28th Sunday

6 questions, 2 hours12.5% TTL/ECL12.5% Basic MOS25 % CMOS gate design25 % Flip-flop gate level and transistor level12.5 % BiCMOS 12.5% multivibrator

Time needed for questions will be proportional to their percentage weight.

Between 50% and 75% of the exam will be from the examples and questions in the book verbatim.

If the average is high, I will assign a correspondingly high letter grade to the mean.

Final will be 35% ! of your grade.

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Reading assignments

You should already have read/studied chapter 9.

Chapter 11, 15 are reading assigments.

Extra material on chapter 15 will be made available at the reserves.These too will be reading assignments.

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Quiz

Draw transistor level schematic in CMOS

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Multivibrator

(Binary) digital circuits employing positive feedback.

Bi-stable: latches and flip-flops

Mono-stable: also called one-shot storage element + digital logic + positive feedback

Astable: also called relaxation oscillator (1) storage element + digital logic + feedback

Schmitt trigger: bistable with hysteresis

There are other types of oscillators:resonant, ring, vco

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Monopulse

V x=V dd−V dd e−t /RC

2nd gate triggers when V x=0.5Vdd

=−RC ln0.5=0.69RC

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Monopulsemono deneme.include cmos05um.cir

.subckt subinv in out vdd gndM1 vdd in out vdd pfet2 L=0.5um W=4um PD=10um PS=10umM2 out in gnd gnd nfet2 L=0.5um W=2um PD=10um PS=10um.ends

.subckt subnor in1 in2 out vdd gndM1 vdd in1 mid1 vdd pfet2 L=0.5um W=80um PD=80um PS=80umM2 mid1 in2 out vdd pfet2 L=0.5um W=80um PD=80um PS=80umM3 out in1 gnd gnd nfet2 L=0.5um W=20um PD=40um PS=40umM4 out in2 gnd gnd nfet2 L=0.5um W=20um PD=40um PS=40um.ends

V1 nvdd 0 5V2 nvin 0 PULSE(0 5 2e-11 2e-11 2e-11 100e-9 25000e-9)

X1 nvin nmid3 nmid1 nvdd 0 subnorC1 nmid1 nmid2 2e-13R1 nvdd nmid2 3e7X2 nmid2 nmid3 nvdd 0 subinvX3 nmid3 nmid4 nvdd 0 subinvX4 nmid4 nvout nvdd 0 subinv

C2 nvout 0 1e-14

.tran 1e-8 4000e-7 UIC

.end

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Monopulse

Note the recovery time

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Astable Circuits

In b) assume capacitor is dischargedv x=V dd 1−e−t /RC

Inverter 2 switches to output low when v x=0.5V dd

Then at t1+ :: v x=1.5V dd  and we have d)

v x=1.5V dd e−t−t1 /RC

0.5T=t2−t1−−RC ln 0.5 V dd

1.5V dd=0.4 RC

f =1.25RC

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Astable Circuits

`1

T=RC v xv y1V P

1V M

vo2t =vo20−1RC

vo1 t

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

Schmitt Trigger

Consider  V iV TN

M NO∧M¿ are OFF  M NF is ON/LIN and source of  M NO  is at V dd

When  V i  increases to V TN M¿ turns ON

So, the voltage at which  M NO  turns on is 

V U=V I=V DSNIV TN

Note that VOL=0VOH=V dd

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

BiCMOS

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

BiCMOS NAND2

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

BiCMOS NOR2

Digital Device DefinitionsPhysical BasicsDiodesBJTsRTL-DTL-TTLECLMOS transistorsNMOS logicCMOS logic

Transfer characteristicsPower dissipationDelayFan-outLogic designLogic familiesDynamic logic

LayoutBiCMOS logic

Transfer characteristicsPower dissipationDelayFan-out

InterfacingBistable circuits

BiCMOS (rail to rail)