JL4003B

High Speed USB 2.0 to ATA/ATAPI Bridge

Revision: 1.0

Date: 07/01/2005

JEILIN Technology Co., Ltd.

8F, No.179, Jian Yi Rd., Chung Ho,

Taipei Hsien, Taiwan

TEL：886-2-82215466 FAX：886-2-82215456

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0

Table of Contents

0. REVISION HISTORY ................................................................................................................3

1. GENERAL DESCRIPTION......................................................................................................4

2. FEATURES ................................................................................................................................4

3. APPLICATION...........................................................................................................................4

4. BLOCK DIAGRAM ...................................................................................................................5

5. PIN DESCRIPTIONS ................................................................................................................6

6. ELECTRICAL CHARATERISTICS ......................................................................................12

7. PACKAGE OUTLINE AND DIMENSION ............................................................................13

JEILIN Technology Co., Ltd. 2 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 0. Revision History

Revision Description of Changes Date

1.0 First Release 2005/07/01

JEILIN Technology Co., Ltd. 3 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 1. General Description

JL4003B is a high performance and low cost USB 2.0 to ATA / ATAPI bridge controller. Integrated with

high speed UTMI transceiver, its core includes both USB and ATA/ATAPI controllers and, additionally, a main

processor unit to coordinate the data transmission between two controllers. As to one-chip design, JL4003B

can support various kinds of ATA / ATAPI devices and fit in any compact, portable product design. To add the

portability to the mass storage class peripherals for PC with USB 2.0 such as hard disk, CD-ROM, CD-R/RW,

DVD-ROM and DVD±R/±RW. JL4003B is the best price/performance ratio choice of single-chip controller

design.

2. Features Complies with ATA / ATAPI-6 Specification Rev 2.0(PIO mode 0~4, Multiple word DMA mode 0~2,

and Ultra DMA mode 0~5)

Complies with Universal Serial Bus Specification Rev. 2.0 (USB 2.0)

Compliant to USB Mass Storage Class Specification, Version 1.0 (Bulk-Only Transport).

Operating system supported: Window XP/2000/Me/98; Mac 9.X /10.X.

Support 3 endpoints: (1) Control Pipe (2) Bulk Read (3) Bulk Write.

Embedded a high-speed (UTMI) USB2.0 transceiver.

Embedded a turbo microprocessor.

External Program Memory: 16KB flash ROM supported. (Only for 100 pins package)

5V tolerance pad for IDE Interface.

Apply to ATA/ATAPI Devices, such as Hard Disk, CD-ROM, CD-R/RW, DVD-ROM and

DVD±R/±RW.

Available in 48/64/100 pin LQFP package

3. Application USB2.0 Portable Storage Device

External CD-RW (Combo Device)

External DVD-RW

External DVD±R/±RW

JEILIN Technology Co., Ltd. 4 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 4. Block Diagram

IDE Enginemodule

InternalRAM

Microprossor

Internal ROM

USB2.0CTRL

module

FIFO

ATA/ATAPIDevice

UTMITransceiver

PC

GPIO

External ROM

Figure 1: Block diagram

JEILIN Technology Co., Ltd. 5 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 5. Pin Descriptions Pin Diagram

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

47

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

59 555657586061626364656667686970

NC

REGOUT

/CS0

ROM_A4

DD15

ROM_A5

DD14

GPIO_5

GPIO_7

DD13

VDD1

VSS1

VSS2

GPIO_4

DD

12

RO

M_A

6

DD

11

RO

M_A

7

DD

10

RO

M_A

8

DD

9

RO

M_A

9

NC

DMARQ

ROM_D0

DD4

GN

DH

SRT

NC

VCC

HSR

T

XSC

O

XSC

I

TEST

MO

DE0

FLAS

H_W

E

IDEB

LK_E

N

RO

M_A

10

DD

6

DD

8

ROM_A13

ROM_D2

DD2

ROM_D3

DD1

GPIO_1

DD0

ROM_D4

RR

EF

TEST

MO

DE2

IDE_

RES

ETNC

TEST

MO

DE1

USB

_IN

SER

T

NC

ROM_A3

RO

M_A

11

ROM_D1

ROM_D5

/DMACK

/DIO

W

GPI

O_2

GPI

O_3

DD

7

VDD2

JL4003B

17 18 19 20 21 22 23 24 25

NC

NC

GN

DA_

U20

VCC

A_U

20NC

DP

NC

DM NC

92

93

94

95

96

97

98

99

100

ROM_A0

DA2

ROM_A1

DA1

ROM_A2

DA0

GPIO_6

/CS1

NC 26

27

28

29

30

31

ROM_D7

GPIO_0

INTRQ

ROM_D6

/NRST

FLASH_RD

50

48

49

PLLPWR

NC

51525354

RO

M_A

12

NC

7172737475

REG

GN

D

VSSA

DD3

DD5

PLLGND

IOR

DY

/DIO

R

VDD

A

REG

PWR

NC

Figure 2: 100 Pin LQFP Pinout Diagram

JEILIN Technology Co., Ltd. 6 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0

JEILIN Technology Co., Ltd. 7 of 16 2005/07/01

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

32

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

37 333435363839404142434445464748

REGOUT

VDD

DA2

DA1

DA0

GPIO_6

/CS1

/CS0

DD15

DD14

VSS

DD13

GPIO_7

GPIO_5

NC

REG

PWR

REG

GN

D

DD

12

DD

11

DD

10

DD

9

DD

8

VCC

A_U

20NC

PLLPWR

DD5

DP

DM

RR

EF

GN

DH

SRT

VCC

HSR

T

XSC

O

XSC

I

TEST

MO

DE0

GPI

O_3

GP

IO_2

DD

7

PLLGND

DD2

DD1

GPIO_1

DD0

DMARQ

/DMACK

GPIO_0

INTRQ

GN

DA

_U20

IDEB

LK_E

N

TEST

MO

DE2

US

B_IN

SER

T

NC

TEST

MO

DE1

IDE_

RE

SET

NC

/DIO

R

DD4

DD3

/NRST

NC

NC

IOR

DY

/DIO

W

DD

6

GPIO_4

JL4003B

Figure 3: 64 pin LQFP Pinout Diagram

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0

JEILIN Technology Co., Ltd. 8 of 16 2005/07/01

37

38

39

40

41

42

43

44

45

46

47

48

1 2 3 4 5 6 7 8 9 10 11 12

13

14

15

16

17

18

19

20

21

22

23

24

252627282930313233343536

DA1

DA0

/CS1

/CS0

DD15

DD14

GPIO_7

DD13

REGOUT

VDD

VSS

REG

PWR

REG

GN

D

DD

12

DD

11

DD

10

DD

9

DD

8

DD

7

/DMACK

GN

DA

_U20

VCC

A_U

20DP

DM

RR

EF

GN

DH

SRT

/DIO

W

DD

6

PLLPWR

DD5

DD4

DD3

DD2

DD1

DD0

DMARQ

XSC

O

IDEB

LK_E

N

US

B_IN

SER

T

VCC

HSR

T

XSC

I

IDE_

RE

SET

DA2

PLLGND

INTRQ

/NRSTIO

RD

Y

/DIO

R

JL4003B

Figure 4: 48 pin LQFP Pinout Diagram

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 Pin Descriptions

Pin Name 48 pin No. 64 pin No. 100 pin No. Type Description

IDE_RESET 1 1 3 B4 IDE hardware reset.

USB_INSERT 2 2 4 I USB Inserted.

TESTMODE[2:0] - 3, 4, 7 5, 6, 9 I,D System test pin

IDEBLK_EN 3 5 7 I IDE Block Enable, active high.

FLASH_WE - - 8 B2 Write Strobe of External Flash

ROM.

XSCI 4 8 10 ICLK Crystal terminal.

XSCO 5 9 11 OCLK Crystal terminal

VCCHSRT 6 10 12 PWR Analog supply voltage(3.3V)

GNDHSRT 7 11 14 GND Analog ground supply.

REFF 8

12

16 AI

Connect external reference

register(12K ohm +/- 1%) to

Analog GND.

DM 9 13 17 USB USB 2.0 Data Line(+)

DP 10 14 19 USB USB 2.0 Data Line(-)

VCCA_U20 11 15 21 PWR Analog supply voltage(3.3V)

GNDA_U20 12 16 22 GND Analog ground supply.

FLASH_RD - - 26 B2 Read Strobe of External Flash

Rom.

/NRST 13 18 27 I,S,U Power on reset.

INTRQ 14 20 30 I,D The active high interrupt request

to the host.

/DMACK 15 22 32 B4 DMA acknowledge.

DMARQ 16 23 34 I.D DMA request.

IORDY 25 33 52 I,U IORDY/DDMARDY-/DSTROBE

/DIOR 26 35 54 B4 DIOR-/HDMARDY-/HSTROBE

/DIOW 27 37 56 B4 DIOW-/STOP

/CS[1:0] 45, 44 59, 58 92, 90 B4 Chip Select.

DA[2:0] 48, 47, 46 63, 62, 61 98, 96, 94 B4 IDE Address Line

DD[15:0]

43,42,40,34,

33,32,31,30,

29,28,22,21,

20,19,18,17

57,56,53,45,

44,43,42,41,

40,38,30,29,

28,27,26,24

88, 86, 83, 70,

68, 66, 64, 62,

60, 58, 46, 44,

42, 40, 38, 36

B4 IDE Data Bus

ROM_D[7:0] - - 28, 29, 33, 35, I,D Flash ROM Data Bus

JEILIN Technology Co., Ltd. 9 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0

Pin Name 48 pin No. 64 pin No. 100 pin No. Type Description 39, 41, 43, 45

ROM_A[13:0] - -

47, 53, 57, 61,

63, 65, 67, 69,

87, 89, 91, 95,

97, 99

B2 Flash ROM Address Bus

GPIO7 41 54 84 B2 General Purpose I/O

GPIO[6:0] - 60, 55, 52,

39, 36, 25,21

93, 85, 82, 59,

55, 37, 31 B2 General Purpose I/O

PLLPWR 23 31 48 PWR Analog supply voltage(2.5V)

PLLGND 24 32 49 GND Analog ground supply.

REGPWR 36 47 74 PWR Analog supply voltage(3.3V)

REGGND 35 46 72 GND Analog ground supply.

REGOUT 37 49 77 AO+2.5V power output of Internal

Regulator.

VDDA - - 73 PWR Analog supply voltage(3.3V)

VSSA - - 71 GND Analog ground supply.

VDD1 38 50 78 PWR Digital supply voltage(2.5V)

VSS1 39 51 80 GND Digital ground supply.

VDD2 - - 79 PWR Digital supply voltage(2.5V)

VSS2 - - 81 GND Digital ground supply.

NC - 6, 17, 19, 34,

48, 64

1, 2, 13, 15,

18, 20, 23, 24,

25, 50, 51, 75,

76, 100

No connect

Buffer Type Descriptions

Type Description I Input Pin

O2 Output Pin with 2 mA drive

O4 Output Pin with 4 mA drive

B2 Bi-directional Pin with 2 mA drive

B4 Bi-directional Pin with 4 mA drive

B8 Bi-directional Pin with 8 mA drive

U Internal weak pull-up resistor

D Internal weak pull-down resistor

JEILIN Technology Co., Ltd. 10 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0

S Schmitt Trigger

AI Analog Input

AO Analog Output

USB USB Interface

ICLK XTAL Clock Input

OCLK XTAL Clock Output

PWR Power Pin

GND Ground Pin

JEILIN Technology Co., Ltd. 11 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 6. ELECTRICAL CHARATERISTICS Absolute Maximum Ratings

SYMBOL PARAMETER RATING UNITS

VCC Power Supply (3.3V) -0.3 to 3.6 V

VCC1 Power Supply (2.5V) -0.3 to 2.75 V

VIN Input Voltage -0.3 to VCC+0.3 V

VOUT Output Voltage -0.3 to VCC+0.3 V

TSTG Storage Temperature -55 to 150 ℃

Recommended Operation Conditions

SYMBOL PARAMETER MIN TYP MAX UNITS

VCC Power Supply (3.3V) 3.0 3.3 3.6 V

VCC1 Power Supply (2.5V) 2.25 2.5 2.75 V

TOPR Operating Temperature 0 25 70 ℃

DC Electrical Characteristics for 3.3 volts operation

(Under Recommended Operating Conditions and VCC = 3.0V~3.6V, Tj = 0℃ to +70℃)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VIL Input Low Voltage -0.3 0.8 V

VIH Input High Voltage 2.0 Vcc+0.3 V

VT- Schmitt Input Low Voltage -0.3 0.8 V

VT+ Schmitt Input High Voltage 2.0 Vcc+0.3 V

VOL Output Low Voltage 0.4 V

VOH Output High Voltage 2.4 V

JEILIN Technology Co., Ltd. 12 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 7. Package Outline and Dimension Package Outline (100-pin LQFP)

JEILIN Technology Co., Ltd. 13 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 Package Outline (64-pin LQFP)

JEILIN Technology Co., Ltd. 14 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0 Package Outline (48-pin LQFP)

JEILIN Technology Co., Ltd. 15 of 16 2005/07/01

JL4003B High Speed USB 2.0 to ATA/ATAPI Bridge V1.0

JEILIN Technology Co., Ltd. 8F, No. 179, Jian Yi Rd., Chung Ho,

Taipei Hsien, Taiwan Tel: 886-2-8221-5466 Fax: 886-2-8221-5456

Website: www.jeilin.com.tw Email: jeilin@jeilin.com.tw

©2005 JEILIN Technology Corp., Ltd. All rights reserved.

The information in this document has been carefully checked and is believed to be reliable;

however no responsibility can be assumed for inaccuracies that may not have been caught. All

information in this document is subject to change without prior notice. The information

contained in this document is presented only as a guide for applications of our products. No

responsibility is assumed by JEILIN Technology for any infringements of intellectual property or

other rights of the third parties, which may result from its use. No license is granted by

implication or otherwise under any intellectual property or other rights of JEILIN Technology or

others. No part of this document may be reproduced in any form, in an electronic retrieval

system or otherwise, without the prior written permission of JEILIN Technology.

JEILIN Technology Co., Ltd. 16 of 16 2005/07/01