VNS3NV04D datasheet

July 2007 Rev 2 1/21

21

VNS3NV04D-EOMNIFET II

fully autoprotected Power MOSFET

Features

Linear current limitation

Thermal shut down

Short circuit protection

Integrated clamp

Low current drawn from input pin

Diagnostic feedback through input pin

Esd protection

Direct access to the gate of the power mosfet (analog driving)

Compatible with standard power mosfet

DescriptionThe VNS3NV04D-E is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower M0-3 Technology: they are intended for replacement of standard Power MOSFETs from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments.

Fault feedback can be detected by monitoring the voltage at the input pin.

Max On-State resistance (per ch.) RON 120mΩ

Current limitation (typ) ILIMH 3.5A

Drain-Source clamp voltage VCLAMP 40V

SO-8

Table 1. Device summary

PackageOrder codes

Tube Tape and Reel

SO-8 VNS3NV04D-E VNS3NV04DTR-E

www.st.com

http://www.st.com

Contents VNS3NV04D-E

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Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16

3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.2 SO-8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.3 SO-8 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

VNS3NV04D-E List of tables

3/21

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Table 4. Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Table 5. On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Table 7. Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Table 8. Source Drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Table 9. Protections (-40°C < Tj < 150°C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . 9Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

List of figures VNS3NV04D-E

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List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 9. Source-Drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 10. Static Drain-Source On resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 12. Static Drain-Source On resistance vs. Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 13. Static Drain-Source On resistance Vs. Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 15. Static Drain-Source On resistance Vs. Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 17. Turn On current slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 18. Turn On current slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 19. Input voltage Vs. Input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 20. Turn off Drain source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 21. Turn off Drain-Source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 23. Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 24. Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 26. Normalized On resistance Vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 27. Normalized Input threshold voltage Vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Figure 28. Normalized current limit Vs. junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Figure 30. SO-8 package mechanical data & package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Figure 31. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 32. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

VNS3NV04D-E Block diagram and pin description

5/21

1 Block diagram and pin description

Figure 1. Block diagram

Figure 2. Configuration diagram (top view)

SOURCE2

OVERVOLTAGE

LINEAR

DRAIN1

SOURCE1

CLAMP

CURRENTLIMITEROVER

TEMPERATURE

GATE CONTROL

DRAIN2

OVERVOLTAGECLAMP

LINEARCURRENTLIMITER

GATE CONTROL

OVERTEMPERATURE

INPUT2INPUT1

DRAIN 2

DRAIN 1

DRAIN 2

DRAIN 1

INPUT 2

SOURCE 1

SOURCE 2

INPUT 1

1

4 5

8

Electrical specifications VNS3NV04D-E

6/21

2 Electrical specifications

Figure 3. Current and voltage conventions

2.1 Absolute maximum ratingsStressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document.

DRAIN 1INPUT 1

SOURCE 2

IIN1

VIN1

INPUT 2

IIN2

SOURCE 1

DRAIN 2

VIN2

ID2

ID1

VDS1

VDS1

RIN1

RIN2

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VDSn Drain-Source Voltage (VINn=0V) Internally clamped V

VINn Input voltage Internally clamped V

IINn Input current +/-20 mA

RIN MINn Minimum input series impedance 220 Ω

IDn Drain current Internally limited A

IRn Reverse DC output current -5.5 A

VESD1 Electrostatic discharge (R=1.5KΩ, C=100pF) 4000 V

VESD2Electrostatic discharge on output pins only (R=330Ω, C=150pF)

16500 V

Ptot Total dissipation at Tc=25°C 4 Ω

Tj Operating junction temperature Internally limited °C

Tc Case operating temperature Internally limited °C

Tstg Storage temperature -55 to 150 °C

VNS3NV04D-E Electrical specifications

7/21

2.2 Thermal data

2.3 Electrical characteristicsValues specified in this section are for -40°C< Tj <150°C, unless otherwise stated.

Table 3. Thermal data

Symbol Parameter Max value Unit

Rthj-lead Thermal resistance junction-lead (per channel) 30 °C/W

Rthj-amb Thermal resistance junction-ambient 80(1)

1. When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 µm thick) connected to all DRAIN pins of the relative channel

°C/W

Table 4. Off

Symbol Parameter Test Conditions Min Typ Max Unit

VCLAMPDrain-Source clamp voltage

VIN=0V; ID=1.5A 40 45 55 V

VCLTHDrain-Source clamp threshold voltage

VIN=0V; ID=2mA 36 V

VINTHInput threshold voltage

VDS=VIN; ID=1mA 0.5 2.5 V

IISSSupply current from input pin

VDS=0V; VIN=5V 100 150 µA

VINCLInput-Source clamp voltage

IIN=1mAIIN=-1mA

6-1.0

6.8 8-0.3

V

IDSS

Zero input voltage drain current (VIN=0V)

VDS=13V; VIN=0V; Tj=25°CVDS=25V; VIN=0V

3075

µA

Table 5. On

Symbol Parameter Test conditions Min Typ Max Unit

RDS(on)Static Drain-Source On resistance

VIN=5V; ID=1.5A; Tj=25°C

VIN=5V; ID=1.5A

120

240mΩ


8/21

Electrical characteristics (continued) (Tj=25°C, unless otherwise specified)

Table 6. Dynamic


gfs (1) Forward

transconductanceVDD=13V; ID=1.5A 5.0 S

COSS Output capacitance VDS=13V; f=1MHz; VIN=0V 150 pF

Table 7. Switching


td(on) Turn-on delay time VDD=15V; ID=1.5AVgen=5V; Rgen=RIN MIN=220Ω(see Figure 4)

90 300 ns

tr Rise Time 250 750 ns

td(off) Turn-off delay time 450 1350 ns

tf Fall time 250 750 ns

td(on) Turn-on delay time VDD=15V; ID=1.5A

Vgen=5V; Rgen=2.2 KΩ(see Figure 4)

0.45 1.35 µs

tr Rise time 2.5 7.5 µs

td(off) Turn-off delay time 3.3 10.0 µs

tf Fall time 2.0 6.0 µs

(dI/dt)on Turn-on current slopeVDD=15V; ID=1.5A

Vgen=5V; Rgen=RIN MIN=220Ω4.7 A/µs

Qi Total input chargeVDD=12V; ID=1.5A; VIN=5V

Igen=2.13mA (see Figure 7)8.5 nC

Table 8. Source Drain diode


VSD(1)

1. Pulsed: Pulse duration = 300µs, duty cycle 1.5%

Forward On voltage ISD=1.5A; VIN=0V 0.8 V

trr Reverse recovery time

ISD=1.5A; dI/dt=12A/µsVDD=30V; L=200µH

(see Figure 5)

107 ns

Qrr Reverse recovery charge

37 µC

IRRM Reverse recovery current

0.7 A


9/21

Figure 4. Switching time test circuit for resistive load

Table 9. Protections (-40°C < Tj < 150°C, unless otherwise specified)


Ilim Drain current limit VIN=5V; VDS=13V 3.5 5 7 A

tdlim Step response current limit

VIN=5V; VDS=13V 10 µs

Tjsh Overtemperature

shutdown150 175 200 °C

Tjrs Overtemperature reset 135 °C

Igf Fault sink current VIN=5V; VDS=13V; Tj=Tjsh 10 15 20 mA

Eas Single pulse

avalanche energy

Starting Tj=25°C; VDD=24V

VIN=5V Rgen=RIN MIN=220Ω; L=24mH

(see Figure 6 and Figure 8)

100 mJ

t

ID

90%

10%

t

Vgen

td(on) td(off)

tftr

Rgen

Vgen

VD


10/21

Figure 5. Test circuit for diode recovery times

Figure 6. Unclamped inductive load test circuits

L=100uH

A

B

8.5 Ω

VDDRgen

FASTDIODEOMNIFET

A

D

I

S

220Ω

B

OMNIFET

D

S

I

Vgen

RGEN

PW

VIN


11/21

Figure 7. Input charge test circuit

Figure 8. Unclamped inductive waveforms

GEN

ND8003

VIN


12/21

2.4 Electrical characteristics curves

Figure 9. Source-Drain diode forward characteristics

Figure 10. Static Drain-Source On resistance

Figure 11. Derating curve Figure 12. Static Drain-Source On resistance vs. Input voltage

Figure 13. Static Drain-Source On resistance Vs. Input voltage

Figure 14. Transconductance

0 1 2 3 4 5 6 7 8 9 10 11 12

Id (A)

600

650

700

750

800

850

900

950

1000

1050

1100

Vsd (mV)

Vin=0V

0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55

Id(A)

0

100

200

300

400

500

600

700

800

900

1000

Rds(on) (mohms)

Tj=25ºC

Tj=150ºC

Tj=-40ºC

Vin=2.5V

3 3.5 4 4.5 5 5.5 6 6.5

Vin(V)

0

25

50

75

100

125

150

175

200

225

250

275

300

Rds(on) (mohms)

Id=3.5AId=1A

Id=3.5AId=1A

Id=3.5AId=1A

Tj=25ºC

Tj=150ºC

Tj=-40ºC

3 3.5 4 4.5 5 5.5 6 6.5

Vin(V)

0

25

50

75

100

125

150

175

200

225

250

Rds(on) (mohms)

Id=1.5A

Tj=150ºC

Tj=-40ºC

Tj=25ºC

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5

Id (A)

0

1

2

3

4

5

6

7

8

9

10

11

Gfs (S)

Vds=13V

Tj=25ºC

Tj=150ºC

Tj=-40ºC


13/21

Figure 15. Static Drain-Source On resistance Vs. Id

Figure 16. Transfer characteristics

Figure 17. Turn On current slope Figure 18. Turn On current slope

Figure 19. Input voltage Vs. Input charge

Figure 20. Turn off Drain source voltage slope

0 0.5 1 1.5 2 2.5 3 3.5 4

Id (A)

0

25

50

75

100

125

150

175

200

225

250

Rds(on) (mohms)

Tj=25ºC

Tj=150ºC

Tj= - 40ºC

Vin=5V

1.5 2 2.5 3 3.5 4 4.5 5 5.5 6

Vin (V)

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

5.5

6

Idon (A)

Vds=13.5V

Tj=150ºC

Tj=25ºC

Tj=-40ºC

0 250 500 750 1000 1250 1500 1750 2000 2250 2500

Rg(ohm)

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

di/dt(A/us)

Vin=5VVdd=15VId=1.5A

0 250 500 750 1000 1250 1500 1750 2000 2250 2500

Rg(ohm)

0

0.25

0.5

0.75

1

1.25

1.5

1.75

di/dt(A/usec)

Vin=3.5VVdd=15VId=1.5A

0 1 2 3 4 5 6 7 8 9 10 11

Qg (nC)

0

1

2

3

4

5

6

7

8

9

Vin (V)

Vds=1VId=1.5A

0250

500750

10001250

15001750

20002250

2500

Rg(ohm)

0

25

50

75

100

125

150

175

200

225

250

275

300

dv/dt(V/usec)

Vin=5VVdd=15VId=1.5A


14/21

Figure 21. Turn off Drain-Source voltage slope

Figure 22. Capacitance variations

Figure 23. Switching time resistive load Figure 24. Switching time resistive load

Figure 25. Output characteristics Figure 26. Normalized On resistance Vs. temperature

0250

500750

10001250

15001750

20002250

2500

Rg(ohm)

0

25

50

75

100

125

150

175

200

225

250

275

300

dv/dt(V/usec)

Vin=3.5VVdd=15VId=1.5A

0 5 10 15 20 25 30 35

Vds(V)

50

100

150

200

250

300

350

C(pF)

f=1MHzVin=0V

0250

500750

10001250

15001750

20002250

2500

Rg(ohm)

0

0.5

1

1.5

2

2.5

3

3.5

4

t(usec)

Vdd=15VId=1.5AVin=5V

td(off)

tr

td(on)

tf

3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25

Vin(V)

0

100

200

300

400

500

600

700

800

900

t(nsec)

Vdd=15VId=1.5A

Rg=220ohm

tf

tr

td(off)

td(on)

0 1 2 3 4 5 6 7 8 9 10

Vds (V)

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

Id (A)

Vin=4V

Vin=5V

Vin=3V

-50 -25 0 25 50 75 100 125 150 175

Tc )ºC)

0.5

1

1.5

2

2.5

3

3.5

4

Rds(on) (mOhm)

Vin=5VId=1.5A


15/21

Figure 27. Normalized Input threshold voltage Vs. temperature

Figure 28. Normalized current limit Vs. junction temperature

Figure 29. Step response current limit

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

Vinth (V)

Vds=VinId=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

0

1

2

3

4

5

6

7

8

9

10

Ilim (A)

Vin=5V Vds=13V

5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5

Vdd(V)

7.5

8

8.5

9

9.5

10

10.5

11

11.5

12

12.5

13

Tdlim(usec)

Vin=5VRg=220ohm

Protection features VNS3NV04D-E

16/21

3 Protection features

During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path.

The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100µA) flows into the INPUT pin in order to supply the internal circuitry.

The device integrates:

3.1 Overvoltage clamp protectionInternally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.

3.2 Linear current limiter circuitLimits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh.

3.3 Overtemperature and short circuit protectionThese are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature.

3.4 Status feedbackIn the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS.

Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.

VNS3NV04D-E Package and packing information

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4 Package and packing information

4.1 ECOPACK® packagesIn order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Package and packing information VNS3NV04D-E

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4.2 SO-8 Package mechanical data

Figure 30. SO-8 package mechanical data & package outline

OUTLINE ANDMECHANICAL DATA

DIM.mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 1.750 0.0689

A1 0.100 0.250 0.0039 0.0098

A2 1.250 0.0492

b 0.280 0.480 0.0110 0.0189

c 0.170 0.230 0.0067 0.0091

D (1) 4.800 4.900 5.000 0.1890 0.1929 0.1969

E 5.800 6.000 6.200 0.2283 0.2362 0.2441

E1(2) 3.800 3.900 4.000 0.1496 0.1535 0.1575

e 1.270 0.0500

h 0.250 0.500 0.0098 0.0197

L 0.400 1.270 0.0157 0.0500

L1 1.040 0.0409

k 0˚ 8˚ 0˚ 8˚

ccc 0.100 0.0039

Notes: 1. Dimensions D does not include mold flash,protrusions or gate burrs.Mold flash, potrusions or gate burrs shall notexceed 0.15mm in total (both side).

2. Dimension “E1” does not include interlead flashor protrusions. Interlead flash or protrusions shallnot exceed 0.25mm per side.

SO-8

0016023 D

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4.3 SO-8 Packing information

Figure 31. SO-8 tube shipment (no suffix)

Figure 32. SO-8 tape and reel shipment (suffix “TR”)

All dimensions are in mm.

Base Q.ty 100Bulk Q.ty 2000Tube length (± 0.5) 532A 3.2B 6C (± 0.1) 0.6

CB

A

TAPE DIMENSIONSAccording to Electronic Industries Association(EIA) Standard 481 rev. A, Feb. 1986


Tape width W 12Tape Hole Spacing P0 (± 0.1) 4Component Spacing P 8Hole Diameter D (± 0.1/-0) 1.5Hole Diameter D1 (min) 1.5Hole Position F (± 0.05) 5.5Compartment Depth K (max) 4.5Hole Spacing P1 (± 0.1) 2

Top

cover

tape

End

Start

No componentsNo components Components

500mm min

500mm minEmpty components pocketssaled with cover tape.

User direction of feed

REEL DIMENSIONS


Base Q.ty 2500Bulk Q.ty 2500A (max) 330B (min) 1.5C (± 0.2) 13F 20.2G (+ 2 / -0) 12.4N (min) 60T (max) 18.4

Revision history VNS3NV04D-E

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5 Revision history

Table 10. Document revision history

Date Revision Changes

28-Oct-2005 1 Initial release.

02-Jul-2007 2Document reformatted and converted into new ST template.Table 4: Off - IDSS unit corrected

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Documents

VNS3NV04D datasheet