Susceptibility Evaluation of CAN Transceiver Circuits with
In-Place Waveform Capturing under RF DPI
Kohki Taniguchi, Makoto Nagata, Akihiro Tsukioka, Daisuke Fujimoto, Noriyuki Miura, Takao Egami*, Rieko Akimoto*, Kenji Niinomi*, Terumitsu Komatsu*,
Yoshinori Fukuba*, Atsushi Tomishima*Graduate School of Science, Technology and Innovation, Kobe University, Japan
*Toshiba Corporation, [email protected]
http://www.edu.kobe-u.ac.jp/stin-secafy/
EMC Compo (St. Petersburg) 2017.7.5
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Electronic sub assembly (ESA) stands for electronic/electric components fitted to a vehicle, and needs to be certified for international automotive EMC standards.Semiconductor IC chip vendors are to be ready to requests by ESA component/module suppliers (tier 1).
EMC awareness in IC chip vendors
Electronic module supplier
Car manufacturer
IC chipvendor
Certification for ECE-R10
Certification forCSPR25, ISO11452,
and others
Ready toIEC61967, IEC62132,
and others
RequestsRequests
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IC chip EMC test standards (SC47A WG9)Physical origin Measurement method EstablishedGeneral
IEC61967
Part1: General 2002
ConductedEmission
Part4: 1 ohm/150 ohm 2002Part5: WBFC 2003Part6: Magnetic probe 2002
RadiatedEmission
Part2: TEM cell 2005Part3: Surface scan 2014Part8: IC strip line 2011
General
IEC62132
Part1: General 2006
ConductedImmunity
Part3: BCI 2007Part4: DPI 2006Part5: WBFC 2005
RadiatedImmunity
Part2: TEM cell 2010Part8: IC strip line 2012
Source JEITA
EMS
EMI
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Outline
1. Background2. RF DPI test on CAN transceiver3. RF DPI test extended with on-chip monitoring (OCM) 4. CAN in-place waveforms – Si examples 5. Conclusions
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SG AMP Directionalcoupler
RF powermeter
RF powersensor
DCsupply
Bias teeAC
DC
DUT
PCB
PFRD PNET
PREF
Accordingly to IEC 62132-4, RF power is directly injected into a pin of an IC chip, for measuring the immunity of IC-chip operations against incoming RF noise/disturbance.
EMS evaluation of IC chip with RF DPI(EMS: electromagnetic susceptibility, RF DPI: RF direct power injection)
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IEC TS 62228 – EMC evaluation of CAN transceiversThree identical test chips with CAN Tx/Rx circuits are tied to CAN_BUS.
EMS evaluation setup defined for CAN
Chip side
CAN_BUS
VCC
OCM area
DUT area
Chip 1
Chip 2
Chip 3
Tx
Rx
Rx
CAN_BUS
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RF DPI on CAN; Threshold Power
Tx-Rx delay (Tdelay) varies as function of (FRF, PFWD) under RF DPI.
Tx
DPI N.A.Rx
Tdelay< 200 ns
Tolerance of delay variation: 200 ns in HS CAN (10% of Tx bit-time for the bit rate of 500 kbps)26
28
30
32
34
36
38
1 10 100 1000
P FWD
(dBm
)
FRF (MHz)
PMAX =36 dBm
Delay exceeded tolerance
Expected mask (conceptual)
CAN IC chip is EMC compliant
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26
28
30
32
34
36
38
1 10 100 1000
P FWD
(dBm
)
FRF (MHz)
PMAX =36 dBm
Delay exceeded tolerance
RF DPI on CAN; Threshold Power
TxRx
DPI: FRF =5 MHz, PNET =34.2dBm
Unexpected glitches under RF DPI, although in the tolerance of delay var.
Why glitches???- PSRR- CMRR- Multiply rooted by ESD, BGR, VR, and many others
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Outline
1. Background2. RF DPI test on CAN transceiver3. RF DPI test extended with on-chip monitoring (OCM) 4. CAN in-place waveforms – Si examples 5. Conclusions
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RF DPI system extended with OCM function
Analog signalsDigital signals
FPGAboard
OCM I/F board
DPI system
OCM system
USB
PC
System clock (Ref_clk)
DUTboard
Backplane (GPIB)
SG PA PNET
FRF
Power meter
In-place waveform capturing for in-depth understanding of CAN circuit-level response to voltage-mode disturbance induced by RF DPI
(OCM: on-chip waveform monitoring)
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CAN under Extended RF DPI (with OCM)CANH
CANLRF
Rx
TxNode1
CAN
OCM
Node2
CAN
OCM
Node3
CAN
OCM
Rx
CAN Transceiver
Tx
Rx
CANH
CANL
VDC
OCM
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CAN signal/power line
cf. VRF DPI >> 10 VVSIG CAN < 5 V
OCM with high voltage tolerance
LV SF(CMOS)
HV SF(DMOS)
HV SW LV LC
N:1Divider
DPU
MUX
VIN DOUT
VREF
TSTRB
SF: Source followerLC: Latch comparatorSW: SwitchMUX: MultiplexerDPU: Data processing unit
Vbias
Vsfi
Vsfo
Low voltage (LV, CMOS) and high voltage (HV, DMOS) input channelsHV for large-signal sinusoids induced by RF DPI, while LV for internal signalsOffset/gain variations of HV channels are calibrated by LV reference channel
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Automotive EMC test vehicle
HV OCM
HV OCM OCMOCM CAL
OCMCalibration Noise
source
CAN Transceiver Analog cores
Auto-motivecores
130 nm BiCDprocess technology
CAN Tx/Rx OCM frontend/
backend
DUT PCB I/F PCB FPGA board
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In-place waveforms: CAN Rx (High)
Dominant (Logic L) Recessive (Logic H)1.5
2.0
2.5
3.0
3.5
0.0 1.0 2.0 3.0 4.0
V OCM_
H(V
)
Time (s)
DPI off PNET =4.1 dBmPNET =15.8 dBmPNET =21.3 dBmPNET =26.5 dBm
Time resolution: 10 ns
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In-place waveforms: CAN Rx (Low)
Dominant (Logic L) Recessive (Logic H)1.5
2.0
2.5
3.0
3.5
0.0 1.0 2.0 3.0 4.0
V OCM_
L(V
)
Time (s)
DPI off PNET =4.1 dBmPNET =15.8 dBmPNET =21.3 dBmPNET =26.5 dBm
Time resolution: 10 ns
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In-place waveforms: CAN Rx (Differential)
Dominant (Logic L) Recessive (Logic H)-0.1
0.0
0.1
0.2
0.3
0.0 1.0 2.0 3.0 4.0
V OCM_
DIFF
(V)
Time (s)
DPI off PNET =4.1 dBmPNET =15.8 dBmPNET =21.3 dBmPNET =26.5 dBm
CAN as multiple-master logical AND system – dominant (logic L) driver wins.
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In-place waveforms: CAN Rx (High)
Dominant (Logic L) Recessive (Logic H)1.0
2.0
3.0
4.0
0.0 1.0 2.0 3.0 4.0
V OCM_
H(V
)
Time (s)
PNET =36.2 dBm
DPI off PNET =21.5 dBmPNET =26.6 dBmPNET =28.1 dBm
PNET =38.2 dBm
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In-place waveforms: CAN Rx (Low)
1.0
2.0
3.0
4.0
0.0 1.0 2.0 3.0 4.0
V OCM_
L(V
)
Time (s)
Dominant (Logic L) Recessive (Logic H)
PNET =36.2 dBm
DPI off PNET =21.5 dBmPNET =26.6 dBmPNET =28.1 dBm
PNET =38.2 dBm
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In-place waveforms CAN Rx (Differential)Dominant (Logic L) Recessive (Logic H)
-0.0
0.1
0.3
0.5
0.0 1.0 2.0 3.0 4.0
V OCM_
DIFF
(V)
Time (s)
0.6
0.4
0.2
0.0
PNET =36.2 dBm
DPI off PNET =21.5 dBmPNET =26.6 dBmPNET =28.1 dBm
PNET =38.2 dBm
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CAN Rx (High resolution at 1 ns, differential)
0.1
0.3
0.3 0.4 0.6 0.7 0.8
V OCM_
DIFF
(V)
Time (s)
0.4
0.2
0.0
-0.1
0.5
DPI off PNET =34.2 dBm
RecessiveDominantRx
2.3 2.4 2.6 2.7 2.8Time (s)2.5
DPI off PNET =34.2 dBm
0.1
0.3
V OCM_
DIFF
(V)
0.4
0.2
0.0
-0.1
DominantRecessive
Rx glitch due to RF DPI
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ConclusionsRF DPI test for CAN transceiver is extended with on-chip waveform monitoring (OCM).In-place waveforms of CAN circuits exhibit two key susceptibility mechanisms:(1) Large signal common to differential mode transition(2) Glitches due to additional crossings to the threshold level Criteria to IC designs toward EMC compliance: – desensitizing techniques for voltage-mode RF disturbances
IC-level EMC simulation techniques in high demand:“Sensitivity analysis for multi states and even in their transition”“Chip-package-system board interaction”