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網網網網 Class 3 – Data Link Co ntrol Part I 授授授授 授授授 2001/10/09,2001/10/16

網路概論 Class 3 Data Link Control Part I 授課老師 楊人順 2001/10/09,2001/10/16

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-3- Asynchronous Transmission 兩端時鐘 ( 時序脈衝 ) 不需要先作同步,這種方 法是藉由不發送長的或含有中斷的 bit streams 來避免時序混亂 ( 一次 ’ 一口氣 ’ 發送一個字元 ) 。 但是,兩端的時序脈衝不能差太多。 Start bit 每次重新作同步。當沒有字元被傳送時, 介於發送端和接收端之間的線路是處於 “idle” state (“1” state). EIA-232-D defined the negative voltage(-12V) on the line as “idle”. Usually, the character bits ( 資料位元 ) followed by a parity bit.

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Page 1: 網路概論 Class 3  Data Link Control Part I 授課老師 楊人順 2001/10/09,2001/10/16

網路概論Class 3 – Data Link Control Pa

rt I授課老師楊人順

2001/10/09,2001/10/16

Page 2: 網路概論 Class 3  Data Link Control Part I 授課老師 楊人順 2001/10/09,2001/10/16

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Presentation Outlines

• Asynchronous and Synchronous Transmission • Why need data link control ?• Frame synchronization• Line configurations• Flow control• Error Detection Techniques

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Asynchronous Transmission

• 兩端時鐘(時序脈衝)不需要先作同步,這種方法是藉由不發送長的或含有中斷的bit streams 來避免時序混亂(一次’一口氣’發送一個字元)。但是,兩端的時序脈衝不能差太多。• Start bit 每次重新作同步。當沒有字元被傳送時 , 介於發送端和接收端之間的線路是處於 “ idle” state (“

1” state).• EIA-232-D defined the negative voltage(-12V) on the lin

e as “idle”.• Usually, the character bits ( 資料位元 ) followed by a pa

rity bit.

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Asynchronous Transmission

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Synchronous Transmission• More efficient than asynchronous transmission• 時脈同步:兩端時鐘 ( 時序脈衝 ) 需要先作同步,方法有二 :

– 兩端相連有獨立的時脈線路 – 利用加在資料欄位之前或之後的同步信號欄位 (pp.178 figure 6.2)

• Frame Synchronization :– Character-oriented frame

• SYN, a unique bit pattern, ex. 10101 • 不需要 bit stuffing, 因為欄位讀取有先後次序

– Bit-oriented frame • Flag Fields, 在一個 frame 的兩頭,來區隔 frame, ex. 01111110• 需要 bit stuffing, 因為讀取單位是 bit 。

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Why need data link control ?

• Why do we need data link control between two directly connected transmitting-receiving stations ?– Frame Synchronization,– Line configurations,– Flow control,– Error Detection and Forward Error Correction,– Error control and Backward Error Correction,– Addressing, and– Line management

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Line Configuration• Full Duplex and Half Duplex• Point-to-point Links (pp. 179 figure 6.3 (a))

Three distinct phases :– Establishment– Data Transfer– Termination

• Multipoint Links (bus) (pp. 179 figure 6.3 (b))– Polling : Primary asks secondary of whether there are any data the

secondary will send.– Select : Primary informs secondary that have data wish to send.

LAN usually uses the topologies of bus,ring(contention: CSMA/CD or CDMA/CA)

Page 8: 網路概論 Class 3  Data Link Control Part I 授課老師 楊人順 2001/10/09,2001/10/16

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Flow control• Why a sender breaks up a large block of data into

smaller blocks (only the last frame not with the same size) ?– The buffer size of the receiver may be limited.– The longer the transmission, the more likely that there will

be an error , necessitating retransmission of the entire frame. With smaller frames, errors are detected sooner, and a smaller amount of data needs to be retransmitted.

– On a shared medium, such as a LAN, it is usually desirable not to permit one station to occupy the medium for an extended period, thus causing long delays at the other sending stations.

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Flow control (2)• Stop-and-Wait Flow Control

– Frame Transmission Model (pp. 196 figure 7.1)– Link Utilization Concepts

– Stop-and-Wait Link Utilization (pp. 197 figure 7.2)

• Sliding-Window Flow Control– Only if a > 1– Add frame sequence number field with k bits (modulo 2k: 0 to 2k-1

)

aU

TT

a

T

TTT

TT

frameU

ix

p

p

pix

ix

total

ix

211 then , define weIf

Delayn propagatio is where

,2

zation Link Utili

全部傳送週期時間

傳送時間

Page 10: 網路概論 Class 3  Data Link Control Part I 授課老師 楊人順 2001/10/09,2001/10/16

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Sliding-Window Depiction

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Example of a Sliding-Window Protiocol

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Error Detection Technique• Concept

Transmitter

Receiver

E=f(Data)

Data E

E’=f(Data)

Data E

Compare

Data

E, E’ = error-detecting codesF = error-detecting function

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Error Detection Technique (2)

• The three most common techniques:– Parity bit

• Even Parity bit (all bits XOR)• Odd Parity bit (all bits XOR, and then inverse)• Disadvantage : errors with even number of bits can not be

detected.

– Block sum check– Cyclic redundancy check

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Block Sum Check