03 Tt2510eu01al

7/28/2019 03 Tt2510eu01al

1/16

Frame Structure of the Digital Signal Hierarchies 2..4 Siemens

TT2510EU01AL_011

Contents

1 Frame Structure of 8, 34, 140 Mbit/s Hierarchies 3

2 Timing Sequence of the Multiplex Process 11

3 Transmission of Additional Data Channels with Y-Bits 13

Frame Structure of the Digital SignalHierarchies 2..4

7/28/2019 03 Tt2510eu01al

2/16

Siemens Frame Structure of the Digital Signal Hierarchies 2..4

TT2510EU01AL_012

7/28/2019 03 Tt2510eu01al

3/16


TT2510EU01AL_013

1 Frame Structure of 8, 34, 140 Mbit/sHierarchies

7/28/2019 03 Tt2510eu01al

4/16


TT2510EU01AL_014

Alignment word

The frame of all hierarchy levels begin with the frame alignment word (FAW), by

means of which the receiving system (demultiplexer) detects the beginning of theframe and is thus able to interpret the following bit positions correctly. Besides, an in-service-supervision of the incoming signals bit error rate can be performed bycontinuous evaluation of the FAW.

Signaling bits D, N

Immediately after the FAS the signaling bits D and N are transmitted. They provideinformation about the state of the opposite transmission direction. Hereby, urgentalarms (failure) are signaled via the D-bit (remote alarm indication RAI), and non-urgent alarms (interference) via the N-bit. If it is possible to renounce the backward

transmission of non-urgent alarms, the N-bit can be used for the asynchronoustransmission of external data (so-called Y-data channels via V.11 interface).

Blocks TB

Here the signals (tributary bits) of channels 1...4 are transmitted bit-by-bit interleaved.

Blocks JS

These blocks consist of 4 bits and contain the justification service bits of channels1...4. In order to provide a protection against transmission errors, the justification bitsare transmitted in a redundant way and evaluated on the receiving end by majority

decision. The 3 JS blocks (5 at 140 Mbit/s) contain the same information in the biterror-free state. If, due to a transmission error, one of the justification service bits (2at 140 Mbit/s) is wrongly detected, the majority decision nevertheless allows thecorrect evaluation of the following justification bit positions. A wrong interpretation ofthe justification bit position would inevitably result in a desynchronization of theaffected subsystem.

7/28/2019 03 Tt2510eu01al

5/16


TT2510EU01AL_015

10-9 10-8 10-7 10-6 10-5 10-4 10-3 10-2

102

104

106

108

1010

1012

1014

100

1 year

1 day

1 h

3.10-5

(3J)

(2J)

Average time interval between

loss of frame alignment due

to errors, s

Line error rate Pe

Fig. 1

7/28/2019 03 Tt2510eu01al

6/16


TT2510EU01AL_016

Probability of a loss of synchronization depending on the bit error rate

due to

l Loss of the justification information: (2 J) at 8 Mbit/s

(3 J) at 140 Mbit/s

l Loss of the frame alignment: (2) at 8 Mbit/s

(3) at 140 Mbit/s

Block JT

This block contains the justification bit positions (justifying bit or tributary bit) and isintegrated into a TB block. By use respectively non-use of this bit position, thetransmission capacity is matched of the individual channels (as described in theprevious sections).

7/28/2019 03 Tt2510eu01al

7/16


TT2510EU01AL_017

8-Mbit/s-Pulse Frame

Number of bits per block4x212=848 bits

1 10 1112 13 212 1 4 5 212 1 4 5 212 5 8 9

TB (200 bit) TB (208 bit) TB (208 bit) TB (208 bit)JS JS JS

JT

Block I II III IV

ND0000101111

Service

bits

Frame alignment

signal

TB Tributary bits

JS Justification service

bits

JT Justifying bit or

tributory bit

of the 2-Mbit/s-

signals Nr. 1 to 4

bit-by-bit interleaved

1 4

Bitrate: either 8448 kbit/s 3 x 10-5

or 8448 kbit/s 30 ppm

Number of bits per frame: 848Number of tributary bits per frame: 820...824Frame length: 100.38 sNominal justification bitrate: ca. 4.23 kbit/s

Fig. 2

7/28/2019 03 Tt2510eu01al

8/16


TT2510EU01AL_018

34-Mbit/s-Pulse Frame

Number of bits per block4x384=1.536 bits

1 10 1112 13 384 1 4 5 384 1 4 5 384 1 4 5 8 9 384

TB (372 bit) TB (380 bit) TB (380 bit)

JT

Block I II III IV

ND0000101111

Service

bits

Frame alignment

signal

TB Tributary bits

JS Justification service

bits

JT Justifying bit or

tributory bit

8-Mbit/s-signals

Nr. 1 to 4

bit-by-bit interleaved

TB (380 bit) JSJSJS


or 34368 kbit/s 20 ppmNumber of bits per frame: 1536Number of tributary bits per frame: 1508...1512Frame length: 44.69 sNominal justification bitrate: ca. 9.75 kbit/s

Fig. 3

7/28/2019 03 Tt2510eu01al

9/16


TT2510EU01AL_019

140-Mbit/s-Pulse-Frame

Y1

Number of bits per block6x488=2928 bits

1 12 17 488 1 4 5 488 1 4 5 488 1 4

JS JS JS

Block I II III IV

9 488

Frame alignment

signal

TB Tributary bits

JS Justi ficat ion service

bitsJT Justifying bit or

tributory bit

1 4

JS

V

1 4

VI

TB(472 bit)

TB(484 bit)

TB(484 bit)

1 45 85 488 5 488

TB(484 bit)

TB(484 bit)

JS TB(484 bit)

JT

000001011111 Y2ND

Service

bits

13 16


or 139264 kbit/s 15 ppmNumber of bits per frame: 2928Number of tributary bits per frame: 2888...2892Frame length: 21.03 sNominal justification bitrate: ca. 19.93 kbit/s

Fig. 4

7/28/2019 03 Tt2510eu01al

10/16


TT2510EU01AL_0110

In addition to the service bits this frame has two data bits, which can be used for theasynchronous transmission of external data signals with bitrates of up to approx.10 kbit/s.

7/28/2019 03 Tt2510eu01al

11/16


TT2510EU01AL_0111

2 Timing Sequence of the Multiplex Process

0

T

1 1 1

J

00 0

Tcontent of the justification

bit position JT

justification service bitposition JS

T: occupied with tributary signal

J: occupied with justification bit

1: Justification bit in following JTposition

0: Tributary bit in following JT

position

JS/JT FAS JS JS JS/JT FAS JS JS JS FAS

Address difference bit

Frame

3

4

5

6

N N+1 N+2

Fig. 5 Time sequence of the address difference in the elastic store depending on the frame structure

7/28/2019 03 Tt2510eu01al

12/16


TT2510EU01AL_0112

The figure shows an example of the time sequence of the address differencebetween write in respect. read out address of the elastic store along several frames.The rising edges (reduction of the distance between addresses) occur in the tributary

information blocks, i.e. when the store is read out. Every time if no tributaryinformation is transmitted (with JS, FAS) the read out process is interrupted (1 clockat JS, 3 clock at FAS) and the difference between the addresses increasesaccordingly (1 address at JS, 3 addresses at FAS). Despite of these interruptions ofthe read out process, the actual read out timing frequency is higher than the write infrequency.

The necessity of the justification is determined in frame Nr. N (getting below thedifference of 3 bits). Then all justification service bits (JS) of the affected channel areset to 1 in frame N + 1.

When the justification bit position (JT) in frame N + 1 is reached, the read-out

address is stopped during one clock cycle ; the transmitted bit is interpreted asjustification bit and the difference between the addresses increases by one address.

Example:

Let us look at a multiplex system 2/8 Mbit/s and at the structure of the 8 Mbit frame.The nominal write in frequency is fE = 2048 kHz. The elastic store is read out duringthe tributary information blocks with one fourth of the system clock:

fP = 8448 kHz/4 = 2112 kHz

This read out clock is interrupted by the JS, FAS blocks. The actual read out rateresults from the relation of tributary bits per frame to the overall number of bits:

kHzbits

bitskHzf

M23.2052

848

8242112 ==

The nominal justification bitrate fj can be calculated from the difference between fM

and fE.

fj = 2052.23 kHz - 2048 kHz = 4.23 kHz

7/28/2019 03 Tt2510eu01al

13/16


TT2510EU01AL_0113

3 Transmission of Additional Data Channelswith Y-Bits

7/28/2019 03 Tt2510eu01al

14/16


TT2510EU01AL_0114

With the frame of the 8 and 34 Mbit/s hierarchy the N-alarm bits can be used fortransmission of external data channels. The 140 Mbit/s frame has two speciallydesigned bit positions (so-called Y-bits) for this purpose. The bitrate for one Y-bit

corresponds to the frame clock.This bitrate cannot be used for the external signal, as for this a synchronization to theframe clock would be necessary. Therefore, the maximum allowable bitrate for theexternal data signal is restricted to approx. one fifth of the Y-bitrate. One bit of thesignal to be transmitted is then sampled several times by the Y-bits (Oversampling).

The distortion of the transmitted signal results from the relation of the Y-bitrate to thebitrate of the signal to be transmitted.

7/28/2019 03 Tt2510eu01al

15/16


TT2510EU01AL_0115

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

original

signal

Y-bits

reproduced

signal

0 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 0

Fig. 6

7/28/2019 03 Tt2510eu01al

16/16


TT2510EU01AL 0116

Documents

03 Tt2510eu01al