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ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

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Page 1: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ARMSession 2

2012, Spring

Copyright © 2012 Mohammad Moallemi

Page 2: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

مبدل آنالوگ به ، ADCدیجیتال

ه�اي س�يگنال و DCاص�وال ديجيت�ال ص�ورت دو ب�ه آنالوگ وجود دارند.

و خ�اص مق�ادير ب�ا فق�ط ديجيت�ال ه�اي س�يگنال در گسسته سروکار داريم.

در س�يگنال ه�اي آن�الوگ ب�ه ازاي دو مق�دارa و b تم�امي نيز مي توانند وجود داشته باشند .b تا aمقادير

ه�اي سيس�تم در ه�ا, س�يگنال ن�وع اين ب�ا ک�ار براي ديجيت�ال , ابت�دا باي�د آنه�ا را ب�ا مق�ادير گسس�ته )ديجيت�ال(

متناظر کرد . ه�ائز زي�ر فاکتوره�اي ديجيت�ال ب�ه آن�الوگ تب�ديل در

اهميت هستند:دقتسرعتمحدوده ولتاژ

Page 3: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ADC Pins

PB27 AD0PB28 AD1PB29 AD2PB30 AD3PIN3 AD4PIN4 AD5PIN5 AD6PIN6 AD7

Page 4: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ADC Registers

Page 5: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ADC Control Register

Page 6: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ADC Mode Register

Page 7: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ADC Mode Register

PRESCAL: Prescaler Rate Selection

ADCClock = MCK / ( (PRESCAL+1) * 2 ) STARTUP: Start Up TimeStartup Time = (STARTUP+1) * 8 /ADCClock SHTIM: Sample & Hold

TimeSample & Hold Time = SHTIM/ADCClock

Page 8: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ADC Channel Register

Page 9: ARM Session 2 2012, Spring Copyright © 2012 Mohammad Moallemi

ADC Data Register

DATA: Converted DataThe analog-to-digital conversion data is placed into this register at the end of a conversion and remains until a new conversion is completed. The Convert Data Register (CDR) is only loaded if the corresponding analog channel is enabled.