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ACCESS IC LAB Graduate Institute of Electronics Engineering, NTU CH1 Number Systems and Conversion CH1 Number Systems and Conversion Lecturer:吳安宇 Date2005/9/23

CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

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Page 1: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

ACCESS IC LAB

Graduate Institute of Electronics Engineering, NTU

CH1 Number Systems and ConversionCH1 Number Systems and Conversion

Lecturer:吳安宇Date:2005/9/23

Page 2: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.2

OutlineOutlinevDigital Systems and Switching CircuitsvNumber Systems and ConversionvBinary ArithmeticvRepresentation of Negative Numbers

Addition of 2’s Complement NumbersAddition of 1’s Complement NumbersvBinary Codes

Page 3: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.3

PurposePurposev Design a switching network (Logic Function)

:Binary number{ }1,0∈iX { }1,0∈iZ

Page 4: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.4

OutlineOutlinevDigital Systems and Switching CircuitsvNumber Systems and ConversionvBinary ArithmeticvRepresentation of Negative Numbers

Addition of 2’s Complement NumbersAddition of 1’s Complement NumbersvBinary Codes

Page 5: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.5

Number System and ConversionNumber System and Conversionv Decimal (Base 10) Number:

953.7810(210.-1-2)

= 9*102 + 5*101 + 3*100 + 7*10-1 +8*10-2

v Binary (Base 2) Number:1011.112(3210.-1-2)

= 1*23 + 0*22 + 1*21 + 1*20 + 1*2-1 + 1*2-2

= 8 + 0 +2 +1+1/2 +1/4= (11.75)10

Page 6: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.6

Generalized Representation of an Generalized Representation of an Positive integer N with Base (Radix) RPositive integer N with Base (Radix) R::

0123456789ABCDEF10

01234567

101112131415161720

011011

10010111011110001001101010111100110111101111

10000

0123456789

10111213141516

Firstseventeenpositiveintegers

0,1,2,3,4,5,6,7,8,9,A,B,C,D,

E,F

0,1,2,3,4,5,6,7,0,10,1,2,3,4,5,6,

7,8,9Digits

168210Radix

HexadecimalOctalBinaryDecimalName

Page 7: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.7

Generalized Representation of an Positive Generalized Representation of an Positive integer N with Base (Radix) Rinteger N with Base (Radix) R::

v N= (a4 a3 a2 a1 a0 . a-1 a-2 a-3)R= a4*R4 + a3*R3 + a2*R2 + a1*R1 + a0*R0

+ a-1*R-1 + a-2*R-2 + a-3*R-3

v EX:R=8 , Digits = { 0,1,2,3,4,5,6,7 }(147.3)8 = 1*82 + 4*81 + 7*80 + 3*8-1

= (103.375)10

v EX:R=16, Digits = { 0,1,2,...,A,B,C,D,E,F }(A2F)16 = 10*162 + 2*101 + F*160

= (2607)10

Page 8: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.8

Integer Conversion using Integer Conversion using ““Division MethodDivision Method””

Page 9: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.9

Integer Conversion using Integer Conversion using ““Division MethodDivision Method””

v EX:Convert (53)10 to Binary no.

MSB

(53)10 = (110101)2

MSB

Page 10: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.10

Fi:Fraction Number

Conversion of A Decimal Fraction Conversion of A Decimal Fraction Using Using ““Successive MultiplicationSuccessive Multiplication””

Page 11: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.11

v EX:Convert (0.625)10 to Binary no.

(0.625)10 = (0.101)2

Conversion of A Decimal Fraction Conversion of A Decimal Fraction Using Using ““Successive MultiplicationSuccessive Multiplication””

Page 12: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.12

Conversion of A Decimal Fraction Conversion of A Decimal Fraction Using Using ““Successive MultiplicationSuccessive Multiplication””

v EX:Convert (0.7)10 to Binary no.

Repeated Process 1.6, 1.2, 0.4, 0.8

(0.7)10 = 0.0 0110 0110 0110 …… (Base2)

No exact conversion !!!

Page 13: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.13

ConversionConversionv EX:Convert (231.3)4 to Base 7 number

(231.3)4 = 2*42 + 3*41 + 1*40 + 3*4-1 = (45.75)10

ØInteger ØFraction

(45.75)10= (63.51 51 51 ……)2

Page 14: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.14

ConversionConversionvConversion from Binary (Base 2)vto Octal (Base 8)vto Hexadecimal (Base 16)

(11010111110.0111)2 = (3276.14)8

(11010111110.0011)2 = (6BE.3)16

3 2 7 6 1 4(補0)

6 B E 3 Binary point ( R=2 )

Hexadecimal point

decimal point (R=10)

Page 15: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.15

OutlineOutlinevDigital Systems and Switching CircuitsvNumber Systems and ConversionvBinary ArithmeticvRepresentation of Negative Numbers

Addition of 2’s Complement NumbersAddition of 1’s Complement NumbersvBinary Codes

Page 16: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.16

Binary ArithmeticBinary Arithmeticv Additionv 0 + 0 = 0v 0 + 1 = 1v 1 + 0 = 1v 1 + 1 = 10 (sum 0 & carry 1)

v EX:

Page 17: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.17

Binary ArithmeticBinary Arithmeticv Subtractionv 0 – 0 = 0v 1 – 0 = 1v 1 – 1 = 0v 0 – 1 = 1 (with borrow 1 from next column)

v EX:

Page 18: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.18

Binary ArithmeticBinary ArithmeticvMultiplicationv 0 * 0 = 0v 0 * 1 = 0v 1 * 0 = 0v 1 * 1 = 1

v EX:(13)10

(11)10

copy of multiplicand

Page 19: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.19

Binary ArithmeticBinary Arithmeticv Division

Page 20: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.20

OutlineOutlinevDigital Systems and Switching CircuitsvNumber Systems and ConversionvBinary ArithmeticvRepresentation of Negative Numbers

Addition of 2’s Complement NumbersAddition of 1’s Complement NumbersvBinary Codes

Page 21: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.21

Signed Number RepresentationSigned Number Representation

S Magnitude

signed bit

Page 22: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.22

Singed Magnitude NumbersSinged Magnitude Numbersv N = (an-1 an-2 ……a1 a0)r

N = ( s an-1 an-2 ……a1 a0)rsm

v EX:

N = -(13)10 = -(1101)2 = (1,1101)2sm

±

s = 0 if N 0

s = 0 if N 0≥≤

sign magnitude

Page 23: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.23

Radix ComplementRadix ComplementvDef. The “radix complement [N]” of a number

(N)r is defined as

[N]r = rn – (N)r

where n is the number of digits in (N)r

vThe largest positive number (positive full scale) = rn-1 – 1vThe most negative number (negative full

scale) = - rn-1

Page 24: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.24

22’’s Complements Complement[N]2 = 2n – (N)2

v EX:2’s complement of (N)2 = (01100101)2

[N]2 = [01100101]2= 28 – (01100101)2= (100000000)2 – (01100101)2= (10011011)2

v EX:show that (N)2 + [N]2 = 0011001011001101100000000

(carry)

+1 [N]2 = - (N)2

Page 25: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.25

22’’s Complements ComplementvEX:check (N)2 = [ [N]2 ]2 (by yourself)

vEX:2’s complement of (N)2 = (10110)2 for n=8

[N]2 = 28 – (01100101)2= (100000000)2 – (10110)2= (11101010)2

Page 26: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.26

22’’s Complements Complementv Convert (N)2 to [N]2:way 1

N = 0 1 1 0 0 1 0 1

[N]2 = 1 0 0 1 1 0 1 1

N = 1 1 0 1 0 1 0 0

[N]2 = 0 0 1 0 1 1 0 0

First nonzero digit

First nonzero digit

Page 27: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.27

22’’s Complements Complementv Convert (N)2 to [N]2:way 2

N = 0 1 1 0 0 1 0 1 1 0 0 1 1 0 1 0 complement the bits

1 add 11 0 0 1 1 0 1 1

→→

→1001

,kk aa then add 1

Page 28: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.28

22’’s Complements Complement

0,11110,11100,11010,11000,10110,10100,10010,10000,01110,01100,01010,01000,00110,00100,00010,0000

(1,1111)

0,11110,11100,11010,11000,10110,10100,10010,10000,01110,01100,01010,01000,00110,00100,00010,0000

0,11110,11100,11010,11000,10110,10100,10010,10000,01110,01100,01010,01000,00110,00100,00010,0000

(1,0000)

+15+14+13+12+11+10+9+8+7+6+5+4+3+2+10

One’s Complement System

Two’s Complement System

Sign Magnitude BinarySigned Decimal

for n = 5

Page 29: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.29

22’’s Complements Complement

1,11101,11011,11001,10111,10101,10011,10001,01111,01101,01011,01001,00111,00101,00011,0000--------

1,11111,11101,11011,11001,10111,10101,10011,10001,01111,01101,01011,01001,00111,00101,00011,0000

1,00011,00101,00111,01001,01011,01101,01111,10001,10011,10101,10111,11001,11011,11101,1111--------

-1-2-3-4-5-6-7-8-9-10-11-12-13-14-15-16

One’s Complement System

Two’s Complement System

Sign Magnitude BinarySigned Decimal

for n = 5

Page 30: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.30

22’’s Complements Complementv EX:2’s complement of –(13)10 for n = 8

(13)10 = (1011)2 = (00001101)2-(00001101)2 = [00001101]2 = (11110011)2

v EX:Determine the decimal no. of N=(1,1111,1010)2

1111010 (?) (-6)0000110 (6)

Page 31: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.31

Radix Complement ArithmeticRadix Complement Arithmeticv EX:compute (9)10 + (5)10 for 5-bit 2’s complement

0 1 0 0 1 (+9)+ 0 0 1 0 1 (+5)

0 1 1 1 0 (+14)v EX:compute (12)10 + (7)10

0 1 1 0 0 (+12)+ 0 0 1 1 1 (+7)

1 0 0 1 1 (-13)v EX:compute (12)10 – (5)10 = (12) + (-5)

0 1 1 0 0 (+12)+ 1 1 0 1 1 (2’s complement of (5)2)1 0 0 1 1 1 (+7)

discard the carry

Add two positive no. and obtain a negative no.(overflow occurs!)

Page 32: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.32

Radix Complement ArithmeticRadix Complement Arithmeticv EX:(-9) – (5) = (-9) + (-5)

9 = 0 1 0 0 1 à -9 = 1 0 1 1 15 = 0 0 1 0 1 à -5 = 1 1 0 1 1

1 0 1 1 1 à (-9)+ 1 1 0 1 1 à (-5)1 1 0 0 1 0 à (-14)

discard (why?)v EX:(-12) – (5) = (-12) + (-5)

1 0 1 0 0 à (-12)+ 1 1 0 1 1 à (-5)1 0 1 1 1 1 à (+15) (overflow occurs)

Page 33: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.33

Radix Complement ArithmeticRadix Complement Arithmetic

x+ ˇ--

+ˇx+-

-ˇx-+

x-ˇ++

A-BA+BBA

ˇ:overflowx :no overflow

Page 34: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.34

Diminished Radix ComplementDiminished Radix Complementv 1’s complement

v EX: 1 0 1 1 0 1 0 0 (N)2

0 1 0 0 1 0 1 1 1’s complement of (N)2

→→

→1001

,kk aa

Page 35: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.35

Addition of 1Addition of 1’’s Complement Numberss Complement Numbersv“End-around carry” : vInstead of discarding the last carry (as in 2’s

complement), it is added to the n-bit sum in the position furthest to the right.

Page 36: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.36

Addition of 1Addition of 1’’s Complement Numberss Complement NumbersvAddition of positive & negative numbers

(a)+5 0101-6 1011-1 1110 (correct)

(b)-5 1010

+6 0110+1 1 0000

1 (end-around carry)0001 (correct, no overflow)

Page 37: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.37

Addition of 1Addition of 1’’s Complement Numberss Complement Numbersv Adding two negative numbers

(a) -3 1100-4 1011-7 1 0111

1 (end-around carry)1000 (-7) (correct, no overflow)

(b) -5 1010-6 1001

-11 1 00111 (end-around carry)

0100 (wrong, overflow!!)

Page 38: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.38

Addition of 1Addition of 1’’s Complement Numberss Complement Numbersv EX:Addition for a word-length of 8

(a) (-11) + (-20) in 1’s complement+11 = 00001011 ßà (-11) = 11110100+20 = 00010100 ßà (-20) = 11101011

(1)110111111

(+31) 00011111 11100000 (-31)

(b) (-8) + (+19) in 2’s complement11111000 (-8)00010011 (+19)

(1)00001011 (+11)discard the last carry

Page 39: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.39

11’’s & 2s & 2’’s Complements Complementv2’s complement is the main streamvcheck SIGN for the overflow!

(+) + (+) à (-)

(-) + (-) à (+)overflow!!

Page 40: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.40

OutlineOutlinevDigital Systems and Switching CircuitsvNumber Systems and ConversionvBinary ArithmeticvRepresentation of Negative Numbers

Addition of 2’s Complement NumbersAddition of 1’s Complement NumbersvBinary Codes

Page 41: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.41

Binary CodesBinary Codesv BCD (Binary Coded Decimal) codesv EX: 1 9 8 9

0001 1001 1000 1001

5: 01016: 01107: 01118: 10009: 1001

0: 00001: 00012: 00103: 00114: 0100

Page 42: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.42

Binary CodesBinary Codesv ASCII codes

keyboard à computer

4469676974616C

1000100110100111001111101001111010011000011101100

Digital

Hexadecimal CodeBinary Code Character

Encode the word Digital in ASCII code, representing each character by two hexadecimal digits

Page 43: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.43

Binary CodesBinary Codesv ASCII character code

000~111 (c6c5c4)

0000~1111(c3c2c1c0)

Page 44: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.44

Binary Codes for Decimal DigitsBinary Codes for Decimal Digits

Page 45: CH1 Number Systems and Conversionaccess.ee.ntu.edu.tw/course/logic_design_94first...Graduate Institute of Electronics Engineering, NTU 台灣大學吳安宇教授 pp.5 Number System

Graduate Institute of Electronics Engineering, NTU

台灣大學 吳安宇 教授 pp.45

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