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www.vuse.vanderbilt.edu
Moore’s Law and Radiation Effectson Microelectronics
Dan FleetwoodLandreth Professor of Engineering
Professor of EE; Professor of PhysicsChair, EECS Department
Work at Vanderbilt supported in part by the US Department of Defense and NASA
Outline
• Moore’s Law (1965 - ?)
– Scaling trends
– Status
• Radiation Effects
– Effects of Moore’s Law scaling
• Total ionizing dose
• Single event effects
– Potential limits to future scaling
Image, © 2005,
Intel Corp.
G. E. Moore, “Cramming more components onto integrated circuits,” Electron., vol. 38, no. 8, pp. 114–117, Apr. 1965.
https://upload.wikimedia.org/wikipedia/commons/0/00/
Transistor_Count_and_Moore%27s_Law_-_2011.svg
http://www.extremetech.com/extreme/203490-moores-law-is-dead-long-live-moores-law
• More and more powerful computers still being built
• Replacement cycle is currently increasing
• Increasing costs; diminishing returns
• Consistent with a maturing technology
http://top500.org/blog/slides-highlights-of-the-45th-top500-list/
https://www.top500.org/statistics/perfdevel/
Rank Site System Cores Rmax (TFlop/s) Rpeak (TFlop/s)Power (kW)
1 National Supercomputing Center in Wuxi China
Sunway TaihuLight - Sunway MPP, Sunway SW26010 260C 1.45GHz,
Sunway NRCPC 10,649,600 93,014.6 125,435.9 15,371
2 National Super Computer Center in Guangzhou, China
Tianhe-2 (MilkyWay-2) - TH-IVB-FEP Cluster, Intel Xeon E5-2692 12C 2.200GHz,
TH Express-2, Intel Xeon Phi 31S1P NUDT 3,120,000 33,862.7 54,902.4 17,808
3 DOE/SC/Oak Ridge National Laboratory United States
Titan - Cray XK7 , Opteron 6274 16C 2.200GHz, Cray Gemini interconnect, NVIDIA K20x
Cray Inc. 560,640 17,590.0 27,112.5 8,209
4 DOE/NNSA/LLNL United States
Sequoia - BlueGene/Q, Power BQC 16C 1.60 GHz, Custom
IBM 1,572,864 17,173.2 20,132.7 7,890
5 DOE/SC/LBNL/NERSC United States
Cori - Cray XC40, Intel Xeon Phi 7250 68C 1.4GHz, Aries interconnect
Cray Inc. 622,336 14,014.7 27,880.7 3,939
6 Joint Center for Advanced High Performance Computing Japan
Oakforest-PACS - PRIMERGY CX1640 M1, Intel Xeon Phi 7250 68C 1.4GHz, Intel Omni-Path
Fujitsu 556,104 13,554.6 24,913.5 2,719
7 RIKEN Advanced Institute for Computational Science (AICS) Japan
K computer, SPARC64 VIIIfx 2.0GHz, Tofu interconnect
Fujitsu 705,024 10,510.0 11,280.4 12,660
8 Swiss National Supercomputing Centre (CSCS) Switzerland
Piz Daint - Cray XC50, Xeon E5-2690v3 12C 2.6GHz, Aries interconnect , NVIDIA Tesla P100
Cray Inc. 206,720 9,779.0 15,988.0 1,312
9 DOE/SC/Argonne National Laboratory United States
Mira - BlueGene/Q, Power BQC 16C 1.60GHz, Custom
IBM 786,432 8,586.6 10,066.3 3,945
10 DOE/NNSA/LANL/SNL United States
Trinity - Cray XC40, Xeon E5-2698v3 16C 2.3GHz, Aries interconnect
Cray Inc. 301,056 8,100.9 11,078.9 4,233
Top 10 Supercomputers
https://www.top500.org/list/2016/11/
Highlights from the Overall List
• The number of systems installed in China increased to 171, compared to 168 on the
last list. China now shares the No. 1 spot with the USA after one year at the top spot.
• China and the USA are neck-and-neck in the performance category with the USA
holding 33.9% of the overall installed performance while China is second with 33.3%
of the overall installed performance.
• The number of systems installed in the USA made a slight recovery and is now at
171 systems, up from from 165 in the previous list.
• The overall list-by-list growth rates of performance continues to recover after
historical low values in the past 4 years.
• The growth of the average performance of all systems in the list has slowed since
2013 as well and has also dropped to about 55 percent per year.
• There are 117 systems with performance greater than a Pflop/s on the list, up from
95 six months ago.
• In the Top 10, the No. 2 system, Tianhe-2, the No. 5 Cori and the No. 6 Oakforest-
PACS use Intel Xeon Phi processors to speed up their computational rates. The No.
3 system Titan and the No. 8 system Piz Daint are using NVIDIA GPUs to accelerate
computation.
https://www.top500.org/lists/2016/11/highlights/
Moore’s Law Scaling
http://ieeexplore.ieee.org/ieee_pilot/artic
les/96jproc02/96jproc02-levi/article.html
http://electroiq.com/blog/2010/03/integrating-high-k/
http://cdn.phys.org/newman/gfx/news/hires/Nearthresholdcomputing.jpg
Reducing operating voltage
means less noise margin
Radiation Effects in Space
jpl.nasa.gov http://space-env.esa.int/index.php/ESA-ESTEC-Space-
Environment-TEC-EES/articles/EPT_first_results.html
• Total ionizing dose (charge trapping in insulators)
• Single event effects (currents in semiconductors)
• Displacement damage (lattice disorder)
JRS
7/94-31
IONIZING RADIATION CREATES OXIDE- AND
INTERFACE-TRAP CHARGE IN MOS DEVICES
After F. B. McLean and T. R. Oldham, HDL Report HDL-TR-2129 (1987)
H species also critical
To damage process
Oxide Thickness
J. M. Benedetto et al., IEEE Trans. Nucl. Sci.,
vol. 32, 3916 (1985).
Interface traps scale similarly: N. S. Saks et
al., IEEE Trans. Nucl. Sci. 33, 1185 (1986)
Total-Dose Hardness of
Commercial CMOS ICs Has
Generally Improved with
Moore’s Law Scaling
P. E. Dodd, et all, IEEE Trans. Nucl. Sci.
vol. 57, 1747 (2010).
EECE 304: Lecture 1, 1/9/12
Gate Ox
Silicon
Poly
Trench
Hardness of Commercial CMOS Technologiesis Limited by Field Oxide Leakage
• Much thicker than gate oxides (200 to 1000 nm)
• May cause IC failure at total doses as low as 5 krad(SiO2)
• Positive charge inverts p-type surfaces next to the field oxide, creating a leakage path between the source and drain of a transistor
n+n+
p+p+
STI
polysilicon
substrate
STI
BOX
Trench EdgeLeakage Path
Electron Concentration (cm–3)
After M. R. Shaneyfelt, et al., IEEE Trans. Nucl. Sci., 45, 2584, Dec. 1998
http://www.extremetech.com/computing/162376-7nm-5nm-3nm-the-new-materials-and-transistors-that-will-take-us-to-the-limits-
of-moores-law
Borrowed from
Applied Materials
Fin width
Threshold voltage shifts are
smaller for narrower FinFETs
Subthreshold swing shifts are
smaller for narrower FinFETs
FW = 40
nm
FW = 65 nm
FW = 80 nm
Gate Voltage (Vgs)
TID Response Changes with Fin Width
(especially for High-K gate oxides)
F. El Mamouni, et al., IEEE Trans. Nucl. Sci. 56, 3250 (2009).
Ge pMOS FinFETs: 7 or 10 nm node?
0 200 400 600 800 1000-50
-40
-30
-20
-10
0
10
20
20 nm 36 nm
40 nm 75 nm
100 nm
V
th (
mV
)
Total Dose (krad(SiO2))
FinL=500 nm GL=66 nm
TID@ VG=-1V, V
D=V
S=V
B=0V
(a)
0 200 400 600 800 1000103
104
105
106
FinL=500 nm GL=66 nm
TID@ VG=-1V, V
D=V
S=V
B=0V
20 nm 36 nm
40 nm 75 nm
100 nm
ON
/OF
F R
atio
Total Dose (krad(SiO2))
(c)
Fabricated at imec; tested at Vanderbilt (10-keV X-rays, VGS = -1 V)
E. X. Zhang, et al., IEEE Trans. Nucl. Sci., vol. 64, no. 1, Jan. 2017
Single Event Effects
The track of ionized carriers created by a high energy ion can perturb
the depletion region traversed by the path, leading to enhanced
collection via drift processes – leads to bit flips, logic errors, and even
destruction of the chip if currents are high enough.
Illustration is for a ~ µm scale sized device.
(J. R. Schwank, 1994 NSREC Short Course.)
SEU and SET Issues Generally More Challenging for Space Electronics with Scaling
Many newer ICs also exhibit complex failure modes such as single-event functional interrupts (SEFIs) that may require device reconfiguration or reset for recovery.
P. E. Dodd, et al., IEEE Trans. Nucl. Sci., vol. 57, 1747, Aug. 2010
Scaling Trend
Devices in 2017 are more 3-dimensional, more
complex, and include more kinds of materials
than devices up to ~2000
• Ion-material triggered nuclear reactions in non-silicon
material (especially high-Z) near the sensitive volume
contribute to soft errors
http://images.dailytech.com/nimage/4621_21476.jpg
R. A. Reed et al., IEEE Trans. Nucl. Sci., vol. 54, 2312 (2007)
2 GeV/u Fe - Reaction in the
SiW Si
e-
d
Fe
p
ion
n
2 GeV/u Fe - Reaction in the Si
R. A. Weller, et al., IEEE Trans. Nucl. Sci., vol. 57, no. 4, 1726. Aug. 2010
SRAM used on NASA
MESSENGER spacecraft
• Observed Average SEU
Rate:
– 1x10-9 Events/Bit/Day
• Vendor predicted rate using
CREME96:
– 2x10-12 Events/Bit/Day
– Classical Method nearly a
factor 500 lower than observed
rate
Using MRED to Calculate Effects of Nuclear Interactions
on the SEU Rate for a Modern RAD-HARD SRAM
R. A. Reed et al., IEEE Trans. Nucl. Sci., vol. 54, 2312 (2007)
Review article: R. A. Reed, R. A. Weller, M. H. Mendenhall, D. M. Fleetwood, K. M. Warren, B. D. Sierawski, M. P.
King, R. D. Schrimpf, and E. C. Auden, “Physical processes and applications of the Monte Carlo radiative energy
deposition (MRED) code,” IEEE Trans. Nucl. Sci., vol. 62, no. 4, pp. 1441-1461, Aug. 2015.
Single Event Effects Challenges
in Highly Scaled (nano dimension) ICs
Complicated charge-collection volumes Ion tracks larger than device sizes
Overlayers affect device response One event may affect multiple cells
http://www.aerospace.org/wp-content/uploads/conferences/MRQW2015/6A_Schrimpf.pdf
Additional details on SEE scaling
http://www.aerospace.org/wp-content/uploads/conferences/MRQW2015/6A_Schrimpf.pdf
Additional details on SEE scaling
From MRQW 2015 …
Institute for Space and Defense Electronics Vanderbilt Engineering
Terrestrial Environment
Cosmic rays create showers (“zoo”) of secondary particles in the atmosphere
Neutrons are known to cause bit flips and logic errors, due to nuclear interactions in the Si chip
Muons are one of the most abundant particles at sea level
Neutrons:
13 cm2hr
-1for E > 10 MeV
Muons:
60 cm2hr
-1for E > 260 MeV
B. D. Sierawski, et al., IEEE Trans. Nucl. Sci., vol. 57, no. 6, 3273, Dec. 2010.
SRAM Soft Error Rate Scaling Trend:
Terrestrial Neutrons
6T SRAMs
1 FIT (Failure in Time) = 1 error in 109 hours.
SRAM SER at 90 nm:777 FIT/Mbit
One failure per bit per 1.3 x 1012 hours
One failure per Gbit per 1.3 x 103 hours
One failure per Tbit per 1.3 hours
One failure per Pbit every 5 seconds
Scaling Trend
P. E. Dodd, et al., IEEE Trans. Nucl. Sci., vol. 57, 1747, Aug. 2010
Institute for Space and Defense Electronics Vanderbilt Engineering
Muons can also cause upsets in electronics
Observed at TRIUMF
in Vancouver, BC
B. D. Sierawski, et al., IEEE
Trans. Nucl. Sci., vol. 57, no. 6,
3273, Dec. 2010.
Smaller feature sizes and
lower supply voltages
mean more sensitivity to
single particle effects in
space and on Earth
EECE 304: Lecture 1, 1/9/12
Displacement Damage
G. P. Summers
1992 IEEE NSREC
Short Course
Historically, mainly an issue for solar cells, CCDs, bipolar and
other minority carrier devices – but for nanostructures??
Nanoscale transistor
in integrated circuit
Conclusions• Moore’s Law scaling has profoundly influenced
microelectronics radiation response
– Generally has improved total ionizing dose response
– More difficulties for single event effects
• Future IC scaling is limited by radiation effects
– Noise margin (terrestrial neutrons and muons)
– Lost bits (displacement damage)
Acknowledgments: P. E. Dodd, R. A. Reed, R. D. Schrimpf, J. R. Schwank,
R. A. Weller, E. X. Zhang
