26
ECE 486/586 Computer Architecture Lecture # 1 Spring 2015 Portland State University

ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Embed Size (px)

Citation preview

Page 1: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

ECE 486/586

Computer Architecture

Lecture # 1

Spring 2015

Portland State University

Page 2: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

When and Where?

• When: Tuesdays and Thursdays 7:00 - 8:50 PM

• Where: Willow Creek Center (WCC) 312

• Office hours: Tuesday and Thursday after class, or by appointment

• TA: Yafei Yang (yafei at pdx dot edu)

• Webpage: http://ece.pdx.edu/~zeshan/ece586.htm

• Go to the course webpage for:

– Class slides

– Course syllabus

– Course schedule

– Homework assignments and solutions

Page 3: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Course Information

• Textbook: Computer Architecture: A Quantitative Approach, 5th Edition, John L. Hennessy and David A. Patterson. Morgan Kauffman, 2011. ISBN 9780123838728

• Supplemental materials (papers, articles, tutorials) for certain topics will be provided by the instructor

• We’ll also cover research papers and articles published in computer architecture conference/journals

– Homework assignments may require paper reading

Page 4: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Expected Background

• ECE485/585 or equivalent

– Basic knowledge of computer organization (processor, memory, I/O)

– Design of a simple uniprocessor

– Basic knowledge of instruction set architecture

– Programming experience in a high-level language (for example, C or C++) needed for course project

• If you lack some of this background, please refer to “Computer Organization and Design: The Hardware/Software Interface”, 4th Edition, Hennessy and Patterson

Page 5: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Grading Policy

• Homeworks 20% – 4 homework assignments, each worth 5%

• Class Project 20% • Midterm Exam 25% • Final Exam 35% • Grading scale (tentative): A: 92-100% A-: 87-91.5% B+: 83-86.5% B: 79-82.5% B-: 75-78.5% C+: 71-74.5% C: 67-70.5% C-: 63-66.5% D+: 59-62.5% D: 55-58.5% D-: 50-54.5% F: Below 50%

Page 6: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Other Policies

• All homework assignments due in class. No extensions – Electronic homework submission (via e-mail to instructor) allowed – Submission must be received before the class start time

• Midterm exam in class during week 6

– Tuesday, May 5, 7:00 – 8:30 PM

• Final exam will cover entire course with more emphasis on material taught after the midterm exam

• Final project will require simulation of architecture features in software. More details will be provided later

Page 7: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Interactive Lectures

• Interaction reinforces the learning process

• Please raise your hand and ask if something is not clear

– No question is stupid or trivial

– No confusion is small or unimportant

– Don’t think everybody else gets it except you

– If you didn’t get it then probably some others didn’t either

• By asking for clarification, you are helping everyone!

This course builds upon itself, so if something is not clear please ask right away or you will not understand later lectures

Page 8: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

What this course is all about?

Computer Architecture =

Instruction Set Architecture + Computer Organization +

Computer Hardware

Page 9: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Computer Architecture Definitions

• Instruction Set Architecture (ISA): Set of instructions visible to the programmer, boundary between hardware and software

• Computer Organization (or Microarchitecture): High-level aspects and structure of the computer

• Computer Hardware: Detailed logic design, packaging, process technology

Page 10: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Computer Architecture Definitions (cont.)

• Historically, the term computer architecture referred to ISA, Currently, hardware and organization matter more than ISA

Examples:

• Same ISA, different organization – AMD Opteron and Intel Core i7

• Both implement x86 ISA but have very different pipelines and cache organizations

• Same ISA, different hardware – Intel Core i7 and Intel Xeon 7560

• Both implement x86 ISA and have nearly identical organizations

• But offer different clock rates and different memory systems

Page 11: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Why study Computer Architecture?

Answer # 1: Technology advancements require constant re-optimization of cost/power/performance

Technology Annual Improvement

Transistor Count 25%

Transistor Speed 20-25%

DRAM Density 60%

DRAM Speed 4%

Disk Density 25%

Disk Speed 4%

Page 12: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Why study Computer Architecture?

Answer # 2: Innovation needed to continue existing trends

• Moore’s law – Original version: Transistor scaling exponential

– Popular version: Processor performance doubling every 18 months

• Initially transistor counts limited performance – ~ 35% performance improvement per year

• Now, larger transistor counts enable advanced microarchitectures – ~ 50% growth per year

– Added growth due to implementation/organization

Page 13: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Why study Computer Architecture?

Answer # 3: Changing user requirements demand new technologies and architectures

• Example: Portability Longer batter life Energy-efficient architectures

• Previously infeasible solutions become high-volume products! – Portable computing

– Touch-based interfaces

– Virtual reality

– Data mining

– Gesture recognition

Page 14: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Course Topics

• Technology and Economics of Computer Design

• Measuring, reporting and summarizing computer performance

• Instruction set architectures

• Processor datapath and pipelining

• Instruction-level parallelism

• Branch Prediction

• Advanced topics in processor architecture

Page 15: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

History of Processor Performance

Page 16: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Performance Contributors

• Process technology + architectural enhancements 17 years of sustained performance growth at a rate of > 50% per year – ~ 35% per year from process technology and circuits, the rest from computer

architecture and microarchitecture

• Effects of sustained performance growth: – More compute capability available to individual users

– New classes of computers (PCs, tablets, smartphones, warehouse computers)

– Mainframes/minicomputers replaced by microprocessor-based computers

– Programmers focus on productivity rather than on performance

Page 17: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Microprocessor Segments

• Personal Mobile Devices (PMD) – Smartphones

– Tablets

• Desktop and Laptop Computing – PCs (Windows, Linux)

– Workstations (higher performance) • E.g., running CAD applications

• Servers

• Clusters/Warehouse-scale Computers

• Embedded Computers

Page 18: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Personal Mobile Devices

• Price of system: $100 -- $1000 – Largest computing segment in dollar terms

• Price of microprocessor: $10 -- $100

• Critical design issues:

– Cost

– Performance

– Responsiveness

– Energy

• Battery life, no fans

Page 19: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Desktops and Laptops

• Price of system: $300 -- $2500

• Price of microprocessor: $50 -- $500

• More than half of this segment is battery-operated laptops

• Critical design issues: – Performance per dollar

– Energy

– Graphics performance: critical for gaming markets

• Well-characterized applications and benchmarks – Increasing use of internet-centric applications poses new challenges

for performance evaluations

Page 20: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Servers

• Price of system: $5000 -- $10,000,000

• Price of microprocessor: $200 -- $2,000

• WWW and e-commerce have accelerated growth – Traditional “back office” applications

– E-commerce: Amazon.com, Ebay, E*trade etc.

• Critical design issues: – Throughput (transactions per minute or web pages served per second)

– Availability (e.g., consider the servers running bank ATM machines)

– Scalability (e.g., consider the rise in number of Facebook users)

– Energy

Page 21: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Clusters/Warehouse-scale Computers

• Price of system: $100,000 -- $200,000,000

• Price of microprocessor: $50 -- $250

• Clusters are collections of desktops/servers connected by LANs, acting as a single larger computer

• Different from servers in that clusters use redundant, inexpensive components

• Critical design issues: – Performance per dollar

– Throughput

– Energy Proportionality (80% of the maintenance cost is associated with power and cooling)

Page 22: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Embedded Computers

• Price of system: $10 -- $100,000

• Price of microprocessor: $0.01 -- $100

• Largest segment by unit volume

• Ubiquitous – Automobiles, appliances, printers, set-top boxes, industrial controls,

networking switches

• Critical design issues: – Price

– Energy

– Real-time performance

– Application-specific performance

Page 23: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Relative Size of Markets

Source: IDC

Page 24: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Task of the Computer Architect

• Successful computer architect must design a computer to meet functional requirements as well as price, power, performance and availability goals – Determine what features are needed for a market segment

– Incorporate architecture features (instructions, microarchitecture optimizations) that would make the computer competitive in that market

– Example: SSE instructions in x86 architectures for DSP and graphics processing

• Identify important technology trends and adapt computer design accordingly – Example: Error-correction codes in caches to mitigate manufacturing

imperfections

Page 25: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Processor Performance: Future Outlook

• Since 2003, annual processor performance growth limited to < 22%:

– Power dissipation constraints of air-cooled chips limit on clock speed

– Lack of instruction-level parallelism in a uniprocessor

– Market drivers dictate power (energy) and cost to be as important as (or more than) performance

• Future performance improvements would come from multiple processors per chip rather than via faster uniprocessors

Parallelism is now the driving force of computer design across all market segments, with energy and cost being the primary constraints

Page 26: ECE 486/586 Computer Architecture Lecture # 1web.cecs.pdx.edu/~zeshan/ece586_lec1.pdf · Course Information • Textbook: Computer Architecture: A Quantitative Approach, 5th Edition,

Parallel Architectures: Classes of Parallelism

• Instruction-level Parallelism

– Multiple instructions from the same thread executed in parallel by using techniques like pipelining and speculative execution

• Thread-level Parallelism

– Multiple threads of work are created and can operate independently and largely in parallel

• Data-level Parallelism

– Same instruction(s) operated on many data items at the same time (SIMD, MIMD)