Electrical properties of βSiC metaloxidesemiconductor structuresM. I. Chaudhry Citation: Journal of Applied Physics 69, 7319 (1991); doi: 10.1063/1.347582 View online: http://dx.doi.org/10.1063/1.347582 View Table of Contents: http://scitation.aip.org/content/aip/journal/jap/69/10?ver=pdfcov Published by the AIP Publishing Articles you may be interested in Surface oxidation chemistry of β-SiC J. Vac. Sci. Technol. A 15, 1 (1997); 10.1116/1.580466 Interface properties of metaloxidesemiconductor structures on ntype 6H and 4HSiC J. Appl. Phys. 79, 7814 (1996); 10.1063/1.362389 Compositional and electrical properties of Si metal–oxide–semiconductor structure prepared by directphotoenhanced chemical vapor deposition using a deuterium lamp J. Vac. Sci. Technol. A 13, 237 (1995); 10.1116/1.579404 Characterization of metal–oxide–semiconductor capacitors, fabricated on (111) β-SiC epilayers grown on(111) TiC Appl. Phys. Lett. 65, 2576 (1994); 10.1063/1.113034 Characterization of device parameters in hightemperature metaloxidesemiconductor fieldeffect transistorsin βSiC thin films J. Appl. Phys. 64, 2168 (1988); 10.1063/1.341731

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Electrical properties of p-Sic metal-oxide-semiconductor structures M. 1. Chaudhry Department oj-Electrical and Computer Engineering, Clarkson University, Potsdam, New York 13699

(Received 16 November 1990; accepted for publication 16 February 1991)

Using conductance and capacitance data for metal-oxide-semiconductor (MOS) structures on n-type &Sic, the density of states at the /3-SiC/‘SiO, interface, their location in the bandgap of &Sic, and the electron capture probability are obtained. The MOS structures were fabricated by oxidizing D-Sic in wet oxygen. It is found that interface-state ‘density of the order of 10” states/(cm2-eV) is located between 0.28-0.40 eV below the conduction-band edge of &Sic. The electron-capture probability is in the range from 4.2X 10 -’ to 8.4X lo- * cm3/s. This study shows that the electrical properties of B-Sic MOS structures are similar to that of Si MOS structures.

/I-Sic is a potentially useful material for high-temper- ature (500 “C) and high-power metal-oxide-semiconductor (MOS) devices. Its main features are large bandgap (2.35 eV), high breakdown field (4~ lo6 V/cm), high saturated velocity (2.5 X IO’ cm/s) for electrons, and large thermal conductivity ( 5 W/cm “C ) . ’

The electrical properties of the B-Sic MOS structures are not well understood. Suzuki et a1.2 fabricated MOS capacitors on 6H-Sic, which showed accumulation, deple- tion, and inversion under the gate electrode. Kee et aL3 made MOS structures on /?-Sic by thermal oxidation, but were unable to induce a depletion layer even at a large gate bias, probably due to high-charge density in the oxide films. Similar results were reported for the MOS structures fabricated on @-Sic using dry oxidation.4 In this commu- nicat.ion, the electrical properties, as determined by the MOS conductance and capacitance techniques, of the p-SiC/SiOz interface are presented.

The samples used in this study were n-type B-Sic (100) films that were grown on ( 100) silicon substrates by chemical vapor deposition,’ and had a doping concentra- tion of 5x 1016/cm3. Prior to oxidation, the samples were cleaned using trichloroethylene (TCE), acetone, metha- nol, and deionized water. The thermal oxidation was car- ried out at atmospheric pressure in a double-walled resis- tance-heated quartz reactor at 1100 “C! in wet oxygen. Water vapor was added to the oxygen by bubbling oxygen through a deionized water bath kept at 95 “C. The stoichi- ometry of the oxide layers, as determined by the Auger analysis, was 28% silicon, 58% oxygen, and 14% carbon.4 The MOS structures were formed by depositing aluminum on the oxide surface through a mask in a vacuum system. The conductance-voltage (GV) and capacitance-voltage (CV) data of MOS structures were obtained at room tem- perature (27 “C) using a measurement system, consisting of a multifrequency LCR meter (Hewlett Packard 4274A), a CV Analyzer (Keithely 590), and a microcom- puter. The interface-state density at the &SiC/SiO, inter- face and the capture probability of electrons are deter- mined by analyzing the MOS conductance data.

The conductance and capacitance of the P-Sic MOS capacitors have been measured over the range of frequency from 100 Hz to 1 MHz. Typical measured conductance

curves G( V,w) are shown in Fig. 1. The normalized ca- pacitance (C/C,,J curves for 100 Hz and 1 MHz are also shown in Fig. 1. The data were measured by sweeping the gate voltage at a rate of 6 mV/s. The MOS conductance arises from the capture and emission of electrons by the interface states within a few kT/q of the Fermi level. For a given signal frequency (o), the conductance goes through a peak when the gate bias makes the time constant (7) of the interface states equal to l/w multiplied by a constant. The frequency dispersion in the MOS capacitance also is due to the interface states.

In order to calculate the equivalent parallel conduc- tance (Gdw), the measured data were corrected for the oxide capacitance, series resistance, and the oxide leakage current following the procedure described in Ref. 6. Figure 2 shows a plot of G/w vs gate bias for 1 and 20 KHz. The MOS capacitor is biased in the depletion region. Since the time constant of the surface states varies with the bias, the conductance peaks at a bias that will make r equal to l/w multiplied by a constant. Thus an increase in frequency will shift the peak position. On the other hand, the time constant of the bulk levels is independent of bias,’ and hence the peak in the conductance arising from the bulk levels does not shift with frequency. In Fig. 2, a shift in the conductance peak toward the right with frequency verifies that the measured conductance arises from interface states rather than from the bulk levels in the P-Sic films.

The flatband voltage is determined from high-fre- quency ( 1 MHz) CV data, and a relationship between the surface potential and the gate bias is found by numerical integration using the low-frequency (100 Hz) CV data.* The interface-state density (NJ and the capture probabil- ity (c,) then are determined using’

Nss= ( GJm 1 rnax~P?f d

and

c,= CW~~&)exp(v,).

In the above equations, ( GJti) max is the peak value of the equivalent parallel conductance, o the angular frequency of the signal, A the area of the gate electrode, fd and cp the parameters that depend on the fluctuation in the surface

7319 J. Appi. Phys. 69 (lo), 15 May 1991 0021~8979/91 /I 07319-03$03.00 @ 199‘1 American Institute of Physics 7319

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8 2 0.4 5 2 3 0.2

0.0 -10 -8

GAT&OLTA&! (V) -2 0

FIG. 1. Measured conductance-voltage and capacitance-voltage date of a &Sic MOS structure. The gate area is 4.56~ IO-’ cm2, and the oxide thickness is 600 A. The thermal oxide is grown at 1100 % for 60 min in wet oxygen.

potential,’ and v, is the normalized surface potential. The values of fd and &, obtained in this study are 0.4 and 2.62, respectively.

The distribution of interface states, its location in the P-Sic bandgap, and the electron-capture probability are given in Table I. The interface-state distribution shows a peak located at 0.35 eV below the conduction band edge. We suggest that this peak is the characteristic of the Sic/ SiOz interface. Johnson et al. lo have reported that in an as-oxidized p-Si/SiOZ system the interface-state distribu- tion exhibits a peak density of 1 X 1012 states/(cm2 eV) at 0.3 eV above the valence band edge and another peak be- low the conduction band edge. The peak density for the

‘0

25

; 6-

s 2 ii? oo4

i d fx 2

2-

FIG. 2. Equivalent parallel conductance (G/a) vs gate bias for a &Sic/ SiO, MOS capacitor biased in the depletion region. These curves are

FIG. 3. Plot of interface-state density, N, vs energy for P-Sic MOS

calculated using the data of Fig. 1. structures with wet thermal oxide. The surface state density has been calculated from the CV data of Fig. 1.

TABLE I. Interface-state density (NJ, its location in the P-Sic bandgap, and the electron-capture probability (c,,) at the &SiC/SiO, interface. The values off,, and .& used are 0.14 and 2.62, respectively.

N, Location ( 10” cm - ‘/eV)

=,z (eW ( 10 - * cm’/s)

6.0 E,- 0.28 8.40 6.5 EC - 0.32 4.20 7.0 EC- 0.35 0.42 6.5 EC - 0.40 1.70

&SiC/SiOZ system is 7~ 10” states/(cm’ eV> (Table I). A lower density of states in the P-SiC/SiO, system may be attributed to the carbon atoms at the &SiC/Si02 interface, which may satisfy some of the dangling bonds, thereby reducing the density of defects at the interface.

Although the conductance method yields more accu- rate results compared to the capacitance method, the ca- pacitance method nevertheless can be used to obtain the shape of the energy distribution of the interface states. The CV curves of Fig. 1 and the low-high frequency capaci- tance method’ have been used to determine the distribution of interface states in the upper-half of the P-Sic bandgap. The results are shown in Fig. 3. As can be seen, the distri- bution has a broad peak at approximately 0.36 eV below the conduction band edge. A comparison of Fig. 3 and Table I reveals that the capacitance method underestimates the density of interface states.

The broad peak in the distribution of interface states in the &SiC!/SiO, interface is similar to the one present at the Si-Si02 interface. ‘O Since this peak can be removed by the post-oxidation heat treatment resulting- in a U-shaped dis- tribution,” and since BSiC!/SiO, and Si/SiO, systems seem to be similar, it is expected that the peak at the &SiC/Si02 interface also will be reduced by post-oxidation heat treatment. An effort to study the effect of post-oxida- tion heat treatment on the electrical properties of &-Sic MOS structures is under way.

-0 -

=3-

iFi - ET’ 0 2-

F _

2 II-

E iz Eo ‘I

\

2 -1.0 -0.8 I I -0.6 I I -d.4 -0.2 I 8 - BANDGAP ENERGY (eV)

.O

7320 J. Appl. Phys., Vol. 69, No. 10, 15 May 1991 M. 1. Chaudhry 7320

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The above results show that the quality of the &Sic/ SiO% interface is suitable for fabricating MOS devices on &Sic. These results are quite important for MOS device fabrication on @Sic because the other compound semicon- ductors, such as GaAs and InP, lack-a good quality insu- lator for fabricating reliable MOS devices.’ ’ /J-Sic may be the only known compound semiconductor suitable for fab- ricating MOS field-effect devices.

Using MOS conductance and capacitance techniques, the interface states at the /3-SiC/Si02 interface are charac- terized. The interface-state density of 6-7X 10”/(cm2 eV) is located between 0.28 - 0.40 eV below the conduction- band edge of &Sic. The capture probability of these states is in the range of 4.2X10m9 to 8.4X lo-’ cm3/s. This study has found that the electrical properties of the &Sic/ SiO, system are similar to that of the Si/Si02 system, and that the thermal oxide of &-Sic is a suitable insulator for fabricating MOS devices on D-Sic.

The author gratefully acknowledges helpful discus- sions with R. F. Cotellessa. This work has been supported

by a grant from New York State Science and Technology Foundation and the Center for Advanced Materials Pro- cessing at Clarkson University.

‘J. D. Parsons, R. F. Bunshah, and 0. M. Stafsudd, Solid State Tech- nology 28, 133 (1985).

2A. Suzuki, K. Mameno, N. Furui, and H. Matasunami, Appl. Phys. Lett. 39 , 89 (1981).

‘R. W. Kee, K. M. Geib, C. W. Wilmsen, and D. K. Ferry, J. Vat. Sci. Technol. 15, 1520 (1978).

4M. I. Chaudhry, J. Mater. Res. 4, 1491 (1989). sM. I. Chaudhry and Robert L. Wright, J. Mater. Res. 5, 1595 (1990). %. Kar and W. E. Dahlke, Solid State Electron. 15, 221 (1972). ‘E. H. Nicollian and A. Goetzberger, Bell Syst. Tech. J. 46, 1055

(1967). 8 E. H. Nicollian and J. R. Brews, MOS Physics and Technology (Wiley,

New York, 1982), p. 329. 9J. R. Brews, Solid State Electron. 26, 711 (1983).

‘ON. M. Johnson, D. K. Biegelsen, and M. D. Moyer, in The Physics of MOS Insulators, edited by G. Lucovsky, S. T. Pantelides and F. L. Galeener (Pergamon, New York, 1980), p. 311.

” G. P. Schwartz, in The Physics of MOS Insulators, edited by G. Lucov- sky, S. T. Pantelides, and F. L. Galeener (Pergamon, New York, 1980), p. 181..

7321 J. Appl. Phys., Vol. 69, No. 10, 15 May 1991 M. I. Chaudhry 7321

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