Enhancement- and depletion-modeAlGaN/GaN HEMTs on3C-SiC(111)/Si(111) pseudosubstrates

Wael Jatal1, Uwe Baumann2, Heiko O. Jacobs1, Frank Schwierz3, and J€org Pezoldt*,1

1 FG Nanotechnologie, Institut f€ur Mikro- und Nanotechnologien MacroNano1

und Institut f€ur Mikro- und Nanoelektronik, TU Ilmenau,Postfach 100565, 98684 Ilmenau, Germany

2 IMMS gGmbH, Ehrenbergstr. 27, 98693 Ilmenau, Germany3 FG Festk€orperelektronik, Institut f€ur Mikro- und Nanotechnologien MacroNano

1

und Institut f€ur Mikro- und Nanoelektronik, TUIlmenau, Postfach 100565, 98684 Ilmenau, Germany

Received 15 June 2016, revised 2 February 2017, accepted 2 February 2017Published online 28 February 2017

Keywords 3C-SiC, AlGaN, chemical vapor deposition, high electron mobility transistors, silicon, substrates

* Corresponding author: e-mail joerg.pezoldt@tu-ilmenau.de, Phone: þ49 3677 693412, Fax: þ49 3677 693709

The realization of depletion-mode planar and both enhance-ment- and depletion-mode tri-gate high electron mobilitytransistors (HEMTs) based on Al0.2Ga0.8N/AlN/GaN hetero-structures grown on silicon substrates using an ultrathin 3C-SiC transition layer is presented. This substrate configurationsimplifies heterostructure growth compared to SiC and thick3C-SiC substrates. The threshold voltage of the tri-gate devicesstrongly depends on the AlGaN/GaN body (fin) width. Atransition from depletion-mode to enhancement-mode opera-tion occurred at 110 nm body width for tri-gate devices withoutSi3N4 passivation, and is expected to occur at 75 nm for

devices with Si3N4 passivation. Threshold voltages of �0.25/0.35V were achieved at fin widths of 82/100 nm with/withoutSi3N4 passivation, respectively, for the tri-gate HEMTs incomparison to �3.5V for the planar HEMTs. Cutofffrequencies fT of 45GHz and maximum frequencies ofoscillation fmax of 50GHz have been measured for our best100-nm tri-gate enhancement-mode HEMTs, while depletion-mode planar HEMTs with the same gate length showed110GHz for both fT and fmax. This demonstrates theapplicability of the developed substrate configuration forhigh-performance device applications.

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1 Introduction AlGaN/GaN high electron mobilitytransistors (HEMTs) are promising devices for radiofrequency (RF) power amplification [1], and combine highoperation frequencies with high output powers. For largescale fabrication of these devices three substrates can beused: sapphire, silicon carbide and silicon. The substrateproviding the highest thermal conductivity, smallest lattice,and thermal mismatch is SiC. These material properties arepreconditions for reliable high power density devices [2, 3].Meanwhile available with large diameters, the remainingdrawback of the SiC substrates is their relatively high price.A reasonable alternative solution compared to sapphireis silicon (Si), providing larger diameters at lower costscombined with a better thermal conductivity thansapphire [4–6]. However, the main drawback of thissubstrate is the large lattice and thermal mismatch aswell as chemical interactions between Si and the group

III-nitrides. The thermal and lattice mismatch leads to hightensile strains during heteroepitaxial growth and the coolingdown period. These strains cause high dislocation densities,cracks, and wafer warpage affecting the device processingand reliability. High temperature chemical reaction betweengallium and silicon roughens the Si surface and affectsdetrimentally the nucleation and growth of GaN and Si. Thiseffect is denoted as melt-back etching. A second effect is theappearance of autodoping effects in the III-nitride hetero-structure originating from diffusion of the substrate atoms,here silicon, into the heteroepitaxial layer [7]. Both, melt-back etching and Si outdiffusion, lead to void formation inthe Si substrate. Additionally, the incorporation of metalatoms into the Si substrate may change the resistivity of thesubstrate in the near interface region [8]. A possiblesolution, but not the only one, for the aforementionedchallenges is the incorporation of an additional layer

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improving the lattice mismatch and serving as a diffusionbarrier. Such a material is SiC, firstly employed byTakeuchi [9] and Davis [10]. Later, micrometer thick 3C-SiC(111) layers were used for the same purpose [6, 10–13].Albeit, it was shown that for reliable heteroepitaxialgrowth [14] and device fabrication thick silicon carbidelayers are not necessary [15–17]. A further advantage of aSiC transition layer is its high thermal conductivity. A recentreview of the influence of the buffer layer on the AlGaN/GaN heterostructure and HEMT performance on Sisubstrates is given in [18].

Typically, AlGaN/GaN HEMTs are depletion-mode(D-mode) devices [19], but for simple circuit design andimproved system reliability, enhancement-mode (E-mode)are desired. A recent realization of E-mode HEMTs aremulti-mesa-channel (MMC) structures or nanochannelarrays (NCA). They employ a tri-gate structure [19, 20–26],where the gate is wrapped around narrow AlGaN/GaNbodies from three sides (from the top and from bothperpendicular sidewalls), similar to the tri-gate Si MOS-FETs which currently enjoy increasing popularity. Otherpossibilities to fabricate E-mode AlGaN/GaN HEMTs areultrathin AlGaN barriers [27], gate recess [28], or fluorineplasma treatment [29]. In this article, we report on theprocessing and characterization of D- and E-mode tri-gateHEMTs based on GaN/Al0.2Ga0.8N/AlN/GaN heterostruc-tures grown on Si substrates using an ultrathin SiC transitionlayer.

2 Experimental2.1 LPCVD growth of the SiC transition

layer The 3C-SiC/Si(111) pseudosubstrates for the subse-quent GaN growth were prepared using a two-step growthmethod developed by Nishino [28, 30]. First, a very thin SiClayer (3 nm) is realized by carbonization of the Si surfacewhere only a carbon-based precursor (C2H4) is present in thereactor. Next a silicon precursor (SiH4) is added, leading tothe epitaxial growth of a thicker SiC layer. We used a lowpressure CVD process at a substrate temperature of1060 8C [29, 31]. The background pressure in the UHVchamber was 5� 10�9mbar and the process pressure wasabout 0.0014mbar. The epitaxial growth was monitored insitu by spectroscopic ellipsometry and reflection of highenergy electron diffraction. The chosen silicon carbidethickness prevented the Ga-induced melt back etching andthe Si-outdiffusion in the subsequent metal organicchemical vapour deposition (MOCVD) growth [13–16].The needed 3C-SiC(111) layer thickness was 50 nm.

2.2 MOCVDgrowth The heteroepitaxial growth ofthe GaN/Al0.2Ga0.8N/AlN/GaN heterostructures using anactive layer stack of GaN/Al0.2Ga0.8N/AlN with layerthicknesses of 2/20/1 nm on the GaN buffer wasperformed by MOCVD. First, a 100-nm AlN nucleationlayer was grown at 950 8C. The formation of anamorphous and nonstoichiometric silicon nitride layerwas suppressed by shortly forerunning the aluminum

precursor trimethylaluminium (TMAL). After recrystal-lization at 1160 8C, 500 nm GaN growth was started at1060 8C and proceeded at 1150 8C. Strain engineeringwas done by inserting an AlN layer during GaNbuffer growth to prevent cracking of the GaN bufferlayer during cool-down. On top of the AlN insertionlayer a 500 nm buffer was grown, followed by thebarrier consisting of an 1-nm AlN layer and a 20-nmAl0.2Ga0.8N. The GaN cap was 2 nm thick. Thecharacteristics of the 2DEG were measured by capaci-tance–voltage and Hall measurements, which revealed anelectron density of 7.5� 1012 cm�2 and a low fieldmobility of 1760 cm2 Vs�1, respectively.

2.3 Processing HEMT devices Figure 1 showsscanning electron (SEM) and optical microscopy (OM)images of the gate region and the device layout of fabricatedplanar and tri-gate AlGaN/AlN/GaN devices. The channelof the tri-gate HEMTs consists of a set of parallelnanochannel bodies forming a nanochannel body array.

The lateral device dimensions were defined by electronbeam lithography. Device isolation was realized using amesa structure. The mesa and the body arrays of the tri-gatedevices were fabricated by dry etching in a chlorine-basedplasma process. Ohmic contacts were realized using astandard Ti/Al/Ti/Au metallization scheme. The thicknessesof the different metal layers were 20/80/30/100 nm. Contactannealing was performed in a rapid thermal processingreactor at 850 8C for 45 s. The contact resistance hasbeen determined by the transmission line method.Current–voltage characteristics measured in the voltage

Figure 1 SEM images of the channel region of an E-mode tri-gateHEMT showing the nanochannel bodies and the gate with a gatelength Lg of 0.1mm and a body width of 82 nm (a) and of a D-modeplanar AlGaN/GaN HEMT showing the gate with Lg of 0.1mm (c).OM images displaying the device layout of the tri-gate (b) andthe planar (d) HEMTs with the source (S), gate (G) and drain(D) including the contact pads.

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range�1 toþ1V using a HP4145 semiconductor parameteranalyzer were used to extract the contact resistance. Thespecific contact resistance and the contact resistance ofthe Ti/Al/Ti/Au contacts were 1.12� 10�7V cm2 and0.13� 0.01Vmm, respectively. A 3 nm thick SiN passiv-ation layer was deposited on both the planar and the tri-gateAlGaN/AlN/GaN HEMTs using plasma enhanced chemicalvapor deposition at 350 8C to reduce the surface effectsresponsible for limiting both the RF performance andbreakdown voltages of the devices [32]. Ni/Au gates werepatterned by electron beam lithography and lift-off, andwere located in the center between the source and the drain,with a drain-source separation of 2mm. The tri-gatetransistors have a rectangular gate, whereas the planartransistors possess a T-gate. Finally, the overlay metalliza-tion and contact pads were formed by depositing Ti/Au. On-wafer RF measurements in the 0.1–50GHz range werecarried out with a Casacade Microtech Probe and aHP8510B network analyzer.

3 Results and discussion The dependence of thethreshold voltage on the body width of the tri-gate HEMTswith and without SiN passivation is shown in Fig. 2.

The threshold voltage shows a nearly linear dependenceon the body width. At a body width of 110 nm without SiNpassivation, a threshold voltageVTH¼ 0Vwas achieved. Forthe identical heterostructure with SiN passivation, a zerothreshold voltage is expected for a bodywidth around 70 nm.For unpassivated tri-gate HEMTs, a maximum thresholdvoltage of 0.35V was obtained at a body width of 100 nm.Therefore, normally off operation can be achieved byproperly choosing the body width. The reasons for thedepletion of the 2DEG in tri-gate structures are threefold.First, the top-gate (the gate portion located on the body top)depletes the 2DEGas in planarHEMTstructures. Second, thegate portions covering the vertical body sidewalls cause afringing field (curved field lines from the sidewall gatestoward the 2DEG), which does not exist in planar HEMTs.The thirdeffect contributing to the2DEGdepletionoriginates

from strain reduction (partial relaxation) in the narrowAlGaN/GaN bodies [22]. The steeper threshold voltagedependence in comparison to Ref. [26] was achieved bychanging the etching conditions to improve the sidewallgeometry. The SiN passivation increases the effective barrierthickness and changes the stress state and interface statedensity. In the present case, these effects decrease the bodywidth needed for normal off, i.e., E-mode, operation. Thethreshold voltage shift in the tri-gate devices with SiNpassivation originates mainly from two effects, namely thepositive charge in the SiN layer [33] and the stress induced bythe deposited SiN [34] leading to an increase of the chargecarrier density of the 2DEG. The effect of the body widthonVTH fromFig. 2 is supported by simulations carried out fortri-gate AlGaN/GaN HEMTs in Ref. [35].

Figure 3(a) and (b) show the output characteristics of tri-gate AlGaN/GaNHEMTswithout and with SiN passivation,as well as of a planar HEMT (Fig. 3c). The transistor withSiN passivation has a body width, Wbody, of 100 nm, a gatelength Lg¼ 100 nm, and shows D-mode operation, whereasthe transistor without SiN passivation, Wbody¼ 82 nm, andLg¼ 200 nm is an E-mode device. Figure 3(c) displays theoutput characteristics of a planar HEMT fabricated on thesame heterostructure using a 100-nm T-gate. The on-offratios Ion/Ioff of the devices are 10

4 for the E-mode tri-gatedevice without SiN, 105 for the D-mode tri-gate device withSiN, and 108 for the planar device.

Figure 4 shows the transfer characteristics of the devicesfrom Fig. 3. The drain current and the transconductanceare normalized to the effective channel width. The tri-gateHEMTs demonstrate reasonably good current–voltagebehavior. Maximum drain current densities of 445 and655mAmm�1 were achieved for tri-gate HEMTs withoutand with SiN passivation, respectively, obtained for a gate-source voltage VGS of 4V and a drain-source voltage VDS of10V. The transconductances gm reached values of 120 and200mSmm�1 at VDS¼ 5V for the tri-gate HEMTs withoutand with SiN passivation. The increased drain currents andtransconductances of the passivated devices stem frompositive charges in the SiN causing an increase of the chargecarrier density in the 2DEG. For the planar AlGaN/GaNHEMT, a drain current density of 600mAmm�1 and atransconductance of 180mSmm�1 have been obtained forVGS¼ 0V and VDS¼ 10V. The output characteristics of theE- and D-mode HEMTs exhibit a reasonably goodsaturation, which is essential for good RF performance.The transconductance gm for the E-mode devices reachedvalues of 190mSmm�1 at VDS¼ 5V. A threshold voltage of�0.25V was achieved for the tri-gate device with SiNpassivation, which represents a significant shift toward E-mode operation in comparison to the threshold voltage of�3.5V for the planar D-mode HEMT. A positive thresholdvoltage of 0.35� 0.08V was obtained extrapolating thetransfer characteristic shown in Fig. 3(a) for the devicewithout SiN passivation.

Figure 5 displays the gate leakage characteristics ofthe HEMTs measured at VDS¼ 0V. The gate leakage of the

Figure 2 Threshold voltage VTH versus body width Wbody of thetri-gate HEMTs with and without SiN passivation.

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tri-gate HEMTs is remarkably larger than that of the planarHEMTs. The increase of the leakage currents stems from theSchottky diode on the sidewalls of the nanochannel and isreduced if SiN is deposited by two orders of magnitude.

Figure 6(a) and (b) shows the short circuit current gain |H21|

2 and the unilateral power gain Ug for a tri-gate D-modeHEMT with SiN passivation layer and a planar AlGaN/GaNHEMT, both with 100 nm gate length.

The characteristics of these devices were derived fromon-wafer S-parameter measurements in the 0.1–50GHzrange as a function of frequency, for the 100 nm rectangulargate tri-gate device and for the 100 nm planar device. TheHEMTs were biased at VDS of 10V and a VGS of 0.25V forthe tri-gate device, and VDS of 20V and VGS of�3V for theplanar device. The cutoff frequency fT was determined byextrapolation of |H21|

2 using a�20 dB/decade slope and themaximum frequency of oscillation fmax was obtained byextrapolatingUg with�20 dB/decade. The fT and fmax are 45and 50GHz for the tri-gate HEMT, while for the planarHEMT 110GHz have been measured for both fT and fmax.The obtained fT and fmax values for the tri-gate AlGaN/GaNHEMT are lower compared to the planar HEMT fabricatedon the same heterostructure. The tri-gate transistors sufferfrom a larger parasitic stray capacitance component ofthe gate-source capacitance compared to planar HEMTs.This stray capacitance stems from the side-gate metal. Notethat fmax exceeds fT for the tri-gate device which is

Figure 4 Transfer characteristics for tri-gate AlGaN/GaNHEMTs with (�) and without (&) SiN passivation and 100 and200 nm gate length, respectively, and planar (D) AlGaN/GaNHEMTs with 100 nm gate length.

Figure 5 Gate source leakage current measured at VDS¼ 0V fortri-gate AlGaN/GaN HEMTs with (�) and without (&) SiNpassivation and 100 and 200 nm gate length, respectively, andplanar (D) AlGaN/GaN HEMTs with 100 nm gate length.

Figure 3 Output characteristics of tri-gate AlGaN/GaN HEMTswithout SiN passivation and a 200 nm gate (a) and with SiNpassivation and 100 nm gate length (b). Output characteristics of a100 nm gate planar AlGaN/GaN HEMT (c).

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uncommon if rectangular gates are used, but was alsoobserved in Ref. [23, 26].

Figure 7 shows the cutoff frequency of the fabricatedE-mode tri-gate and D-mode planar AlGaN/GaN HEMTs asa function of gate length, together with the correspondingdata of AlGaN/GaN HEMTs on SiC and Si substrates

compiled from the literature. The cutoff frequencies of theE- and D-mode tri-gate HEMTs are still below those of theD-mode planar devices, but show a pronounced dependenceon the gate length between 100 and 250 nm. The degradedcutoff frequencies of the E-mode HEMTs are again causedby the larger stray capacitance of the tri-gate transistorconfiguration [36].

Figure 8 shows fT and fmax of our tri-gate HEMTs withand without SiN passivation as a function of body width. fTand fmax increase continuously for decreasing body width.Furthermore, fT and fmax of the tri-gate transistor with SiNpassivation are higher than those of the tri-gate transistorwithout SiN. The decreased fT and fmax of the tri-gate HEMTwithout SiN passivation compared to the tri-gate transistorwith SiN passivation stems from the increased gatecapacitance and the reduced charge carrier densities ofthe 2DEG.

4 Conclusions Tri-gate and planar HEMTs based ona GaN/Al0.2Ga0.8N/AlN/GaN heterostructure grown on Sisubstrates using a SiC transition layer have been fabricatedand characterized. The critical body width for the transitionfrom D- to E-mode operation was 110 nm for our tri-gatedevices without SiN passivation and 75 nm for the tri-gateHEMTs with passivation. Cutoff frequencies of 45 and110GHz have been obtained for our best tri-gate and planar100-nm gate HEMTs, respectively, and the maximumfrequencies of oscillation of these devices are 50GHz (tri-gate) and 110GHz (planar).

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