FPGA现状及其发展趋势 - sme.fudan.edu.cnsme.fudan.edu.cn/instruct/mee/download/lai/IC-4-2.pdf · epld ⎯宏单元组合结构,逻辑块级编程(属pld ... 是一种低成本fpga

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  • FPGA

    2005612

  • FPGAFPGAFPGA

  • FPGAFPGAFPGA

  • PLD

  • FPGA11 PLD(Programmable Logic Device)

    PROM70

    PLA70

    PAL 70

  • FPGA2

    GAL 80PAL OLMCOutput Logic Micro CellGALPAL

  • PLDPLD

    I/O

    FPGA3

  • 2EPLD1984AlteraEP300PLDPALGAL

    FPGA4

  • FPGA5EPLD

    I/O

  • FPGA63FPGA CPLDFPGA

    1985XillinxXC2000

    PLCProgrammable Logic CellPRRProgrammable Routing ResourceI/OPIOProgrammable I/O Block

    SOPCSystem on a Programmable Chip

    0.099500MHzFPGADSPMCURAMPCIXILINX Virtex-II Pro,Altera StratixASICFPGA IP

  • FPGAPLD

    EPLD PLDPALGALFPGA PLCIO

  • FPGAFPGAFPGA

  • FPGA

    1PLD/FPGA2XILINX3ALTERA4LATTICE5FPGA

  • 1PLD/FPGA

    Xilinx

    Altera

    Lattice

    Actel

    Cypress

    Others

    XilinxAlteraLatticeActelCypressOthers

    FPGA1

    Xilinx

    ALTERA

  • 1PLD/FPGA

    FPGA1

  • 2XILINX ISE/Foundation

    XC9500FlashPLDISP,XC9536XC9572XC95144CoolRunner-II1.8vPLDSPARTAN-II : 0.18um 2.5v SRAM, SPARTAN

    FPGA2

  • 2XILINX

    Spartan-IIE:1.8vFPGAVirtex-ESpartanIII:VirtexII 1.2v 90nmSpartan3E18I/OVirtex-II: 1.5vSRAMFPGAVirtex-II pro: VirtexIICPUVirtex-4 90nm500MHZ

    LX:SX:DSPFX:,PowerPC

    FPGA2

  • FPGA3Spantan/ SpantanXL:

    0.35umXC40005000 ~ 40,000238 ~ 1862LCLogic Cell4LUT

    IO 77 ~ 205

    PCI

    ASICFPGA

  • Virtex-II

    (Platform FPGA)

    CLB64~116481CLB=4Slice=2.25LC

    :18kbitRAM4~168DCM 4~12Digital clock Manager18*184~168IO88~1108

    FPGA4

  • FPGA5

    Virtex5100CLB384~6144LC:1,72827,648I/O180~66050.22CMOS5VI/O3SelectRAM+3SelectI/O66MHz/64PCICompact PCIFPGAFPGA

  • Virtex-E ASIC0.18um657,906 ~ 4,074,3871,728 ~ 73,008CLB384 ~ 162242.132kbitRAM8DLL20IO176~804

    Virtex/Virtex-E

    FPGA6

  • 3ALTERAQuartusII MaxplusII

    MAX7000S/AE5v/3.3v EEPOMPLD321024MAX3000A993.3v EEPOMPLD, MAX7000FLEX10KE982.5v SRAM PLD(FPGA),32510K30E,10K50E,10K100E,(EAB) FLEX10K(5V),FLEX10KA(3.3v),5v10K3.3v10KACyclone

    FPGA7

  • 3ALTERA

    ACEX1K20002.5vSRAMPLD(FPGA),10KE,(EAB),PLL:1K10, 1K30, 1K50,1K100APEXIISRAMLVDS,PLL, CAM, Stratix

    FPGA8

  • Stratix 0.13um SRAMFPGA,,AlteraStratixII:Stratix90nmFPGAVirtex-II pro1.9CycloneSRAMFPGAStratixFPGA CycloneIICycloneFPGA90nmLow-k15018*18MAXII

    FPGA9

  • Stratix1.5V 0.13umSRAM10,570114140LELABlogic array block10LE

    512bitRAM94 ~1118 4KbitRAM60~520 512MegaRAM1~12

    DSP6~28DSP499/

    Stratix FPGA12PLL

    FPGA10

  • Stratix LE

  • Stratix Block Diagram

  • FPGA11AlteraFPGA

    ACEXACE11056,000257,000PLL6466MHZPCI1.8v2.5v115MHZ

    RAMFLEXFLEX 10KEFLEX 10KFLEX 10KRAMFLEX 10KRAM66MHZ3~25.

  • FPGA12AlteraFPGA

    APEX 20KElow-voltage differential signaling, LVDS840PLLLVDS1478LVDS I/O

  • 4LatticeLatticeISPIn-System Programmability

    ISPPLD8090XilinxAlteraPLDisplever,ALTERAXILINX

    FPGA13

  • 4Lattice

    ispMACH4000V/B/C/Z: LatticeVantisPLDispMACH5000

    ispXPLD5000 LatticePLDispXPISP eXpanded Programming

    ispXPGAFPGALatticeEC/ECPLatticeECDSPECPDSP

    FPGA14

  • FPGA

    4ActelFPGA

    SX-A200MHZ1w-ProASIC FPGAsSRAMFPGA1/31/2

    MXFlashICIC

  • FPGA15

    5 FPGA

    time to market

    FPGA

    1-1 FPGAIC

  • ASIC

    FPGA16

  • ASIC FPGAASIC

    NREFPGA

    FPGA17

    Total Cost

    Volume

    FPGA(current)

    Break-EventPoint

    FPGA(future)

    Std. Cell(future)

    Std. Cell(current)

  • FPGAs ASICs

    NRE non recurring engineering

    NRE

    FPGA18

  • FPGA

    Gatner Dataquest ()200326.73,16.6%200420%32.08200863

    FPGA19

  • FPGAFPGAFPGA

  • FPGA1

    234ASIC5SOPC6DRFPGA7COD

  • FPGA1

    1Altera Stratix /Stratix IIXilinx Virtex-II/II Pro/4

  • FPGA21.1 ALTERA StratixIIFPGA(LUT)FPGA,(ALM)FPGA

    TSMC 90nm91.2ALM:6240~71760(LE): 15.6~17.94130 nm Stratix FPGA8

    DSP418*1812~96PLL6~12;I/O358~1158

  • FPGA31.1 ALTERA StratixII

    RAMM512 RAM104~930M4K RAM78~768M-RAM512K0~9Stratix-IIStratix25%50%StratixII128AESQuartusII

  • Stratix II ALM

    FPGA4LUT

  • FPGA5

  • FPGA6

  • Xilinx Virtex-4

    Configurable Logic Blocks (CLBs) A CLB resource is made up of four slices. Each slice is equivalent and contains:

    Two function generators (F & G) Two storage elementsArithmetic logic gates Large multiplexers

    Fast carry look-ahead chain(ASMBL

    90nm20500MHZ LXSXFX

    FPGA7

  • Xilinx Virtex-4

    LXRAMDCMXtremeDSP/I/O

    SXLXXtremeDSPRAM500 MHz XtremeDSP

    FPGADSP

    FPGA8

  • 1.3 Xilinx Virtex-4

    FX600 Mbps11.1 GbpsPowerPC 405RAMDCMDSP/

    FPGA9

  • FPGA10

    2Xilinx Spartan/SpartanII/SpartanIII/ SpartanIIIE

    AlteraCycolne/ CycolneII

  • FPGA113

    Xilinx1.2v,1.5v,1.8v,2.5v3.3v5vAltera1.5v,1.8v,2.5v3.3v5v

  • FPGA12

    4ASICFPGAASICFPGALSI LogicNEC AMI SemiconductorFujitsuChip ExpressLightspeedSemiconductor AlteraASIC

  • FPGA13

    4.1 ASICFPGA

    ASIC

    ASIC

  • FPGA14

    4.1 ASICGartner Dataquest

    0.13mASIC10ASIC65ASIC200211020078.48ASIC

  • FPGA15

  • FPGA164.2 HardcopyASIC

    ASICAltera HardCopy-APEXHardCopy-StratixHardCopy StratixAlteraStratixFPGAStratix FPGAHardcopyFPGA70

    Stratix FPGA50%40%Quartus II synopsys galaxy IP2005Stratix-IIHardCopy

  • FPGA175 SOPC

    SOPCSOC

    SOPCIP CoreRAMIP CoreASIC

    FPGA

  • FPGA18SOPC

    EDADSPSOCPLDFPGACPUDSPI/OSOPCDSPCPU

    SOPC

    FPGA

  • FPGA195.1 SOPC

    SOPCIP CoreSOPC

    OPEN CoreIP CoreIP CoreIP CoreSOPC

  • FPGA20

    5.2 SOPC

    ActelSRAMIPASICASSP SoCXILINXALTERAFPGACPUDSP

    XilinxIBMVirtex-II ProFPGAIBM PowerPCRAMAlteraStratix28DSP

  • SOPC

    Processor(s)

    Auxiliary Systems (power, cooling,)

    Memory

    IP Cores (Vs.ASIC)

    Programmable Logic

    Software

    A/D

    D/A

    Sensors

    Actuators

    Human Interface

    FPGA

  • Xilinx FPGASOPC

    Translate

    Map

    Place & Route

    Xilinx Design Flow

    Plan & Budget HDL RTLSimulation

    Synthesizeto create netlist

    FunctionalSimulation

    Create Bit File

    Attain Timing Closure

    TimingSimulation

    Implement

    Create Code/Schematic

  • Xilinx SOPC

  • SOPC

    ()

    Xilinx Platform Studio (XPS)SOPCSOPC

    XPSSoftware

    Design

    HardwareDesign

    Debug

    Simulation

    XILINX SOPC

    HW-SW Partitioning HW-SW Co-Verification

  • IP CoreSOPC

    EDK & ISE

    ModelSim

  • FPGA216DRFPGADynamically Reconfigurab le FPGA

    , FPGA FPGA SRAM , SRAM , FPGA

    , FPGA , FPGA

  • FPGA22

    , , , , FPGA , , , , ;A S IC, , , DRFPGA , () , A S IC ,

  • FPGA22FPGA FPGA ,

    FPGA , , , ; , SRAM FPGA , , (MHz)

  • FPGA23FPGA

    SRAM FPGA , , SRAM , (n s ) , , Dharma DPGA (Dynamically Programmable Gate Array)FPGA (TS-FPGA ) FPGA (TM -FPGA )

  • FPGA24TM -FPGA

    TM -FPGA8 SRAM , 8

    CLB 8 ,

  • FPGA25DRFPGA

    DRFPGA , , , ; , , ; ,

  • FPGA25DRFPGA

    DRFPGA

  • FPGA26

    DRFPGA SRAM FPGA , FPGA , DRFPGA , , , FPGA Internet Internet, ,

    ,

  • FPGA277COD (clusters on die

    65

  • FPGA287COD

    COD SOC APU

    CPU IntelAMDTIMotorola IBM COD

  • APU

    COD

    FPGA29

  • FPGA307.1 CODEDA

    COD EDA

    FPGA ASIC

  • FPGAPLDEPLA FPGAFPGA

    XILINXSpartan-IIEVirtex-IIVirtex-II proALTERAStratixCyclone

    FPGA

    FPGA SOPC COD