Architectural Design of Multi-Mode ΣΔ ADC Based on Pole Placement Method for WiMAX Receiver

Jihene Mallek, Hassene Mnif and Mourad Loulou Laboratory of Electronics and Information Technologies

University of Sfax Sfax, Tunisia

jihenemallek@yahoo.fr, hassene.mnif@ieee.org, mourad.loulou@ieee.org

Abstract—The IEEE 802.16e-2005 standard, also denoted as mobile WIMAX, was introduced as one of the first real efforts towards the deployment of fourth generation communication systems providing fixed and mobile broadband wireless access. In this paper, we present the studying and sizing of the multi-mode sigma delta analog digital converter intended for use in the WiMAX band from 3.4GHz to 3.6GHz in 5MHz, 7MHz and 10MHz channel bandwidth. We use the pole placement method, linearization technique of loop sigma delta, to calculate and analyze the noise shaping transfer function of sigma delta analog digital converter according to the loop gain variation. This method aims to calculate the coefficients of continuous-time filter to achieve the desired noise shaping. For such specifications, a multi-mode fourth-order continuous-time sigma delta ADC, with mono-bit quantizer, is presented and its simulation results are shown by using Matlab Simulink.

I. INTRODUCTION Wireless broadband access technology is used for high-

speed Internet access, and the market for the latest wireless system demands ever higher speeds for data communications. As a system that meets these demands, Mobile WiMAX enables high speed mobile Internet access. In particular, Mobile WiMAX best meets the requirements for mobile broad band Internet access and gives flexibility in the design of networks. This system is based on the IEEE 802.16e-2005 standard. The modulation technique used for Mobile WiMAX is Orthogonal Frequency Division Multiple Access (OFDMA) [1].

This paper focuses on studying and sizing of multi-mode sigma delta analog digital converter (ADC) in this system by considering a zero-IF architecture for the receiver. We use the pole placement method, linearization technique of loop sigma delta, to calculate and analyze the noise shaping transfer function of sigma delta ADC according to the loop gain variation. Sigma delta ADCs are conventionally used in high resolution low to medium speed application. Although, there has been a lot of interest in using sigma delta ADCs for higher speed wireless communication systems due to their

lower power consumption compared to their competitors, Nyquist rate ADCs [2].

II. RECEIVER ARCHITECTURE Variable bandwidth is a multi-mode aspect. A traditional

radio determines the channel bandwidth with a fixed analog filter such as a SAW or ceramic filter. A Software Defined Radio however determines the channel bandwidth by using digital filters that can be altered [3].

Zero-IF receiver architecture is considered for this multi-mode system due to its high level of integration, lower consumption and fewer external components. Zero-IF architecture removes the need for image rejection filters which need to be implemented off-chip. However, problems of zero-IF architecture, i.e. DC offset, flicker noise and sensitivity to I/Q mismatch shall be addressed carefully [4]. Block diagram of the receiver is depicted in Figure 1.

The received RF signal is first amplified by a low-noise amplifier (LNA), which must have wide enough bandwidth in order to contain the standard selected frequency band. Then the signal will be directly down converted to baseband signals through two sub-harmonic mixers.

Figure 1. Block diagram of multi-mode receiver

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Digital control signals

DSP

Control

ADC

090

VGA ADC

LNA

VGA VGA

VGA

Analog RF Analog BB Digital BB

978-1-4577-2209-7/11/$26.00 ©2011 IEEE

The analog baseband section consists of two gain-programmable amplifiers and an anti- aliasing low-pass filter (AAF). Indeed, a variable gain amplifier (VGA1) limits the input levels of (AAF) at the higher level blocker in the reception band. The AAF may be designed to have adjustable cut-off frequency according to the desired frequency band and will attenuate the different blockers, a second (VGA2) will reduce the level of the strongest signals to the ADC full scale Sfs [5].

III. ADC SPECIFICATIONS Multi-mode sigma delta ADC architecture is considered

for multi-mode system in 5MHz, 7MHz and 10MHz channel bandwidth. It is a reconfigurable and programmable ADC which aims to cover optimally a bandwidth range and a resolution range and to optimize power and area for a specific application, by using the same ADC architectures, re-use and design techniques. Multi-mode ADC allows bandwidth reconfiguration by dynamically adapting sampling frequency and over sampling ratio [6].

Continuous-time sigma-delta (CT ΣΔ) ADCs are often used in wireless communications, where a high bandwidth at low power consumption is needed. Although CT ΣΔ ADC offer the possibility to convert high bandwidth data with an extreme low power consumption [7].

ADC specifications for 5MHz, 7MHz and 10MHz channel bandwidth are given in TABLE I.

TABLE I. ADC SPECIFICATIONS

Channel bandwidth 5 MHz 7 MHz 10 MHz Sampling frequency 125 MHz 175 MHz 250 MHz SNRADC 70.46 dB 69 dB 67.455 dB NADC 11 bits 11 bits 11 bits

Our design technique aims keep proper ADC architecture in response to multi-mode aspect of WiMAX standard. For this, we set each sampling frequency corresponding to each channel bandwidth so that we will keep the same OSR value for different channel bandwidth. In addition we use a mono-bit quantizer for different channel bandwidth. This technique aims to optimize power and area compared to ADCs which consists of two or three cascaded stages [6]. The over sampling ratio is:

s

b

fOSR= 25

2×f=

(1)

With fs is representing the sampling frequency and fb the signal bandwidth. The theoretical signal to noise ratio of modulator is given by:

( )2n 2L+1th 2L

3 2L+1SNR =10log × 2 -1 OSR2 π

⎛ ⎞⎛ ⎞⎜ ⎟⎜ ⎟

⎝ ⎠⎝ ⎠ (2)

With L is representing the modulator order, OSR over sampling ratio and n bits quantizer. For L=3, OSR=16 and

n=1, we obtain: SNRth=78.25dB, which correspond to a third-order mono-bit ΣΔ modulator. We prefer to take a safety margin in choosing a fourth-order modulator, we obtain: SNRth=97.363dB.

To increase immunity to interferers, a multi-mode CT ΣΔ

ADC with feedback loop architecture could be used since its signal transfer function (STF) has a faster roll-off in out-of-channel frequencies in comparison to feedforward loop architectures. The stabilization of the modulator transfer function is performed by using loopback input of each filter stage [7]. Conventional fourth-order feedback low-pass CT ΣΔ ADC with a mono-bit quantizer is shown in Figure 2.

Figure 2. Multi-mode ADC block diagram

IV. ADC SIZING We use the pole placement method [8], linearization

technique of loop sigma delta, to calculate and analyze the noise shaping transfer function (NTF) of CT ΣΔ ADC according to the loop gain variation. This method aims to calculate the coefficients of continuous-time filter to achieve the desired noise shaping. The calculation method by pole placement takes place in four major steps:

Step1: Architecture description of CT ΣΔ ADC The block diagram describing the architecture of fourth-order feedback CT ΣΔ is provided by Figure 3. The ADC has a delay compensation system for signal propagation delay in the internal ADC and feedback digital analog converters. This correction system is achieved by introducing two fixed deadlines dt1 and dt2 and looping D.

Figure 3. Multi-mode ADC block diagram

Step2: Analytical expression calculation of linearized NTF The gain K of linearized model is set to one for loop coefficients calculating. The NTF is given by:

( )( )

( ) ( ) ( )1 21

4P

-s dt +dt-sdt4 4 2 3P 1 2 3 4

NTF s =

s s+W

s s+W +Ge Ds +Ge a +a s+a s +a s

(3)

( )e t

inV +

−

1s

+

−

1a

1s

+

−

1s

2a 3a 4a

+

−

1s

P

Gs W+

+

−K +

+outV

D

2sdte− 1sdte−

inV +

−

1s

+

−

1a

1s

+

−

1s

+

−

1s

2a

o u tV

3a 4a

ADC

DAC

Step3: NTF choice by pole placement To calculate numerically the loop coefficients, it suffices to choose desired CT ΣΔ noise shaping. The filtering functions of Butterworth or Chebyshev are often preferred. The Butterworth filter transfer function of fourth-order [9] is given by:

( ) 4 3 2

c c c c

1H s =w w w w-2.613j -4.614 +2.613j +1w w w w⎛ ⎞ ⎛ ⎞ ⎛ ⎞ ⎛ ⎞⎜ ⎟ ⎜ ⎟ ⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠ ⎝ ⎠ ⎝ ⎠

(4)

For the cutoff frequency fc = 0.5fs and fs=1, the filter transfer function is given by:

( ) 4 3 20.062H s =

s +1.306s +1.153s +0.326s+0.062 (5)

From the linearized model of ΣΔ ADC with white noise adder, we can determine the noise shaping transfer function and the signal transfer function (STF) of the CT ΣΔ. The NTF and the STF are given respectively by equation 6 and 7.

( )

( )4 3 2

4 3 2

1NTF=1+K×H s

s +1.306s +1.153s +0.326s+0.062 =s +1.306s +1.153s +0.326s+0.062× K+1

(6)

( )( )

( )4 3 2

K×H sSTF=

1+K×H s0.062.K =

s +1.306s +1.153s +0.326s+0.062× 1+K

In order to insure stability of multi-mode modulator design, the poles of the NTF must be within the unit circle in the Z domain. The pole zero diagram of fourth-order CT ΣΔ ADC is shown in Figure 4.

-1 -0.5 0 0.5 1-1

-0.5

0

0.5

1Pole-Zero Plot

Figure 4. Pole Zero diagram

As illustrated in Figure 4, the stability condition of multi-mode fourth-order CT ΣΔ ADC is respected.

The estimated noise shaping transfer function and the signal transfer function of the fourth-order CT ΣΔ ADC are shown respectively in Figure 5 and 6.

10-2

10-1

100

101

102

-60

-50

-40

-30

-20

-10

0Noise shaping Transfer Function

Normalized Frequency(Fs=1)

Mag

nitu

de (

dB)

Figure 5. Noise shaping transfer function

10-2

10-1

100

101

102

-140

-120

-100

-80

-60

-40

-20

0

X: 10Y: -45.36

Signal Transfer Function

Normalized Frequency(Fs=1)

Mag

nitu

de (

dB)

X: 100Y: -124.3

Figure 6. Signal transfer function

Figure 5 shows that the NTF has an appearance of high pass filter, which justifies our ADC is a low pass modulator. In addition, the NTF curve shows that the noise is pushed outside the signal bandwidth. According to the curve of Figure 6, the STF has a slope of -80dB/decade, which corresponds to a fourth-order modulator.

Step4: Coefficients calculation by poles identifying Knowing the analytical expression of the linearized NTF and the poles desired positioning, it becomes easy to calculate the corresponding loop coefficients, which are summarized in TABLE II.

TABLE II. CONTINUOUS TIME FILTER COEFFICIENTS

Coefficient Value a1 1 a2 4.614 a3 14.771 a4 21.172

Using the calculation by pole placement method requires thus checking the converter stability by the time simulation of system.

V. SIMULATION RESULTS Sinusoidal input signal and the modulator output of multi-

mode fourth order CT ΣΔ for 10 MHz channel bandwidth are shown in Figure10.

Figure 7. Sinusoidal input signal and modulator output

The Modulator output spectrum of multi-mode fourth-order CT ΣΔ ADC for 5MHz, 7MHz and 10MHz channel bandwidth, at a sampling frequency respectively of 125MHz, 175MHz and 250MHz, is shown in Figure 8. Figure 9 is the zoom of Figure 5 for a frequency between 0 and 16MHz.

0 10 20 30 40 50 60 70-120

-100

-80

-60

-40

-20

0

Frequency(MHz)

PS

D (

dB)

5MHz

7MHz10MHz

Figure 8. Modulator output spectrum

Figure 9 shows that multi-mode CT ΣΔ ADC provides SNRADC values of 78.19dB, 74.61dB and 73.64dB, over a channel bandwidth respectively of 5MHz, 7MHz and 10MHz.

0 2 4 6 8 10 12 14 16-120

-100

-80

-60

-40

-20

0

Frequency(MHz)

PS

D (dB

)

5MHz

7MHz

10MHz

Figure 9. Zoom of Figure 8

VI. CONCLUSION The present paper analyses the studying of the multi-

mode sigma delta ADC intended for use in the WiMAX standard in the band from 3.4GHz to 3.6GHz for a 5MHz, 7MHz and 10MHz channel bandwidth. We use the pole placement method, linearization technique of loop sigma delta, to calculate and analyze the noise shaping transfer function of sigma delta analog digital converter according to the loop gain variation. This method aims to calculate the coefficients of continuous-time filter to achieve the desired noise shaping. Fourth-order feedback low-pass CT ΣΔ ADC with a mono-bit quantizer, is described. Over a 5MHz, 7MHz and 10MHz channel bandwidth, the ADC achieves respectively 78.19dB, 74.61dB and 73.64dB SNR values.

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for Mobile WiMAX Terminal Equipment,” Fujitsu Sci. Tech. J., 44 ,3,p.239-248, July 2008.

[2] B. J. Farahani, and M. Ismail, “Adaptive Sigma Delta ADC for WiMAX Fixed Point Wireless Applications,” 48th Midwest Symposium on, Circuits and Systems, pp. 692-695, August 2005.

[3] Kh. Grati, “Architecture d'un récepteur radio multistandard à sélection numérique des canaux,” Thesis, ENST, September 2005.

[4] B. J. Farahani, “Adaptive digital calibration techniques for high speed, high resolution sigma delta ADCs for broadband wireless applications,” These, Ohio State University, 2005.

[5] Y. Zhou, C. P. Yoong, L. S. Weng, Y. J. Khoi, M. C. Y. Wah, K. A. C. Moy, and D. W. T. Fatt, “A 5 GHz Dual-Mode WiMAX/WLAN Direct-Conversion Receiver,” IEEE Symposium on Circuits and Systems, ISCAS 2006, pp. 3053-3056, May 21-24, 2006.

[6] A. Rusu, “Smart ADC Architectures for WiMAX and LTE Radios,” RaMSiS Summer School, 2008.

[7] L. Dörrer, F. Kuttner, P. Greco, P Torta, and T. Hartig, “A 3-mW 74-dB SNR 2-MHz Continuous-Time Delta-Sigma ADC With a Tracking ADC Quantizer in0.13-µm CMOS, ” IEEE Journal of Solid-State Circuits, vol. 40, no. 12, pp. 2416-2427, December 2005.

[8] J. Goulier, “Contribution à la conception de convertisseurs analogique numérique delta sigma à temps continu, des spécifications à l'implémentation application a un standard de télécommunication large bande, Thesis, Polytechnique National Institute of Grenoble, May 2008.

[9] P. Roux, Filtres de fréquences actifs passe-bas de Butterworth, http://philippe.roux.7. perso. neuf. fr/Resources /FILTRES_Butter.pdf, 2006.