Instruction System - Arithmetic Instruction

Instruction System -Instruction System -Arithmetic InstructionArithmetic Instruction

计算机学院李征计算机学院李征TelTel ：： 1388215376513882153765

EmailEmail ：： [email protected]@cs.scu.edu.cnOICQ: 1340915OICQ: 1340915

Arithmetic InstructionArithmetic Instruction

(1) ADD(1) ADD(2) ADC(2) ADC(3) INC(3) INC(4) SUB(4) SUB(5) SBB(5) SBB(6) DEC(6) DEC(7) NEG(7) NEG(8) CMP(8) CMP

Arithmetic InstructionArithmetic Instruction

Arithmetic instruction represent operation Arithmetic instruction represent operation status in flags.status in flags.

All arithmetic instructions affect status All arithmetic instructions affect status flags.flags.

(1) ADD (Addition)(1) ADD (Addition)

ADD DESTADD DEST ，， SRCSRC

DEST <=DEST <= （（ SRCSRC ）） ++ （（ DESTDEST ））

Corresponding status flag:Corresponding status flag:

OFOF 、、 SFSF 、、 ZFZF 、、 AFAF 、、 PFPF 、、 CFCF


Example:Example:

ADD BXADD BX ，， SISI

ADD DA_WORD,0F8CHADD DA_WORD,0F8CH

ADD DL,TAB[BX]ADD DL,TAB[BX]

源地址源地址目的地址

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++ALUALU


Example:Example:

MOV AHMOV AH ，， 45H45HMOV ALMOV AL ，， 0E3H0E3HADD AHADD AH ，， ALAL

45H = 01000101B45H = 01000101B0E3H =11100011B0E3H =11100011B

Unsigned code: 69+227 (Decimal)Unsigned code: 69+227 (Decimal)Signed code: 69+Signed code: 69+ （（ -29-29 ）） (Decimal)(Decimal)


0100010101000101+ + 1110001111100011 11 0010100000101000

Unsigned codeUnsigned code ：： Carry, CF=1Carry, CF=1BCD code: No carry, AF=0BCD code: No carry, AF=0Signed codeSigned code ：： positive+negative OF=0positive+negative OF=0Result is positive, SF=0Result is positive, SF=0Non-zero resultNon-zero result ，， ZF=0ZF=0Bit number of ‘1’ is evenBit number of ‘1’ is even ，， PF=1PF=1

(2) ADC (Addition with carry)(2) ADC (Addition with carry)

ADC DESTADC DEST ，， SRCSRC

DEST <=DEST <= （（ SRCSRC ）） ++ （（ DESTDEST ）） ++（（ CFCF ））




Example: addition of two 32-bit codes, one Example: addition of two 32-bit codes, one code is stored in AX and DX.code is stored in AX and DX.

ADD AXADD AX ，， 1A23H1A23H

ADC DXADC DX ，， 76FH76FH


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++ALUALU


Example:Example:

MOV ALMOV AL ，， 93H93HMOV AHMOV AH ，， 02H02HMOV BLMOV BL ，， 88H88HMOV BHMOV BH ，， 0EEH0EEHADD ALADD AL ，， BLBLADC AHADC AH ，， BHBH


Explain for unsigned code:Explain for unsigned code:

（（ AXAX ）） = 0293H = 0293H 659 659 （（ DecimalDecimal ））（（ BXBX ）） =0EE88H=0EE88H 6106461064 （（ DecimalDecimal ））

ADCADC （高）（高） ADDADD（低）（低） 0000001000000010 1001001110010011++ 1110111011101110 1000100010001000 00 1111000111110001 11 0001101100011011 CFCF CFCF

ResultResult ：： F11BHF11BH 6172361723 （（ DecimalDecimal ））

This CF joins the addition

operations

This CF represents if there is overflow.


Explain for signed code:Explain for signed code:（（ AXAX ）） = 0293H = 0293H 659 659 （（ DecimalDecimal ））（（ BXBX ）） =0EE88H=0EE88H - 4472- 4472 （（ DecimalDecimal ）） ADCADC （高）（高） ADDADD（低）（低） 0000001000000010 1001001110010011++ 1110111011101110 1000100010001000 00 1111000111110001 11 0001101100011011 CFCF CFCF OF=0OF=0 OF=1OF=1

ResultResult ：： F11BHF11BH -3813-3813 （（ DecimalDecimal ））

This CF joins the addition operations.

This CF is invalid.

This OF is invalid.

This OF represent if

there is overflow.

(3) INC (Increase)(3) INC (Increase)

INC DESTINC DEST

DEST <=DEST <= （（ DESTDEST ）） +1+1

Corresponding status:Corresponding status:OFOF 、、 SFSF 、、 ZFZF 、、 AFAF 、、 PFPF

Why not CF?Why not CF?

11目的地址

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+1+1ALUALU


Example: addition of data with 5 word lengthExample: addition of data with 5 word length mov bx, 0mov bx, 0 mov cx, 5mov cx, 5 clcclclop1: mov ax, tab1[bx]lop1: mov ax, tab1[bx] adc ax, tab2[bx] ; generate CFadc ax, tab2[bx] ; generate CF mov res[bx], axmov res[bx], ax inc bx ; not affect CFinc bx ; not affect CF inc bxinc bx loop lop1 ; not affect flagsloop lop1 ; not affect flags


Example:Example:

MOV ALMOV AL ，， 0FFH0FFH

INC ALINC AL

CF = ? CF = ? Maintain its status before ‘INC’, may be 1 or 0

(4) SUB (Subtraction)(4) SUB (Subtraction)

SUB DESTSUB DEST ，， SRCSRC

DEST <=DEST <= （（ DESTDEST ）） -- （（ SRCSRC ））




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--ALUALU

(4) SUB (Subtraction)(4) SUB (Subtraction)

Note:Note:

Do not use signed code operation for CF Do not use signed code operation for CF judgment.judgment.

In CPU, CF generation is not correspond In CPU, CF generation is not correspond to the subtraction operation itself.to the subtraction operation itself.

(5) SBB (Subtraction with borrow)(5) SBB (Subtraction with borrow)

SBB DESTSBB DEST ，， SRCSRC

DEST<=DEST<= （（ DESTDEST ）） -- （（ SRCSRC ）） -- （（ CCFF ））



ADC and SBBADC and SBB

With ADC and SBB, long code operation With ADC and SBB, long code operation can be realized in CPU.can be realized in CPU.

Basically, they are both based on CF.Basically, they are both based on CF.

Operation order: lower part first, then Operation order: lower part first, then higher parthigher part

(6) DEC (Decrease)(6) DEC (Decrease)

DEC DESTDEC DEST

DEST <=DEST <= （（ DESTDEST ）） -1-1

Corresponding status flag:Corresponding status flag:OFOF 、、 SFSF 、、 ZFZF 、、 AFAF 、、 PFPF

not affect CFnot affect CF

(7) NEG (Negative)(7) NEG (Negative)

NEG DESTNEG DEST

DEST <= -DEST <= - （（ DESTDEST ））



目的地址目的地址0

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NNEEGG

ALUALU


Generally, the operation data is explained Generally, the operation data is explained as signed code.as signed code.

If operation code is unsigned, then there If operation code is unsigned, then there must be overflow (except 0).must be overflow (except 0).

CF = 1 is always the case, except CF = 1 is always the case, except operation code is 0.operation code is 0.


Overflow in signed codes:Overflow in signed codes:

-128 in byte, -32768 in word, etc.-128 in byte, -32768 in word, etc.


NEG is limited by code length.NEG is limited by code length.

Example: Negative the 32-bit code in DAWExample: Negative the 32-bit code in DAW

NEG DAWNEG DAWMOV AXMOV AX ，， 00SBB AXSBB AX ，， DAW+2DAW+2MOV DAW+2MOV DAW+2 ，， AXAX

(8) CMP (Compare)(8) CMP (Compare)

CMP DESTCMP DEST ，， SRCSRC

（（ DESTDEST ）） -- （（ SRCSRC ））



Same as SUB, but not store operation resultSame as SUB, but not store operation result


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--ALUALU


Not store operation result, only store the Not store operation result, only store the statusstatus

Along with program transfer instructions, it Along with program transfer instructions, it can realize some branch structure.can realize some branch structure.


Explain for unsigned compare:Explain for unsigned compare:

CF=0CF=0 ：（：（ DESTDEST ））≥≥（（ SRCSRC ））

CF=1CF=1 ：（：（ DESTDEST ）） << （（ SRCSRC ））


Explain for signed compare:Explain for signed compare:

OF=SFOF=SF ：（：（ DESTDEST ））≥ ≥ （（ SRCSRC ））

1) OF=SF=0: 1) OF=SF=0: OF=0 -> SF=0 is correctOF=0 -> SF=0 is correct

2) OF=SF=1:2) OF=SF=1:OF=1 -> SF=1 is incorrect, so SF=0 is correct.OF=1 -> SF=1 is incorrect, so SF=0 is correct.


OFOF≠≠SFSF ：（：（ DESTDEST ）） << （（ SRCSRC ））

1) OF=01) OF=0 ，， SF=1:SF=1:OF=0 -> SF=1 is correctOF=0 -> SF=1 is correct

2) OF=12) OF=1 ，， SF=0:SF=0:OF=1 -> SF=0 is incorrect, so SF=1 is OF=1 -> SF=0 is incorrect, so SF=1 is correct.correct.


The explaining of unsigned or signed The explaining of unsigned or signed compare is decided by different program compare is decided by different program transfer instruction choice.transfer instruction choice.

If there is ZF in judgment, there will be If there is ZF in judgment, there will be more compare result.more compare result.

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Instruction System - Arithmetic Instruction